This patch adds the AMD znver3 instructions INVLPGB, TLBSYNC and SNP. Tests are also added. These instructions needs to be included for znver3 features after adding Scheduler descriptions.
These feature flags should probably only be here if intrinsics are added. Without that nothing will ever check the features.
TB should be PS since we have XD and XS instructions that use the same opcode. TB is supposed to indicate that 0xf2/0xf3 prefixes don't effect the instruction.
TB should be PS since we have XD and XS opcodes.
Should this have In64BitMode in the requires field?
- The instructions are updated for prefix specifiers
- Except for pvalidate all the SNP instructions are valid only in 64-bit environment. Corrected the test accordingly.
- The modes (In64BitMode, In64BitMode) are updated in Instruction description.