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Differential D93589

[RISCV][NFC] Add tests for multiplication with constant
ClosedPublic

Authored by benshi001 on Dec 19 2020, 8:49 PM.

Details

Reviewers
lenary
luismarques
asb
MaskRay
craig.topper
Commits
rG9e4b682baf2c: [RISCV][NFC] Add tests for multiplication with constant

Diff Detail

Event Timeline

benshi001 created this revision.Dec 19 2020, 8:49 PM
Herald added subscribers: frasercrmck, NickHung, evandro and 23 others. · View Herald TranscriptDec 19 2020, 8:49 PM
benshi001 requested review of this revision.Dec 19 2020, 8:49 PM
Herald added a project: Restricted Project. · View Herald TranscriptDec 19 2020, 8:49 PM
Herald added a subscriber: llvm-commits. · View Herald Transcript
benshi001 added a comment.Dec 19 2020, 8:51 PM

These tests will show further optimization from

; RV32I:       lui a1, 1
; RV32I-NEXT:  addi a1, a1, 256
; RV32I-NEXT:  call __mulsi3@plt

to

; RV32I:       slli a1, a0, 12
; RV32I-NEXT:  slli a0, a0, 8
; RV32I-NEXT:  add a0, a0, a1
Harbormaster completed remote builds in B83060: Diff 312956.Dec 19 2020, 9:30 PM
craig.topper added a subscriber: craig.topper.Dec 20 2020, 1:15 PM
craig.topper added inline comments.
llvm/test/CodeGen/RISCV/mul.ll
567

Please use utils/update_llc_test_checks.py to generate the check lines to be consistent with the rest of this file.

benshi001 updated this revision to Diff 313008.Dec 20 2020, 5:17 PM
benshi001 added a reviewer: craig.topper.
benshi001 marked an inline comment as done.
craig.topper accepted this revision.Dec 20 2020, 5:33 PM

LGTM

This revision is now accepted and ready to land.Dec 20 2020, 5:33 PM
benshi001 added a comment.Dec 20 2020, 5:54 PM

I got the following error when trying to push. what's wrong? I applied for the push access in the summer of 2020.

remote: error: GH006: Protected branch update failed for refs/heads/master.
remote: error: You're not authorized to push to this branch. Visit https://docs.github.com/articles/about-protected-branches/ for more information.
To github.com:llvm/llvm-project.git
 ! [remote rejected]           master -> master (protected branch hook declined)
error: failed to push some refs to 'git@github.com:llvm/llvm-project.git'
MaskRay added a comment.Dec 20 2020, 5:58 PM
In D93589#2465203, @benshi001 wrote:

I got the following error when trying to push. what's wrong? I applied for the push access in the summer of 2020.

remote: error: GH006: Protected branch update failed for refs/heads/master.
remote: error: You're not authorized to push to this branch. Visit https://docs.github.com/articles/about-protected-branches/ for more information.
To github.com:llvm/llvm-project.git
 ! [remote rejected]           master -> master (protected branch hook declined)
error: failed to push some refs to 'git@github.com:llvm/llvm-project.git'
git branch -m main
git branch --set-upstream-to=origin/main
Closed by commit rG9e4b682baf2c: [RISCV][NFC] Add tests for multiplication with constant (authored by benshi001). · Explain WhyDec 20 2020, 6:20 PM
This revision was automatically updated to reflect the committed changes.
benshi001 added a commit: rG9e4b682baf2c: [RISCV][NFC] Add tests for multiplication with constant.

Revision Contents

PathSize
llvm/
test/
CodeGen/
RISCV/
410 lines

Diff 313009

llvm/test/CodeGen/RISCV/mul.ll

Show First 20 Lines • Show All 556 Lines • ▼ Show 20 Lines
; RV64IM: # %bb.0: ; RV64IM: # %bb.0:
; RV64IM-NEXT: slli a1, a0, 6 ; RV64IM-NEXT: slli a1, a0, 6
; RV64IM-NEXT: add a0, a1, a0 ; RV64IM-NEXT: add a0, a1, a0
; RV64IM-NEXT: neg a0, a0 ; RV64IM-NEXT: neg a0, a0
; RV64IM-NEXT: ret ; RV64IM-NEXT: ret
%1 = mul i64 %a, -65 %1 = mul i64 %a, -65
ret i64 %1 ret i64 %1
} }
define i32 @muli32_p384(i32 %a) nounwind {
; RV32I-LABEL: muli32_p384:
craig.topperUnsubmitted
Done
ReplyInline Actions

Please use utils/update_llc_test_checks.py to generate the check lines to be consistent with the rest of this file.

craig.topper: Please use utils/update_llc_test_checks.py to generate the check lines to be consistent with…
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: addi a1, zero, 384
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_p384:
; RV32IM: # %bb.0:
; RV32IM-NEXT: addi a1, zero, 384
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_p384:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: addi a1, zero, 384
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_p384:
; RV64IM: # %bb.0:
; RV64IM-NEXT: addi a1, zero, 384
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, 384
ret i32 %1
}
define i32 @muli32_p12288(i32 %a) nounwind {
; RV32I-LABEL: muli32_p12288:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a1, 3
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_p12288:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 3
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_p12288:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 3
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_p12288:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 3
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, 12288
ret i32 %1
}
define i32 @muli32_p4352(i32 %a) nounwind {
; RV32I-LABEL: muli32_p4352:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a1, 1
; RV32I-NEXT: addi a1, a1, 256
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_p4352:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 1
; RV32IM-NEXT: addi a1, a1, 256
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_p4352:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1
; RV64I-NEXT: addiw a1, a1, 256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_p4352:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1
; RV64IM-NEXT: addiw a1, a1, 256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, 4352
ret i32 %1
}
define i32 @muli32_p3840(i32 %a) nounwind {
; RV32I-LABEL: muli32_p3840:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a1, 1
; RV32I-NEXT: addi a1, a1, -256
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_p3840:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 1
; RV32IM-NEXT: addi a1, a1, -256
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_p3840:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1
; RV64I-NEXT: addiw a1, a1, -256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_p3840:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1
; RV64IM-NEXT: addiw a1, a1, -256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, 3840
ret i32 %1
}
define i32 @muli32_m3840(i32 %a) nounwind {
; RV32I-LABEL: muli32_m3840:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a1, 1048575
; RV32I-NEXT: addi a1, a1, 256
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_m3840:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 1048575
; RV32IM-NEXT: addi a1, a1, 256
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_m3840:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1048575
; RV64I-NEXT: addiw a1, a1, 256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_m3840:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1048575
; RV64IM-NEXT: addiw a1, a1, 256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, -3840
ret i32 %1
}
define i32 @muli32_m4352(i32 %a) nounwind {
; RV32I-LABEL: muli32_m4352:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a1, 1048575
; RV32I-NEXT: addi a1, a1, -256
; RV32I-NEXT: call __mulsi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli32_m4352:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a1, 1048575
; RV32IM-NEXT: addi a1, a1, -256
; RV32IM-NEXT: mul a0, a0, a1
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli32_m4352:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1048575
; RV64I-NEXT: addiw a1, a1, -256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli32_m4352:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1048575
; RV64IM-NEXT: addiw a1, a1, -256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i32 %a, -4352
ret i32 %1
}
define i64 @muli64_p4352(i64 %a) nounwind {
; RV32I-LABEL: muli64_p4352:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a2, 1
; RV32I-NEXT: addi a2, a2, 256
; RV32I-NEXT: mv a3, zero
; RV32I-NEXT: call __muldi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli64_p4352:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a2, 1
; RV32IM-NEXT: addi a2, a2, 256
; RV32IM-NEXT: mul a1, a1, a2
; RV32IM-NEXT: mulhu a3, a0, a2
; RV32IM-NEXT: add a1, a3, a1
; RV32IM-NEXT: mul a0, a0, a2
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli64_p4352:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1
; RV64I-NEXT: addiw a1, a1, 256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli64_p4352:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1
; RV64IM-NEXT: addiw a1, a1, 256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i64 %a, 4352
ret i64 %1
}
define i64 @muli64_p3840(i64 %a) nounwind {
; RV32I-LABEL: muli64_p3840:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a2, 1
; RV32I-NEXT: addi a2, a2, -256
; RV32I-NEXT: mv a3, zero
; RV32I-NEXT: call __muldi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli64_p3840:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a2, 1
; RV32IM-NEXT: addi a2, a2, -256
; RV32IM-NEXT: mul a1, a1, a2
; RV32IM-NEXT: mulhu a3, a0, a2
; RV32IM-NEXT: add a1, a3, a1
; RV32IM-NEXT: mul a0, a0, a2
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli64_p3840:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1
; RV64I-NEXT: addiw a1, a1, -256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli64_p3840:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1
; RV64IM-NEXT: addiw a1, a1, -256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i64 %a, 3840
ret i64 %1
}
define i64 @muli64_m4352(i64 %a) nounwind {
; RV32I-LABEL: muli64_m4352:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a2, 1048575
; RV32I-NEXT: addi a2, a2, -256
; RV32I-NEXT: addi a3, zero, -1
; RV32I-NEXT: call __muldi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli64_m4352:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a2, 1048575
; RV32IM-NEXT: addi a2, a2, -256
; RV32IM-NEXT: mul a1, a1, a2
; RV32IM-NEXT: mulhu a3, a0, a2
; RV32IM-NEXT: sub a3, a3, a0
; RV32IM-NEXT: add a1, a3, a1
; RV32IM-NEXT: mul a0, a0, a2
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli64_m4352:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1048575
; RV64I-NEXT: addiw a1, a1, -256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli64_m4352:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1048575
; RV64IM-NEXT: addiw a1, a1, -256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i64 %a, -4352
ret i64 %1
}
define i64 @muli64_m3840(i64 %a) nounwind {
; RV32I-LABEL: muli64_m3840:
; RV32I: # %bb.0:
; RV32I-NEXT: addi sp, sp, -16
; RV32I-NEXT: sw ra, 12(sp) # 4-byte Folded Spill
; RV32I-NEXT: lui a2, 1048575
; RV32I-NEXT: addi a2, a2, 256
; RV32I-NEXT: addi a3, zero, -1
; RV32I-NEXT: call __muldi3@plt
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: addi sp, sp, 16
; RV32I-NEXT: ret
;
; RV32IM-LABEL: muli64_m3840:
; RV32IM: # %bb.0:
; RV32IM-NEXT: lui a2, 1048575
; RV32IM-NEXT: addi a2, a2, 256
; RV32IM-NEXT: mul a1, a1, a2
; RV32IM-NEXT: mulhu a3, a0, a2
; RV32IM-NEXT: sub a3, a3, a0
; RV32IM-NEXT: add a1, a3, a1
; RV32IM-NEXT: mul a0, a0, a2
; RV32IM-NEXT: ret
;
; RV64I-LABEL: muli64_m3840:
; RV64I: # %bb.0:
; RV64I-NEXT: addi sp, sp, -16
; RV64I-NEXT: sd ra, 8(sp) # 8-byte Folded Spill
; RV64I-NEXT: lui a1, 1048575
; RV64I-NEXT: addiw a1, a1, 256
; RV64I-NEXT: call __muldi3@plt
; RV64I-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64I-NEXT: addi sp, sp, 16
; RV64I-NEXT: ret
;
; RV64IM-LABEL: muli64_m3840:
; RV64IM: # %bb.0:
; RV64IM-NEXT: lui a1, 1048575
; RV64IM-NEXT: addiw a1, a1, 256
; RV64IM-NEXT: mul a0, a0, a1
; RV64IM-NEXT: ret
%1 = mul i64 %a, -3840
ret i64 %1
}