- Support the widening of non DWORD-aligned sub-DWORD loads from the constant space in SelectionDAG.
- Remove the late codegen preparation pass.
|50 ms||x64 windows > LLVM.CodeGen/XCore::threads.ll|
Script: -- : 'RUN: at line 1'; c:\ws\w64\llvm-project\premerge-checks\build\bin\llc.exe -march=xcore < C:\ws\w64\llvm-project\premerge-checks\llvm\test\CodeGen\XCore\threads.ll | c:\ws\w64\llvm-project\premerge-checks\build\bin\filecheck.exe C:\ws\w64\llvm-project\premerge-checks\llvm\test\CodeGen\XCore\threads.ll
PseudoSourceValues can be permissible. However the first situations I think of at the top of my head are all cases where we would have emitted the correct code in the first place
I'm not 100% comfortable relying on the IR value here. Can you just use the DAG known bits?
Yeah, as pseudosource value is generated by the backend, where optimal code should be generated from the beginning. If there are cases introduced later, we may consider to enhance that original code and extend the support here.
Here's the tradeoff I have to make based on the current alias interface in the backend. The alias checking in MI has the assumption that the MachineMemOperand offset should never be any negative offsets. But, the transformation here needs to rebase the pointer by a negative one to be DWORD-aligned. Without breaking the assumption so far, we need to adjust IR mapping to ensure the correctness of alias checking.
Needs a comment explaining why this is looking at the IR value. Technically we could just drop the reference (since these are known to be invariant-ish loads, I'm not sure we get much out of the aliasing information)