[PowerPC] [Clang] Enable float128 feature on VSX targets

[steven.zhang]

clang/lib/Basic/Targets/PPC.cpp

350

I think, we can support the float128 as far as the altivec is enabled. Do you have any specific reason on why limit the cpu ?

[qiucf]

clang/lib/Basic/Targets/PPC.cpp

350

Do you have any specific reason on why limit the cpu?

Actually no. I also think we can enable for earlier targets. (GCC documented it's enabled for all targets with VSX) Previously, I thought we did not tested targets <P8 well.

[steven.zhang]

clang/lib/Basic/Targets/PPC.cpp

350

The backend implementation only depends on altivec. I think it is better to align with backend implementation. And check the cpu will also have problem if we have something like: -mcpu=pwr8 -mattr=-altivec

[qiucf]

Align with Altivec targets.

[nemanjai]

I understand that the back end only needs Altivec to support the operations, but enabling this on non-vsx subtargets is different from what GCC does. I don't see a good reason for us to depart from that.

[steven.zhang]

In D92815#2472760, @nemanjai wrote:

I understand that the back end only needs Altivec to support the operations, but enabling this on non-vsx subtargets is different from what GCC does. I don't see a good reason for us to depart from that.

Do we know why GCC guard it under VSX instead of Altivec ? Maybe, it will help us get more clear on what we should align with (GCC's implementation or what it should be).

[qiucf]

Align with GCC, enable float128 for VSX and later subtargets.

But besides, GCC can enable it by -mcpu=power6 -mvsx, this revision did not do it.

[qiucf]

Fix redundant code

[steven.zhang]

LGTM now. But please hold on for at least one week to see if @nemanjai has concern.

[qiucf]

Ping...

[nemanjai]

LGTM.

clang/lib/Basic/Targets/PPC.cpp

359

Nit: remove and above

[nemanjai]

Looks like this is causing failures at https://lab.llvm.org/buildbot/#/builders/76/builds/2422
Please revert.

[qiucf]

In D92815#2753684, @nemanjai wrote:

Looks like this is causing failures at https://lab.llvm.org/buildbot/#/builders/76/builds/2422
Please revert.

Yes. Already reverted in https://reviews.llvm.org/rGcbd93cee9bf014402a7405479ba21f6f3340a126.

clang/lib/Basic/Targets/PPC.cpp

                         .Case("pwr7", true)
                         .Default(false);
   Features["htm"] = llvm::StringSwitch<bool>(CPU)
                         .Case("ppc64le", true)
                         .Case("pwr9", true)
                         .Case("pwr8", true)
                         .Default(false);
   Features["float128"] = llvm::StringSwitch<bool>(CPU)
-                        .Case("pwr9", true)
-                        .Default(false);
+                             .Case("ppc64le", true)
+                             .Case("pwr9", true)
+                             .Case("pwr8", true)
+                             .Default(false);
 
   Features["spe"] = llvm::StringSwitch<bool>(CPU)
                         .Case("8548", true)
                         .Case("e500", true)
                         .Default(false);
 
   // Power10 includes all the same features as Power9 plus any features specific
   // to the Power10 core.
   if (CPU == "pwr10" || CPU == "power10") {
     initFeatureMap(Features, Diags, "pwr9", FeaturesVec);
     addP10SpecificFeatures(Features);
   }
 
   // Future CPU should include all of the features of Power 10 as well as any
   // additional features (yet to be determined) specific to it.
   if (CPU == "future") {
     initFeatureMap(Features, Diags, "pwr10", FeaturesVec);
     addFutureSpecificFeatures(Features);
   }
 
   if (!ppcUserFeaturesCheck(Diags, FeaturesVec))
     return false;
 
-  if (!(ArchDefs & ArchDefinePwr9) && (ArchDefs & ArchDefinePpcgr) &&
+  if (!(ArchDefs & (ArchDefinePwr9 | ArchDefinePwr8)) &&
+      (ArchDefs & ArchDefinePpcgr) &&
       llvm::find(FeaturesVec, "+float128") != FeaturesVec.end()) {
-    // We have __float128 on PPC but not power 9 and above.
+    // We have __float128 on PPC but not power 8 and above.
     Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfloat128" << CPU;
     return false;
   }
 
   if (!(ArchDefs & ArchDefinePwr10) &&
       llvm::find(FeaturesVec, "+mma") != FeaturesVec.end()) {
     // We have MMA on PPC but not power 10 and above.
     Diags.Report(diag::err_opt_not_valid_with_opt) << "-mmma" << CPU;
     return false;
   }
 
   return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 
 // Add any Power10 specific features.
 void PPCTargetInfo::addP10SpecificFeatures(

clang/test/Driver/ppc-f128-support-check.c

 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
 // RUN:   -mcpu=pwr9 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
 // RUN:   -mcpu=power9 %s 2>&1 | FileCheck %s --check-prefix=HASF128
-
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=pwr8 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   -mcpu=pwr8 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mcpu=pwr7 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   -mcpu=power8 %s 2>&1 | FileCheck %s --check-prefix=HASF128
 // RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
-// RUN:   -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
+// RUN:   %s 2>&1 | FileCheck %s --check-prefix=HASF128
+
+// RUN: not %clang -target powerpc64le-unknown-linux-gnu -fsyntax-only \
+// RUN:   -mcpu=pwr7 -mfloat128 %s 2>&1 | FileCheck %s --check-prefix=NOF128
 
 #ifdef __FLOAT128__
 static_assert(false, "__float128 enabled");
 #endif
 
 // HASF128: __float128 enabled
 // HASF128-NOT: option '-mfloat128' cannot be specified with
 // NOF128: option '-mfloat128' cannot be specified with