This is an archive of the discontinued LLVM Phabricator instance.

Differential D91757

[PowerPC] [FP128] Expand the cast operations as libcall for Power8
AbandonedPublic

Authored by steven.zhang on Nov 18 2020, 6:42 PM.

Details

Reviewers
qiucf
Group Reviewers
Restricted Project
Summary

The legalizer support expanding the cast operation(sint_to_fp, fp_to_sint, fp_extend, fp_round etc) as libcall. PowerPC need it to handle the IEEE Long double for Power8.

Diff Detail

Unit TestsFailed

TimeTest
380 mslinux > HWAddressSanitizer-x86_64.TestCases::sizes.cpp

Event Timeline

steven.zhang created this revision.Nov 18 2020, 6:42 PM
Herald added a project: Restricted Project. · View Herald TranscriptNov 18 2020, 6:42 PM
Herald added subscribers: kbarton, hiraditya, nemanjai. · View Herald Transcript
steven.zhang requested review of this revision.Nov 18 2020, 6:42 PM
steven.zhang added parent revisions: D91527: [PowerPC][FP128] Fix the incorrect calling convention for IEEE long double on Power8, D91331: Expand the fp_to_int/int_to_fp/fp_round/fp_extend as libcall for fp128.
Harbormaster completed remote builds in B79394: Diff 306281.Nov 18 2020, 6:43 PM
steven.zhang mentioned this in D91331: Expand the fp_to_int/int_to_fp/fp_round/fp_extend as libcall for fp128.Nov 18 2020, 6:43 PM
steven.zhang planned changes to this revision.Nov 19 2020, 5:41 AM
steven.zhang updated this revision to Diff 306640.Nov 20 2020, 3:10 AM
steven.zhang retitled this revision from [FP128] Expand the cast operations as libcall to [PowerPC] [FP128] Expand the cast operations as libcall for Power8.
steven.zhang edited the summary of this revision. (Show Details)
Herald added a subscriber: shchenz. · View Herald TranscriptNov 20 2020, 3:10 AM
steven.zhang removed reviewers: craig.topper, RKSimon, uweigand.Nov 20 2020, 3:11 AM
Harbormaster completed remote builds in B79588: Diff 306640.Nov 20 2020, 3:48 AM
steven.zhang abandoned this revision.Nov 24 2020, 9:09 PM

Abandon this patch as it is merge into D91331.

Revision Contents

PathSize
llvm/
lib/
Target/
PowerPC/
2 lines
29 lines
test/
CodeGen/
PowerPC/
218 lines
50 lines
3 lines

Diff 306640

llvm/lib/Target/PowerPC/PPCISelLowering.h

Show First 20 Lines • Show All 908 Lines • ▼ Show 20 Lines public:
bool isLegalICmpImmediate(int64_t Imm) const override; bool isLegalICmpImmediate(int64_t Imm) const override;
/// isLegalAddImmediate - Return true if the specified immediate is legal /// isLegalAddImmediate - Return true if the specified immediate is legal
/// add immediate, that is the target has add instructions which can /// add immediate, that is the target has add instructions which can
/// add a register and the immediate without having to materialize /// add a register and the immediate without having to materialize
/// the immediate into a register. /// the immediate into a register.
bool isLegalAddImmediate(int64_t Imm) const override; bool isLegalAddImmediate(int64_t Imm) const override;
bool isLegalizedAsLibCall(SDNode *N) const override;
/// isTruncateFree - Return true if it's free to truncate a value of /// isTruncateFree - Return true if it's free to truncate a value of
/// type Ty1 to type Ty2. e.g. On PPC it's free to truncate a i64 value in /// type Ty1 to type Ty2. e.g. On PPC it's free to truncate a i64 value in
/// register X1 to i32 by referencing its sub-register R1. /// register X1 to i32 by referencing its sub-register R1.
bool isTruncateFree(Type *Ty1, Type *Ty2) const override; bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
bool isTruncateFree(EVT VT1, EVT VT2) const override; bool isTruncateFree(EVT VT1, EVT VT2) const override;
bool isZExtFree(SDValue Val, EVT VT2) const override; bool isZExtFree(SDValue Val, EVT VT2) const override;
▲ Show 20 Lines • Show All 414 Lines • Show Last 20 Lines

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 1,191 Lines • ▼ Show 20 Lines if (Subtarget.hasP9Vector()) {
setOperationAction(ISD::FSIN, MVT::f128, Expand); setOperationAction(ISD::FSIN, MVT::f128, Expand);
setOperationAction(ISD::FCOS, MVT::f128, Expand); setOperationAction(ISD::FCOS, MVT::f128, Expand);
setOperationAction(ISD::FPOW, MVT::f128, Expand); setOperationAction(ISD::FPOW, MVT::f128, Expand);
setOperationAction(ISD::FPOWI, MVT::f128, Expand); setOperationAction(ISD::FPOWI, MVT::f128, Expand);
setOperationAction(ISD::FREM, MVT::f128, Expand); setOperationAction(ISD::FREM, MVT::f128, Expand);
setOperationAction(ISD::FSQRT, MVT::f128, Expand); setOperationAction(ISD::FSQRT, MVT::f128, Expand);
setOperationAction(ISD::FMA, MVT::f128, Expand); setOperationAction(ISD::FMA, MVT::f128, Expand);
setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand); setOperationAction(ISD::FCOPYSIGN, MVT::f128, Expand);
setTruncStoreAction(MVT::f128, MVT::f64, Expand);
setTruncStoreAction(MVT::f128, MVT::f32, Expand);
} }
if (Subtarget.hasP9Altivec()) { if (Subtarget.hasP9Altivec()) {
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom); setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v8i16, Custom);
setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom); setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v16i8, Custom);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Legal); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i8, Legal);
setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i16, Legal); setOperationAction(ISD::SIGN_EXTEND_INREG, MVT::v4i16, Legal);
▲ Show 20 Lines • Show All 166 Lines • ▼ Show 20 Lines
IsStrictFPEnabled = true; IsStrictFPEnabled = true;
// Let the subtarget (CPU) decide if a predictable select is more expensive // Let the subtarget (CPU) decide if a predictable select is more expensive
// than the corresponding branch. This information is used in CGP to decide // than the corresponding branch. This information is used in CGP to decide
// when to convert selects into branches. // when to convert selects into branches.
PredictableSelectIsExpensive = Subtarget.isPredictableSelectIsExpensive(); PredictableSelectIsExpensive = Subtarget.isPredictableSelectIsExpensive();
} }
bool PPCTargetLowering::isLegalizedAsLibCall(SDNode *N) const {
if (Subtarget.hasP9Vector())
return false;
unsigned SrcIdx = N->isStrictFPOpcode() ? 1 : 0;
EVT DestVT = N->getValueType(0);
switch (N->getOpcode()) {
case ISD::STRICT_FP_ROUND:
case ISD::STRICT_FP_TO_SINT:
case ISD::STRICT_FP_TO_UINT:
case ISD::FP_ROUND:
case ISD::FP_TO_SINT:
case ISD::FP_TO_UINT:
return N->getOperand(SrcIdx).getValueType() == MVT::f128;
case ISD::STRICT_SINT_TO_FP:
case ISD::STRICT_UINT_TO_FP:
case ISD::STRICT_FP_EXTEND:
case ISD::SINT_TO_FP:
case ISD::UINT_TO_FP:
case ISD::FP_EXTEND:
return DestVT == MVT::f128;
}
return false;
}
/// getMaxByValAlign - Helper for getByValTypeAlignment to determine /// getMaxByValAlign - Helper for getByValTypeAlignment to determine
/// the desired ByVal argument alignment. /// the desired ByVal argument alignment.
static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) { static void getMaxByValAlign(Type *Ty, Align &MaxAlign, Align MaxMaxAlign) {
if (MaxAlign == MaxMaxAlign) if (MaxAlign == MaxMaxAlign)
return; return;
if (VectorType *VTy = dyn_cast<VectorType>(Ty)) { if (VectorType *VTy = dyn_cast<VectorType>(Ty)) {
if (MaxMaxAlign >= 32 && if (MaxMaxAlign >= 32 &&
VTy->getPrimitiveSizeInBits().getFixedSize() >= 256) VTy->getPrimitiveSizeInBits().getFixedSize() >= 256)
▲ Show 20 Lines • Show All 15,626 Lines • Show Last 20 Lines

llvm/test/CodeGen/PowerPC/f128-conv.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \ ; RUN: llc -relocation-model=pic -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-vsr-nums-as-vr -verify-machineinstrs -ppc-asm-full-reg-names < %s \ ; RUN: -ppc-vsr-nums-as-vr -verify-machineinstrs -ppc-asm-full-reg-names < %s \
; RUN: | FileCheck %s ; RUN: | FileCheck %s
; RUN: llc -relocation-model=pic -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \ ; RUN: llc -relocation-model=pic -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown \
; RUN: -ppc-vsr-nums-as-vr -verify-machineinstrs -ppc-asm-full-reg-names < %s \ ; RUN: -ppc-vsr-nums-as-vr -verify-machineinstrs -ppc-asm-full-reg-names -ppc-set-fp128-legal < %s \
; RUN: | FileCheck %s -check-prefix=CHECK-P8 ; RUN: | FileCheck %s -check-prefix=CHECK-P8
@mem = global [5 x i64] [i64 56, i64 63, i64 3, i64 5, i64 6], align 8 @mem = global [5 x i64] [i64 56, i64 63, i64 3, i64 5, i64 6], align 8
@umem = global [5 x i64] [i64 560, i64 100, i64 34, i64 2, i64 5], align 8 @umem = global [5 x i64] [i64 560, i64 100, i64 34, i64 2, i64 5], align 8
@swMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4 @swMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4
@uwMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4 @uwMem = global [5 x i32] [i32 5, i32 2, i32 3, i32 4, i32 0], align 4
@uhwMem = local_unnamed_addr global [5 x i16] [i16 5, i16 2, i16 3, i16 4, i16 0], align 2 @uhwMem = local_unnamed_addr global [5 x i16] [i16 5, i16 2, i16 3, i16 4, i16 0], align 2
@ubMem = local_unnamed_addr global [5 x i8] c"\05\02\03\04\00", align 1 @ubMem = local_unnamed_addr global [5 x i8] c"\05\02\03\04\00", align 1
Show All 15 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = sitofp i64 %b to fp128 %conv = sitofp i64 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 33 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: mr r4, r5 ; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: bl __floattitf ; CHECK-P8-NEXT: bl __floattitf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = sitofp i128 %b to fp128 %conv = sitofp i128 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 23 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC0@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC0@toc@l(r4)
; CHECK-P8-NEXT: ld r4, 16(r4) ; CHECK-P8-NEXT: ld r4, 16(r4)
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i64, i64* getelementptr inbounds %0 = load i64, i64* getelementptr inbounds
([5 x i64], [5 x i64]* @mem, i64 0, i64 2), align 8 ([5 x i64], [5 x i64]* @mem, i64 0, i64 2), align 8
Show All 21 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r4, 0(r4) ; CHECK-P8-NEXT: ld r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i64, i64* %b, align 8 %0 = load i64, i64* %b, align 8
%conv = sitofp i64 %0 to fp128 %conv = sitofp i64 %0 to fp128
Show All 19 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = uitofp i64 %b to fp128 %conv = uitofp i64 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 33 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: mr r4, r5 ; CHECK-P8-NEXT: mr r4, r5
; CHECK-P8-NEXT: bl __floatuntitf ; CHECK-P8-NEXT: bl __floatuntitf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = uitofp i128 %b to fp128 %conv = uitofp i128 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 23 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC1@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC1@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC1@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC1@toc@l(r4)
; CHECK-P8-NEXT: ld r4, 32(r4) ; CHECK-P8-NEXT: ld r4, 32(r4)
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i64, i64* getelementptr inbounds %0 = load i64, i64* getelementptr inbounds
([5 x i64], [5 x i64]* @umem, i64 0, i64 4), align 8 ([5 x i64], [5 x i64]* @umem, i64 0, i64 4), align 8
Show All 21 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r4, 0(r4) ; CHECK-P8-NEXT: ld r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i64, i64* %b, align 8 %0 = load i64, i64* %b, align 8
%conv = uitofp i64 %0 to fp128 %conv = uitofp i64 %0 to fp128
Show All 24 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lis r5, 1 ; CHECK-P8-NEXT: lis r5, 1
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ori r5, r5, 7797 ; CHECK-P8-NEXT: ori r5, r5, 7797
; CHECK-P8-NEXT: ldx r4, r4, r5 ; CHECK-P8-NEXT: ldx r4, r4, r5
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: mr r5, r3
; CHECK-P8-NEXT: mr r3, r30 ; CHECK-P8-NEXT: mr r3, r30
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r5, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
i8* nocapture readonly %a) { i8* nocapture readonly %a) {
entry: entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 73333 %add.ptr = getelementptr inbounds i8, i8* %a, i64 73333
Show All 27 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lis r5, 1 ; CHECK-P8-NEXT: lis r5, 1
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ori r5, r5, 7797 ; CHECK-P8-NEXT: ori r5, r5, 7797
; CHECK-P8-NEXT: ldx r4, r4, r5 ; CHECK-P8-NEXT: ldx r4, r4, r5
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: mr r5, r3
; CHECK-P8-NEXT: mr r3, r30 ; CHECK-P8-NEXT: mr r3, r30
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r5, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
i8* nocapture readonly %a) { i8* nocapture readonly %a) {
entry: entry:
%add.ptr = getelementptr inbounds i8, i8* %a, i64 73333 %add.ptr = getelementptr inbounds i8, i8* %a, i64 73333
Show All 22 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = sitofp i32 %b to fp128 %conv = sitofp i32 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lwa r4, 0(r4) ; CHECK-P8-NEXT: lwa r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i32, i32* %b, align 4 %0 = load i32, i32* %b, align 4
%conv = sitofp i32 %0 to fp128 %conv = sitofp i32 %0 to fp128
Show All 25 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC2@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC2@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC2@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC2@toc@l(r4)
; CHECK-P8-NEXT: lwa r4, 12(r4) ; CHECK-P8-NEXT: lwa r4, 12(r4)
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i32, i32* getelementptr inbounds %0 = load i32, i32* getelementptr inbounds
([5 x i32], [5 x i32]* @swMem, i64 0, i64 3), align 4 ([5 x i32], [5 x i32]* @swMem, i64 0, i64 3), align 4
Show All 20 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = uitofp i32 %b to fp128 %conv = uitofp i32 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lwz r4, 0(r4) ; CHECK-P8-NEXT: lwz r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i32, i32* %b, align 4 %0 = load i32, i32* %b, align 4
%conv = uitofp i32 %0 to fp128 %conv = uitofp i32 %0 to fp128
Show All 25 Lines
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC3@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC3@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC3@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC3@toc@l(r4)
; CHECK-P8-NEXT: lwz r4, 12(r4) ; CHECK-P8-NEXT: lwz r4, 12(r4)
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i32, i32* getelementptr inbounds %0 = load i32, i32* getelementptr inbounds
([5 x i32], [5 x i32]* @uwMem, i64 0, i64 3), align 4 ([5 x i32], [5 x i32]* @uwMem, i64 0, i64 3), align 4
Show All 24 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lwz r3, 0(r5) ; CHECK-P8-NEXT: lwz r3, 0(r5)
; CHECK-P8-NEXT: add r3, r3, r4 ; CHECK-P8-NEXT: add r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32 ; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
i32 zeroext %b, i32* nocapture readonly %c) { i32 zeroext %b, i32* nocapture readonly %c) {
entry: entry:
%0 = load i32, i32* %c, align 4 %0 = load i32, i32* %c, align 4
Show All 21 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = uitofp i16 %b to fp128 %conv = uitofp i16 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 15 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lhz r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lhz r3, 0(r4) ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i16, i16* %b, align 2 %0 = load i16, i16* %b, align 2
%conv = uitofp i16 %0 to fp128 %conv = uitofp i16 %0 to fp128
Show All 18 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC4@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: addis r3, r2, .LC4@toc@ha ; CHECK-P8-NEXT: ld r4, .LC4@toc@l(r4)
; CHECK-P8-NEXT: ld r3, .LC4@toc@l(r3) ; CHECK-P8-NEXT: lhz r4, 6(r4)
; CHECK-P8-NEXT: lhz r3, 6(r3) ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i16, i16* getelementptr inbounds %0 = load i16, i16* getelementptr inbounds
([5 x i16], [5 x i16]* @uhwMem, i64 0, i64 3), align 2 ([5 x i16], [5 x i16]* @uhwMem, i64 0, i64 3), align 2
Show All 24 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lhz r3, 0(r5) ; CHECK-P8-NEXT: lhz r3, 0(r5)
; CHECK-P8-NEXT: add r3, r3, r4 ; CHECK-P8-NEXT: add r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32 ; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
i16* nocapture readonly %c) { i16* nocapture readonly %c) {
entry: entry:
%conv = zext i16 %b to i32 %conv = zext i16 %b to i32
Show All 23 Lines
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: mr r3, r4 ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = uitofp i8 %b to fp128 %conv = uitofp i8 %b to fp128
store fp128 %conv, fp128* %a, align 16 store fp128 %conv, fp128* %a, align 16
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: lbz r4, 0(r4)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lbz r3, 0(r4) ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i8, i8* %b, align 1 %0 = load i8, i8* %b, align 1
%conv = uitofp i8 %0 to fp128 %conv = uitofp i8 %0 to fp128
Show All 18 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC5@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: addis r3, r2, .LC5@toc@ha ; CHECK-P8-NEXT: ld r4, .LC5@toc@l(r4)
; CHECK-P8-NEXT: ld r3, .LC5@toc@l(r3) ; CHECK-P8-NEXT: lbz r4, 2(r4)
; CHECK-P8-NEXT: lbz r3, 2(r3) ; CHECK-P8-NEXT: mr r3, r4
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load i8, i8* getelementptr inbounds %0 = load i8, i8* getelementptr inbounds
([5 x i8], [5 x i8]* @ubMem, i64 0, i64 2), align 1 ([5 x i8], [5 x i8]* @ubMem, i64 0, i64 2), align 1
Show All 24 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: lbz r3, 0(r5) ; CHECK-P8-NEXT: lbz r3, 0(r5)
; CHECK-P8-NEXT: add r3, r3, r4 ; CHECK-P8-NEXT: add r3, r3, r4
; CHECK-P8-NEXT: clrldi r3, r3, 32 ; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
i8* nocapture readonly %c) { i8* nocapture readonly %c) {
entry: entry:
%conv = zext i8 %b to i32 %conv = zext i8 %b to i32
Show All 26 Lines
; ;
; CHECK-P8-LABEL: qpConv2dp: ; CHECK-P8-LABEL: qpConv2dp:
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r4, 8(r3)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfdf2 ; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
Show All 19 Lines
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4)
; CHECK-P8-NEXT: ld r5, 0(r4) ; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: ld r4, 8(r4)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfdf2 ; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: stfdx f1, 0, r30 ; CHECK-P8-NEXT: stfdx f1, 0, r30
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
Show All 26 Lines
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1) ; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha
; CHECK-P8-NEXT: mr r29, r3 ; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4)
; CHECK-P8-NEXT: ld r5, 0(r4) ; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: ld r4, 8(r4)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfdf2 ; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: sldi r3, r30, 3 ; CHECK-P8-NEXT: sldi r3, r30, 3
; CHECK-P8-NEXT: stfdx f1, r29, r3 ; CHECK-P8-NEXT: stfdx f1, r29, r3
; CHECK-P8-NEXT: addi r1, r1, 64 ; CHECK-P8-NEXT: addi r1, r1, 64
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
Show All 23 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r9, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r7, 8(r3) ; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: ld r8, 0(r4)
; CHECK-P8-NEXT: ld r6, 8(r4)
; CHECK-P8-NEXT: mr r30, r5 ; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: mr r3, r9
; CHECK-P8-NEXT: mr r4, r7
; CHECK-P8-NEXT: mr r5, r8
; CHECK-P8-NEXT: bl __addkf3 ; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfdf2 ; CHECK-P8-NEXT: bl __trunckfdf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: stfdx f1, 0, r30 ; CHECK-P8-NEXT: stfdx f1, 0, r30
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
Show All 21 Lines
; ;
; CHECK-P8-LABEL: qpConv2sp: ; CHECK-P8-LABEL: qpConv2sp:
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r4, 8(r3)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfsf2 ; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
Show All 20 Lines
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC6@toc@ha
; CHECK-P8-NEXT: mr r30, r3 ; CHECK-P8-NEXT: mr r30, r3
; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC6@toc@l(r4)
; CHECK-P8-NEXT: ld r5, 0(r4) ; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: ld r4, 8(r4)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfsf2 ; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: stfsx f1, 0, r30 ; CHECK-P8-NEXT: stfsx f1, 0, r30
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
Show All 27 Lines
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1) ; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha ; CHECK-P8-NEXT: addis r4, r2, .LC7@toc@ha
; CHECK-P8-NEXT: mr r29, r3 ; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4) ; CHECK-P8-NEXT: ld r4, .LC7@toc@l(r4)
; CHECK-P8-NEXT: ld r5, 48(r4) ; CHECK-P8-NEXT: addi r4, r4, 48
; CHECK-P8-NEXT: ld r4, 56(r4) ; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __trunckfsf2 ; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: sldi r3, r30, 2 ; CHECK-P8-NEXT: sldi r3, r30, 2
; CHECK-P8-NEXT: stfsx f1, r29, r3 ; CHECK-P8-NEXT: stfsx f1, r29, r3
; CHECK-P8-NEXT: addi r1, r1, 64 ; CHECK-P8-NEXT: addi r1, r1, 64
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
Show All 24 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r9, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r7, 8(r3) ; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: ld r8, 0(r4)
; CHECK-P8-NEXT: ld r6, 8(r4)
; CHECK-P8-NEXT: mr r30, r5 ; CHECK-P8-NEXT: mr r30, r5
; CHECK-P8-NEXT: mr r3, r9
; CHECK-P8-NEXT: mr r4, r7
; CHECK-P8-NEXT: mr r5, r8
; CHECK-P8-NEXT: bl __addkf3 ; CHECK-P8-NEXT: bl __addkf3
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: bl __trunckfsf2 ; CHECK-P8-NEXT: bl __trunckfsf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: stfsx f1, 0, r30 ; CHECK-P8-NEXT: stfsx f1, 0, r30
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lfdx f1, 0, r3 ; CHECK-P8-NEXT: lfdx f1, 0, r3
; CHECK-P8-NEXT: bl __extenddfkf2 ; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r5, r2, .LC8@toc@ha ; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-P8-NEXT: ld r5, .LC8@toc@l(r5) ; CHECK-P8-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-P8-NEXT: std r4, 8(r5) ; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: std r3, 0(r5)
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load double, double* %a, align 8 %0 = load double, double* %a, align 8
%conv = fpext double %0 to fp128 %conv = fpext double %0 to fp128
store fp128 %conv, fp128* @f128Glob, align 16 store fp128 %conv, fp128* @f128Glob, align 16
Show All 18 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 3 ; CHECK-P8-NEXT: sldi r4, r4, 3
; CHECK-P8-NEXT: lfdx f1, r3, r4 ; CHECK-P8-NEXT: lfdx f1, r3, r4
; CHECK-P8-NEXT: bl __extenddfkf2 ; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r5, r2, .LC8@toc@ha ; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-P8-NEXT: ld r5, .LC8@toc@l(r5) ; CHECK-P8-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-P8-NEXT: std r4, 8(r5) ; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: std r3, 0(r5)
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%idxprom = sext i32 %idx to i64 %idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds double, double* %a, i64 %idxprom %arrayidx = getelementptr inbounds double, double* %a, i64 %idxprom
%0 = load double, double* %arrayidx, align 8 %0 = load double, double* %arrayidx, align 8
Show All 22 Lines
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1) ; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r29, r3 ; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: bl __extenddfkf2 ; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: sldi r5, r30, 4 ; CHECK-P8-NEXT: sldi r3, r30, 4
; CHECK-P8-NEXT: stdux r3, r29, r5 ; CHECK-P8-NEXT: stvx v2, r29, r3
; CHECK-P8-NEXT: std r4, 8(r29)
; CHECK-P8-NEXT: addi r1, r1, 64 ; CHECK-P8-NEXT: addi r1, r1, 64
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fpext double %a to fp128 %conv = fpext double %a to fp128
Show All 19 Lines
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: bl __extenddfkf2 ; CHECK-P8-NEXT: bl __extenddfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fpext double %a to fp128 %conv = fpext double %a to fp128
store fp128 %conv, fp128* %res, align 16 store fp128 %conv, fp128* %res, align 16
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: lfsx f1, 0, r3 ; CHECK-P8-NEXT: lfsx f1, 0, r3
; CHECK-P8-NEXT: bl __extendsfkf2 ; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r5, r2, .LC8@toc@ha ; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-P8-NEXT: ld r5, .LC8@toc@l(r5) ; CHECK-P8-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-P8-NEXT: std r4, 8(r5) ; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: std r3, 0(r5)
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load float, float* %a, align 4 %0 = load float, float* %a, align 4
%conv = fpext float %0 to fp128 %conv = fpext float %0 to fp128
store fp128 %conv, fp128* @f128Glob, align 16 store fp128 %conv, fp128* @f128Glob, align 16
Show All 18 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: sldi r4, r4, 2 ; CHECK-P8-NEXT: sldi r4, r4, 2
; CHECK-P8-NEXT: lfsx f1, r3, r4 ; CHECK-P8-NEXT: lfsx f1, r3, r4
; CHECK-P8-NEXT: bl __extendsfkf2 ; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addis r5, r2, .LC8@toc@ha ; CHECK-P8-NEXT: addis r3, r2, .LC8@toc@ha
; CHECK-P8-NEXT: ld r5, .LC8@toc@l(r5) ; CHECK-P8-NEXT: ld r3, .LC8@toc@l(r3)
; CHECK-P8-NEXT: std r4, 8(r5) ; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: std r3, 0(r5)
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%idxprom = sext i32 %idx to i64 %idxprom = sext i32 %idx to i64
%arrayidx = getelementptr inbounds float, float* %a, i64 %idxprom %arrayidx = getelementptr inbounds float, float* %a, i64 %idxprom
%0 = load float, float* %arrayidx, align 4 %0 = load float, float* %arrayidx, align 4
Show All 22 Lines
; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r29, -24(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -64(r1) ; CHECK-P8-NEXT: stdu r1, -64(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r29, r3 ; CHECK-P8-NEXT: mr r29, r3
; CHECK-P8-NEXT: bl __extendsfkf2 ; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: sldi r5, r30, 4 ; CHECK-P8-NEXT: sldi r3, r30, 4
; CHECK-P8-NEXT: stdux r3, r29, r5 ; CHECK-P8-NEXT: stvx v2, r29, r3
; CHECK-P8-NEXT: std r4, 8(r29)
; CHECK-P8-NEXT: addi r1, r1, 64 ; CHECK-P8-NEXT: addi r1, r1, 64
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r29, -24(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fpext float %a to fp128 %conv = fpext float %a to fp128
Show All 19 Lines
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: bl __extendsfkf2 ; CHECK-P8-NEXT: bl __extendsfkf2
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fpext float %a to fp128 %conv = fpext float %a to fp128
store fp128 %conv, fp128* %res, align 16 store fp128 %conv, fp128* %res, align 16
Show All 21 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxws f0, f1 ; CHECK-P8-NEXT: xscvdpsxws f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprwz r3, f0 ; CHECK-P8-NEXT: mffprwz r3, f0
; CHECK-P8-NEXT: extsw r3, r3 ; CHECK-P8-NEXT: extsw r3, r3
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptosi double %val to i32 %conv = fptosi double %val to i32
%conv1 = sitofp i32 %conv to fp128 %conv1 = sitofp i32 %conv to fp128
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxds f0, f1 ; CHECK-P8-NEXT: xscvdpsxds f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprd r3, f0 ; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptosi double %val to i64 %conv = fptosi double %val to i64
%conv1 = sitofp i64 %conv to fp128 %conv1 = sitofp i64 %conv to fp128
Show All 21 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxws f0, f1 ; CHECK-P8-NEXT: xscvdpsxws f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprwz r3, f0 ; CHECK-P8-NEXT: mffprwz r3, f0
; CHECK-P8-NEXT: extsw r3, r3 ; CHECK-P8-NEXT: extsw r3, r3
; CHECK-P8-NEXT: bl __floatsikf ; CHECK-P8-NEXT: bl __floatsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptosi float %val to i32 %conv = fptosi float %val to i32
%conv1 = sitofp i32 %conv to fp128 %conv1 = sitofp i32 %conv to fp128
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpsxds f0, f1 ; CHECK-P8-NEXT: xscvdpsxds f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprd r3, f0 ; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: bl __floatdikf ; CHECK-P8-NEXT: bl __floatdikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptosi float %val to i64 %conv = fptosi float %val to i64
%conv1 = sitofp i64 %conv to fp128 %conv1 = sitofp i64 %conv to fp128
Show All 21 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxws f0, f1 ; CHECK-P8-NEXT: xscvdpuxws f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprwz r3, f0 ; CHECK-P8-NEXT: mffprwz r3, f0
; CHECK-P8-NEXT: clrldi r3, r3, 32 ; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptoui double %val to i32 %conv = fptoui double %val to i32
%conv1 = uitofp i32 %conv to fp128 %conv1 = uitofp i32 %conv to fp128
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxds f0, f1 ; CHECK-P8-NEXT: xscvdpuxds f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprd r3, f0 ; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptoui double %val to i64 %conv = fptoui double %val to i64
%conv1 = uitofp i64 %conv to fp128 %conv1 = uitofp i64 %conv to fp128
Show All 21 Lines
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxws f0, f1 ; CHECK-P8-NEXT: xscvdpuxws f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprwz r3, f0 ; CHECK-P8-NEXT: mffprwz r3, f0
; CHECK-P8-NEXT: clrldi r3, r3, 32 ; CHECK-P8-NEXT: clrldi r3, r3, 32
; CHECK-P8-NEXT: bl __floatunsikf ; CHECK-P8-NEXT: bl __floatunsikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptoui float %val to i32 %conv = fptoui float %val to i32
%conv1 = uitofp i32 %conv to fp128 %conv1 = uitofp i32 %conv to fp128
Show All 19 Lines
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: xscvdpuxds f0, f1 ; CHECK-P8-NEXT: xscvdpuxds f0, f1
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mffprd r3, f0 ; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: bl __floatundikf ; CHECK-P8-NEXT: bl __floatundikf
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r4, 8(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r3, 0(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%conv = fptoui float %val to i64 %conv = fptoui float %val to i64
%conv1 = uitofp i64 %conv to fp128 %conv1 = uitofp i64 %conv to fp128
Show All 20 Lines
; ;
; CHECK-P8-LABEL: qpConv2i128: ; CHECK-P8-LABEL: qpConv2i128:
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r4, 8(r3)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __fixtfti ; CHECK-P8-NEXT: bl __fixtfti
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
Show All 20 Lines
; ;
; CHECK-P8-LABEL: qpConv2ui128: ; CHECK-P8-LABEL: qpConv2ui128:
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -32(r1) ; CHECK-P8-NEXT: stdu r1, -32(r1)
; CHECK-P8-NEXT: .cfi_def_cfa_offset 32 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 32
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r4, 8(r3)
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: bl __fixunstfti ; CHECK-P8-NEXT: bl __fixunstfti
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: addi r1, r1, 32 ; CHECK-P8-NEXT: addi r1, r1, 32
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%conv = fptoui fp128 %0 to i128 %conv = fptoui fp128 %0 to i128
ret i128 %conv ret i128 %conv
} }

llvm/test/CodeGen/PowerPC/f128-rounding.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \ ; RUN: llc -mcpu=pwr9 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s ; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s
; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \ ; RUN: llc -mcpu=pwr8 -mtriple=powerpc64le-unknown-unknown -verify-machineinstrs \
; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s | FileCheck %s \ ; RUN: -ppc-vsr-nums-as-vr -ppc-asm-full-reg-names < %s -ppc-set-fp128-legal | FileCheck %s \
; RUN: -check-prefix=CHECK-P8 ; RUN: -check-prefix=CHECK-P8
define void @qp_trunc(fp128* nocapture readonly %a, fp128* nocapture %res) { define void @qp_trunc(fp128* nocapture readonly %a, fp128* nocapture %res) {
; CHECK-LABEL: qp_trunc: ; CHECK-LABEL: qp_trunc:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxv v2, 0(r3) ; CHECK-NEXT: lxv v2, 0(r3)
; CHECK-NEXT: xsrqpi 1, v2, v2, 1 ; CHECK-NEXT: xsrqpi 1, v2, v2, 1
; CHECK-NEXT: stxv v2, 0(r4) ; CHECK-NEXT: stxv v2, 0(r4)
; CHECK-NEXT: blr ; CHECK-NEXT: blr
; ;
; CHECK-P8-LABEL: qp_trunc: ; CHECK-P8-LABEL: qp_trunc:
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl truncl ; CHECK-P8-NEXT: bl truncl
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.trunc.f128(fp128 %0) %1 = tail call fp128 @llvm.trunc.f128(fp128 %0)
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl rintl ; CHECK-P8-NEXT: bl rintl
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.rint.f128(fp128 %0) %1 = tail call fp128 @llvm.rint.f128(fp128 %0)
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl nearbyintl ; CHECK-P8-NEXT: bl nearbyintl
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.nearbyint.f128(fp128 %0) %1 = tail call fp128 @llvm.nearbyint.f128(fp128 %0)
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl roundl ; CHECK-P8-NEXT: bl roundl
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.round.f128(fp128 %0) %1 = tail call fp128 @llvm.round.f128(fp128 %0)
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl floorl ; CHECK-P8-NEXT: bl floorl
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.floor.f128(fp128 %0) %1 = tail call fp128 @llvm.floor.f128(fp128 %0)
Show All 14 Lines
; CHECK-P8: # %bb.0: # %entry ; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mflr r0 ; CHECK-P8-NEXT: mflr r0
; CHECK-P8-NEXT: .cfi_def_cfa_offset 48 ; CHECK-P8-NEXT: .cfi_def_cfa_offset 48
; CHECK-P8-NEXT: .cfi_offset lr, 16 ; CHECK-P8-NEXT: .cfi_offset lr, 16
; CHECK-P8-NEXT: .cfi_offset r30, -16 ; CHECK-P8-NEXT: .cfi_offset r30, -16
; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill ; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
; CHECK-P8-NEXT: std r0, 16(r1) ; CHECK-P8-NEXT: std r0, 16(r1)
; CHECK-P8-NEXT: stdu r1, -48(r1) ; CHECK-P8-NEXT: stdu r1, -48(r1)
; CHECK-P8-NEXT: ld r5, 0(r3) ; CHECK-P8-NEXT: lvx v2, 0, r3
; CHECK-P8-NEXT: ld r6, 8(r3)
; CHECK-P8-NEXT: mr r30, r4 ; CHECK-P8-NEXT: mr r30, r4
; CHECK-P8-NEXT: mr r3, r5
; CHECK-P8-NEXT: mr r4, r6
; CHECK-P8-NEXT: bl ceill ; CHECK-P8-NEXT: bl ceill
; CHECK-P8-NEXT: nop ; CHECK-P8-NEXT: nop
; CHECK-P8-NEXT: std r3, 0(r30) ; CHECK-P8-NEXT: stvx v2, 0, r30
; CHECK-P8-NEXT: std r4, 8(r30)
; CHECK-P8-NEXT: addi r1, r1, 48 ; CHECK-P8-NEXT: addi r1, r1, 48
; CHECK-P8-NEXT: ld r0, 16(r1) ; CHECK-P8-NEXT: ld r0, 16(r1)
; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload ; CHECK-P8-NEXT: ld r30, -16(r1) # 8-byte Folded Reload
; CHECK-P8-NEXT: mtlr r0 ; CHECK-P8-NEXT: mtlr r0
; CHECK-P8-NEXT: blr ; CHECK-P8-NEXT: blr
entry: entry:
%0 = load fp128, fp128* %a, align 16 %0 = load fp128, fp128* %a, align 16
%1 = tail call fp128 @llvm.ceil.f128(fp128 %0) %1 = tail call fp128 @llvm.ceil.f128(fp128 %0)
store fp128 %1, fp128* %res, align 16 store fp128 %1, fp128* %res, align 16
ret void ret void
} }
declare fp128 @llvm.ceil.f128(fp128 %Val) declare fp128 @llvm.ceil.f128(fp128 %Val)

llvm/test/CodeGen/PowerPC/fp-strict-conv-f128.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ ; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s -mtriple=powerpc64-unknown-linux -mcpu=pwr8 | FileCheck %s\ ; RUN: < %s -mtriple=powerpc64-unknown-linux -mcpu=pwr8 | FileCheck %s\
; RUN: -check-prefix=P8 ; RUN: -check-prefix=P8
; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ ; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 | FileCheck %s \ ; RUN: < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr9 | FileCheck %s \
; RUN: -check-prefix=P9 ; RUN: -check-prefix=P9
; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \ ; RUN: llc -verify-machineinstrs -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr \
; RUN: < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -mattr=-vsx \ ; RUN: < %s -mtriple=powerpc64le-unknown-linux -mcpu=pwr8 -ppc-set-fp128-legal -mattr=-vsx \
; RUN: | FileCheck %s -check-prefix=NOVSX ; RUN: | FileCheck %s -check-prefix=NOVSX
declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata)
declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata)
declare i32 @llvm.experimental.constrained.fptosi.i32.ppcf128(ppc_fp128, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.ppcf128(ppc_fp128, metadata)
▲ Show 20 Lines • Show All 658 Lines • ▼ Show 20 Lines
; ;
; NOVSX-LABEL: i32_to_q: ; NOVSX-LABEL: i32_to_q:
; NOVSX: # %bb.0: # %entry ; NOVSX: # %bb.0: # %entry
; NOVSX-NEXT: mflr r0 ; NOVSX-NEXT: mflr r0
; NOVSX-NEXT: std r0, 16(r1) ; NOVSX-NEXT: std r0, 16(r1)
; NOVSX-NEXT: stdu r1, -32(r1) ; NOVSX-NEXT: stdu r1, -32(r1)
; NOVSX-NEXT: .cfi_def_cfa_offset 32 ; NOVSX-NEXT: .cfi_def_cfa_offset 32
; NOVSX-NEXT: .cfi_offset lr, 16 ; NOVSX-NEXT: .cfi_offset lr, 16
; NOVSX-NEXT: clrldi r3, r3, 32
; NOVSX-NEXT: bl __floatsikf ; NOVSX-NEXT: bl __floatsikf
; NOVSX-NEXT: nop ; NOVSX-NEXT: nop
; NOVSX-NEXT: addi r1, r1, 32 ; NOVSX-NEXT: addi r1, r1, 32
; NOVSX-NEXT: ld r0, 16(r1) ; NOVSX-NEXT: ld r0, 16(r1)
; NOVSX-NEXT: mtlr r0 ; NOVSX-NEXT: mtlr r0
; NOVSX-NEXT: blr ; NOVSX-NEXT: blr
entry: entry:
%conv = tail call fp128 @llvm.experimental.constrained.sitofp.f128.i32(i32 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #0 %conv = tail call fp128 @llvm.experimental.constrained.sitofp.f128.i32(i32 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
▲ Show 20 Lines • Show All 121 Lines • Show Last 20 Lines