[X86] Include %rip for 32-bit RIP-relative relocs for x32

[hvdijk]

Summary

%rip was only included for 64-bit RIP-relative relocations, but needs to be included for 32-bit as well.

[MaskRay]

This is correct. Probably worth mentioning in the subject that this is for x32. I wonder whether a fastisel-* test file is more suitable.

[hvdijk]

In D91339#2392968, @MaskRay wrote:

This is correct. Probably worth mentioning in the subject that this is for x32.

Sure, added. I had also wrongly written "PIC-relative" which should clearly be "RIP-relative", edited that as well.

I wonder whether a fastisel-* test file is more suitable.

I had started with a new test, but switched to extending pic.ll instead because it was more thorough. I can copy pic.ll to fastisel-pic.ll and only check x32 fastisel in there, if preferred.

[MaskRay]

In D91339#2393183, @hvdijk wrote:

In D91339#2392968, @MaskRay wrote:

This is correct. Probably worth mentioning in the subject that this is for x32.

Sure, added. I had also wrongly written "PIC-relative" which should clearly be "RIP-relative", edited that as well.

I wonder whether a fastisel-* test file is more suitable.

I had started with a new test, but switched to extending pic.ll instead because it was more thorough. I can copy pic.ll to fastisel-pic.ll and only check x32 fastisel in there, if preferred.

It may be fine. Let's wait a bit for other reviewers

[RKSimon]

LGTM - @hvdijk do you have commit access yet?

[hvdijk]

In D91339#2409588, @RKSimon wrote:

LGTM - @hvdijk do you have commit access yet?

I don't. If you're willing to commit it, I'd appreciate it, author info is "Harald van Dijk <[e-mail]>". Otherwise I'm pretty sure I can pester someone about it after the weekend :)

[RKSimon]

@hvdijk On EXPENSIVE_CHECKS builds I'm seeing a build failure in pic.ll - please can you take a look?

Command Output (stdout):
--
$ ":" "RUN: at line 1"
$ "e:\llvm\ninja\bin\llc.exe" "-mcpu=generic" "-mtriple=i686-pc-linux-gnu" "-relocation-model=pic" "-asm-verbose=false" "-post-RA-scheduler=false"
$ "e:\llvm\ninja\bin\filecheck.exe" "E:\llvm\llvm-project\llvm\test\CodeGen\X86\pic.ll" "-check-prefixes=CHECK,CHECK-I686"
$ ":" "RUN: at line 2"
$ "e:\llvm\ninja\bin\llc.exe" "-mcpu=generic" "-mtriple=x86_64-pc-linux-gnux32" "-relocation-model=pic" "-asm-verbose=false" "-post-RA-scheduler=false"
# command stderr:

# After X86 Fixup SetCC
# Machine code for function test6: IsSSA, TracksLiveness
Constant Pool:
  cp#0: [double 1.234560e+02, double 4.561230e+02], align=8
Function Live Ins: $edi in %0

bb.0.entry:
  liveins: $edi
  %0:gr32 = COPY $edi
  %5:gr32 = MOV32r0 implicit-def $eflags
  TEST32rr %0:gr32, %0:gr32, implicit-def $eflags
  %1:gr8 = SETCCr 4, implicit $eflags
  %6:gr32 = INSERT_SUBREG %5:gr32(tied-def 0), %1:gr8, %subreg.sub_8bit
  %3:gr32 = LEA64_32r $rip, 1, $noreg, %const.0, $noreg
  %4:fr64 = MOVSDrm_alt killed %3:gr32, 8, killed %6:gr32, 0, $noreg :: (load 8 from constant-pool)
  $xmm0 = COPY %4:fr64
  RET 0, $xmm0

# End machine code for function test6.

*** Bad machine code: Illegal virtual register for instruction ***
- function:    test6
- basic block: %bb.0 entry (0x26ed631e9a0)
- instruction: %4:fr64 = MOVSDrm_alt killed %3:gr32, 8, killed %6:gr32, 0, $noreg :: (load 8 from constant-pool)
- operand 3:   killed %6:gr32
Expected a GR32_NOSP register, but got a GR32 register
LLVM ERROR: Found 1 machine code errors.

[hvdijk]

In D91339#2409998, @RKSimon wrote:

@hvdijk On EXPENSIVE_CHECKS builds I'm seeing a build failure in pic.ll - please can you take a look?

Sorry about that, already doing so. The code change in here is correct, I think, but there are two independent pre-existing problems that are exposed by the test when expensive checks are enabled. For one I have opened https://reviews.llvm.org/D91924, I am still looking for the right way to fix the other one.

[hvdijk]

I have now also opened https://reviews.llvm.org/D91933 hoping to fix the other pre-existing issue. With both https://reviews.llvm.org/D91924 and that, the test in here passes even when expensive checks are enabled.

[RKSimon]

Thanks - please can you add -verify-machineinstrs to the pic.ll command lines as part of either of those patches?

[hvdijk]

In D91339#2410165, @RKSimon wrote:

Thanks - please can you add -verify-machineinstrs to the pic.ll command lines as part of either of those patches?

Sure, added to D91933.

[pengfei]

llvm/test/CodeGen/X86/pic.ll

25

Sorry for not finding it in time.
The prefix CHECK-DAG-X32 seems not been used.

[hvdijk]

llvm/test/CodeGen/X86/pic.ll

25

Good spot! I meant CHECK-X32-DAG here, and with that, the test still passes. Should I submit that fix as a standalone diff for new review?

[pengfei]

llvm/test/CodeGen/X86/pic.ll

25

FileCheck doesn't check unused prefix for now. I'm not sure. Maybe you can fix it in the patch you fixing builtbot fail.

[hvdijk]

llvm/test/CodeGen/X86/pic.ll

25

Sure, I've added it there.

[dstenb]

What is the status of the expensive check failure? It has been present for five days now. Should we revert this patch until that is resolved?

(However, I don't know if we are more permissive with failures in the expensive checks jobs than other jobs.)

[hvdijk]

In D91339#2417918, @dstenb wrote:

What is the status of the expensive check failure? It has been present for five days now.

The fixes are ready but have not been approved yet. They are D91924 and D91933.

Should we revert this patch until that is resolved?

The test could be disabled for x32 until those other fixes go in though, if wanted. There should be no need to revert the functional part of this patch: the breakage is unrelated to it, this is merely something that was previously not covered by any tests.

[RKSimon]

@hvdijk It'd be very useful if you got commit access - https://llvm.org/docs/DeveloperPolicy.html#obtaining-commit-access

llvm/lib/Target/X86/X86FastISel.cpp

if (!Subtarget->isPICStyleRIPRel() ||
         StubAM.GVOpFlags = GVFlags;
 
         // Prepare for inserting code in the local-value area.
         SavePoint SaveInsertPt = enterLocalValueArea();
 
         if (TLI.getPointerTy(DL) == MVT::i64) {
           Opc = X86::MOV64rm;
           RC  = &X86::GR64RegClass;
-
-          if (Subtarget->isPICStyleRIPRel())
-            StubAM.Base.Reg = X86::RIP;
         } else {
           Opc = X86::MOV32rm;
           RC  = &X86::GR32RegClass;
         }
 
+        if (Subtarget->isPICStyleRIPRel())
+          StubAM.Base.Reg = X86::RIP;
+
         LoadReg = createResultReg(RC);
         MachineInstrBuilder LoadMI =
           BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc), LoadReg);
         addFullAddress(LoadMI, StubAM);
 
         // Ok, back to normal mode.
         leaveLocalValueArea(SaveInsertPt);
 

llvm/test/CodeGen/X86/pic.ll

-; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck %s -check-prefix=LINUX
+; RUN: llc < %s -mcpu=generic -mtriple=i686-pc-linux-gnu -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck %s -check-prefixes=CHECK,CHECK-I686
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false | FileCheck %s -check-prefixes=CHECK,CHECK-X32
+; RUN: llc < %s -mcpu=generic -mtriple=x86_64-pc-linux-gnux32 -relocation-model=pic -asm-verbose=false -post-RA-scheduler=false -fast-isel | FileCheck %s -check-prefixes=CHECK,CHECK-X32
 
 @ptr = external global i32* 
 @dst = external global i32 
 @src = external global i32 
 
 define void @test0() nounwind {
 entry:
     store i32* @dst, i32** @ptr
     %tmp.s = load i32, i32* @src
     store i32 %tmp.s, i32* @dst
     ret void
     
-; LINUX-LABEL:    test0:
-; LINUX:  calll .L0$pb
-; LINUX-NEXT: .L0$pb:
-; LINUX-NEXT: popl
-; LINUX:  addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb),
-; LINUX:  movl  dst@GOT(%eax),
-; LINUX:  movl  ptr@GOT(%eax),
-; LINUX:  movl  src@GOT(%eax),
-; LINUX:  ret
+; CHECK-LABEL:  test0:
+; CHECK-I686: calll .L0$pb
+; CHECK-I686-NEXT:  .L0$pb:
+; CHECK-I686-NEXT:  popl
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L0$pb),
+; CHECK-I686: movl  dst@GOT(%eax),
+; CHECK-I686: movl  ptr@GOT(%eax),
+; CHECK-I686: movl  src@GOT(%eax),
+; CHECK-I686: ret
+; CHECK-DAG-X32:  movl  dst@GOTPCREL(%rip),
+; CHECK-DAG-X32:  movl  ptr@GOTPCREL(%rip),
+; CHECK-DAG-X32:  movl  src@GOTPCREL(%rip),
+; CHECK-X32:  retq
 }
 
 @ptr2 = global i32* null
 @dst2 = global i32 0
 @src2 = global i32 0
 
 define void @test1() nounwind {
 entry:
     store i32* @dst2, i32** @ptr2
     %tmp.s = load i32, i32* @src2
     store i32 %tmp.s, i32* @dst2
     ret void
     
-; LINUX-LABEL: test1:
-; LINUX:  calll .L1$pb
-; LINUX-NEXT: .L1$pb:
-; LINUX-NEXT: popl
-; LINUX:  addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax
-; LINUX:  movl  dst2@GOT(%eax),
-; LINUX:  movl  ptr2@GOT(%eax),
-; LINUX:  movl  src2@GOT(%eax),
-; LINUX:  ret
+; CHECK-LABEL:  test1:
+; CHECK-I686: calll .L1$pb
+; CHECK-I686-NEXT:  .L1$pb:
+; CHECK-I686-NEXT:  popl
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L1$pb), %eax
+; CHECK-I686: movl  dst2@GOT(%eax),
+; CHECK-I686: movl  ptr2@GOT(%eax),
+; CHECK-I686: movl  src2@GOT(%eax),
+; CHECK-I686: ret
+; CHECK-DAG-X32:  movl  dst2@GOTPCREL(%rip),
+; CHECK-DAG-X32:  movl  ptr2@GOTPCREL(%rip),
+; CHECK-DAG-X32:  movl  src2@GOTPCREL(%rip),
+; CHECK-X32:  retq
 
 }
 
 declare i8* @malloc(i32)
 
 define void @test2() nounwind {
 entry:
     %ptr = call i8* @malloc(i32 40)
     ret void
-; LINUX-LABEL: test2:
-; LINUX:  pushl %ebx
-; LINUX-NEXT:   subl  $8, %esp
-; LINUX-NEXT:   calll .L2$pb
-; LINUX-NEXT: .L2$pb:
-; LINUX-NEXT:   popl  %ebx
-; LINUX:  addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %ebx
-; LINUX:  movl  $40, (%esp)
-; LINUX:  calll malloc@PLT
-; LINUX:  addl  $8, %esp
-; LINUX:  popl  %ebx
-; LINUX:  ret
+; CHECK-LABEL:  test2:
+; CHECK-I686: pushl %ebx
+; CHECK-I686-NEXT:  subl  $8, %esp
+; CHECK-I686-NEXT:  calll .L2$pb
+; CHECK-I686-NEXT:  .L2$pb:
+; CHECK-I686-NEXT:  popl  %ebx
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L2$pb), %ebx
+; CHECK-I686: movl  $40, (%esp)
+; CHECK-I686: calll malloc@PLT
+; CHECK-I686: addl  $8, %esp
+; CHECK-I686: popl  %ebx
+; CHECK-I686: ret
+; CHECK-X32:  pushq %rax
+; CHECK-X32:  movl  $40, %edi
+; CHECK-X32:  callq malloc@PLT
+; CHECK-X32:  popq  %rax
+; CHECK-X32:  retq
+
 }
 
 @pfoo = external global void(...)* 
 
 define void @test3() nounwind {
 entry:
     %tmp = call void(...)*(...) @afoo()
     store void(...)* %tmp, void(...)** @pfoo
     %tmp1 = load void(...)*, void(...)** @pfoo
     call void(...) %tmp1()
     ret void
-; LINUX-LABEL: test3:
-; LINUX:  calll .L3$pb
-; LINUX-NEXT: .L3$pb:
-; LINUX:  popl
-; LINUX:  addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %[[REG3:e..]]
-; LINUX:  calll afoo@PLT
-; LINUX:  movl  pfoo@GOT(%[[REG3]]),
-; LINUX:  calll *
+; CHECK-LABEL:  test3:
+; CHECK-I686: calll .L3$pb
+; CHECK-I686-NEXT:  .L3$pb:
+; CHECK-I686: popl
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L3$pb), %[[REG3:e..]]
+; CHECK-I686: calll afoo@PLT
+; CHECK-I686: movl  pfoo@GOT(%[[REG3]]),
+; CHECK-I686: calll *
+; CHECK-X32:  callq afoo@PLT
+; CHECK-X32:  movl  pfoo@GOTPCREL(%rip),
+; CHECK-X32:  callq *
 }
 
 declare void(...)* @afoo(...)
 
 define void @test4() nounwind {
 entry:
     call void(...) @foo()
     ret void
-; LINUX-LABEL: test4:
-; LINUX: calll  .L4$pb
-; LINUX: popl %ebx
-; LINUX: addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L4$pb), %ebx
-; LINUX: calll  foo@PLT
+; CHECK-LABEL:  test4:
+; CHECK-I686: calll .L4$pb
+; CHECK-I686: popl  %ebx
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L4$pb), %ebx
+; CHECK-I686: calll foo@PLT
+; CHECK-X32:  callq foo@PLT
+
 }
 
 declare void @foo(...)
 
 
 @ptr6 = internal global i32* null
 @dst6 = internal global i32 0
 @src6 = internal global i32 0
 
 define void @test5() nounwind {
 entry:
     store i32* @dst6, i32** @ptr6
     %tmp.s = load i32, i32* @src6
     store i32 %tmp.s, i32* @dst6
     ret void
     
-; LINUX-LABEL: test5:
-; LINUX:  calll .L5$pb
-; LINUX-NEXT: .L5$pb:
-; LINUX-NEXT:   popl  %eax
-; LINUX:  addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L5$pb), %eax
-; LINUX:  leal  dst6@GOTOFF(%eax), %ecx
-; LINUX:  movl  %ecx, ptr6@GOTOFF(%eax)
-; LINUX:  movl  src6@GOTOFF(%eax), %ecx
-; LINUX:  movl  %ecx, dst6@GOTOFF(%eax)
-; LINUX:  ret
+; CHECK-LABEL:  test5:
+; CHECK-I686: calll .L5$pb
+; CHECK-I686-NEXT:  .L5$pb:
+; CHECK-I686-NEXT:  popl  %eax
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L5$pb), %eax
+; CHECK-I686: leal  dst6@GOTOFF(%eax), %ecx
+; CHECK-I686: movl  %ecx, ptr6@GOTOFF(%eax)
+; CHECK-I686: movl  src6@GOTOFF(%eax), %ecx
+; CHECK-I686: movl  %ecx, dst6@GOTOFF(%eax)
+; CHECK-I686: ret
+; CHECK-X32:  leal  dst6(%rip), %eax
+; CHECK-X32:  movl  %eax, ptr6(%rip)
+; CHECK-X32:  movl  src6(%rip), %eax
+; CHECK-X32:  movl  %eax, dst6(%rip)
+; CHECK-X32:  retq
 }
 
 
 ;; Test constant pool references.
 define double @test6(i32 %a.u) nounwind {
 entry:
     %tmp = icmp eq i32 %a.u,0
     %retval = select i1 %tmp, double 4.561230e+02, double 1.234560e+02
     ret double %retval
 
-; LINUX: .LCPI6_0:
+; CHECK:  .LCPI6_0:
 
-; LINUX-LABEL: test6:
-; LINUX:    calll .L6$pb
-; LINUX: .L6$pb:
-; LINUX:    addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L6$pb), 
-; LINUX:    fldl  .LCPI6_0@GOTOFF(
+; CHECK-LABEL:  test6:
+; CHECK-I686: calll .L6$pb
+; CHECK-I686: .L6$pb:
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L6$pb), 
+; CHECK-I686: fldl  .LCPI6_0@GOTOFF(
+; CHECK-X32:    .LCPI6_0(%rip),
 }
 
 
 ;; Test jump table references.
 define void @test7(i32 %n.u) nounwind {
 entry:
     switch i32 %n.u, label %bb12 [i32 1, label %bb i32 2, label %bb6 i32 4, label %bb7 i32 5, label %bb8 i32 6, label %bb10 i32 7, label %bb1 i32 8, label %bb3 i32 9, label %bb4 i32 10, label %bb9 i32 11, label %bb2 i32 12, label %bb5 i32 13, label %bb11 ]
 bb:
bb10:
     ret void
 bb11:
     tail call void(...) @foo5()
     ret void
 bb12:
     tail call void(...) @foo6()
     ret void
     
-; LINUX-LABEL: test7:
-; LINUX:   calll  .L7$pb
-; LINUX: .L7$pb:
-; LINUX:   addl $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb),
-; LINUX:   .LJTI7_0@GOTOFF(
-; LINUX:   jmpl *
-
-; LINUX: .p2align 2
-; LINUX-NEXT: .LJTI7_0:
-; LINUX:   .long   .LBB7_2@GOTOFF
-; LINUX:   .long   .LBB7_8@GOTOFF
-; LINUX:   .long   .LBB7_4@GOTOFF
-; LINUX:   .long   .LBB7_6@GOTOFF
-; LINUX:   .long   .LBB7_5@GOTOFF
-; LINUX:   .long   .LBB7_8@GOTOFF
-; LINUX:   .long   .LBB7_7@GOTOFF
+; CHECK-LABEL:  test7:
+; CHECK-I686: calll .L7$pb
+; CHECK-I686: .L7$pb:
+; CHECK-I686: addl  $_GLOBAL_OFFSET_TABLE_+(.L{{.*}}-.L7$pb),
+; CHECK-I686: .LJTI7_0@GOTOFF(
+; CHECK-I686: jmpl  *
+; CHECK-X32:  leal  .LJTI7_0(%rip), %eax
+; CHECK-X32:  addl  (%eax,%edi,4), %eax
+; CHECK-X32:  jmpq  *%rax
+
+; CHECK:  .p2align 2
+; CHECK-NEXT: .LJTI7_0:
+; CHECK-I686: .long  .LBB7_2@GOTOFF
+; CHECK-I686: .long  .LBB7_8@GOTOFF
+; CHECK-I686: .long  .LBB7_4@GOTOFF
+; CHECK-I686: .long  .LBB7_6@GOTOFF
+; CHECK-I686: .long  .LBB7_5@GOTOFF
+; CHECK-I686: .long  .LBB7_8@GOTOFF
+; CHECK-I686: .long  .LBB7_7@GOTOFF
+; CHECK-X32:  .long .LBB7_3-.LJTI7_0
+; CHECK-X32:  .long .LBB7_3-.LJTI7_0
+; CHECK-X32:  .long .LBB7_12-.LJTI7_0
+; CHECK-X32:  .long .LBB7_8-.LJTI7_0
+; CHECK-X32:  .long .LBB7_12-.LJTI7_0
+; CHECK-X32:  .long .LBB7_10-.LJTI7_0
+; CHECK-X32:  .long .LBB7_8-.LJTI7_0
+; CHECK-X32:  .long .LBB7_9-.LJTI7_0
+; CHECK-X32:  .long .LBB7_10-.LJTI7_0
+; CHECK-X32:  .long .LBB7_9-.LJTI7_0
+; CHECK-X32:  .long .LBB7_12-.LJTI7_0
+; CHECK-X32:  .long .LBB7_14-.LJTI7_0
+; CHECK-X32:  .long .LBB7_14-.LJTI7_0
 }
 
 declare void @foo1(...)
 declare void @foo2(...)
 declare void @foo6(...)
 declare void @foo3(...)
 declare void @foo4(...)
 declare void @foo5(...)