[X86][PPC] Tune SelectionDAG CTPOP emulation via TLI hook

[davezarzycki]

Summary

When CTPOP is not legal, emulating it can be quite expensive. In D89952, a TLI hook was added to allow targets to tune how expensive CTPOP emulation is. This patch attempts to do basic/easy tuning. More refinement is certainly possible, especially when a legal CTPOP is available but with the "wrong" type/size.

[davezarzycki]

Fixed the malformed diff/patch.

Also, PPC reviewers would be appreciated. Thanks for any recommendations.

[spatel]

Adding more potential reviewers.
This is 2 independent patches in 1 proposal, so you may want to split it to avoid waiting on approval for both targets.
I made some general x86 comments, but someone that knows AVX512 better should have a look at those test diffs in particular.

llvm/lib/Target/X86/X86ISelLowering.cpp

5347 ↗

(On Diff #303937)

We should have a code comment here to describe approximately what the difference in x86 asm will be with these settings. As-is { 2, 4, 6, 10, 14 } is a set of magic numbers. Need to explain why a particular data type (i8, etc) is treated differently than other types.

llvm/test/CodeGen/X86/vector-popcnt-128-ult-ugt.ll

473–484 ↗

(On Diff #303937)

Are we saying that the longer sequence is better because it avoids the constant loads and/or potentially expensive vpshufb's?
Is there experimental perf data or llvm-mca to back that up?
If not, we might opt for a more conservative setting as a first step, and then allow this case in a follow-up patch.

[spatel]

llvm/lib/Target/X86/X86ISelLowering.cpp

5335 ↗

(On Diff #303937)

How are we able to make that assertion? I don't see anything in the caller that filters out scalar types. We probably need at least 1 scalar test as a sanity check if the plan is that this optimization is vector-only for x86.

[RKSimon]

@davezarzycki What is happening with this patch and PR47825 ?

[davezarzycki]

Sorry, I got distracted. If it were up to me, I'd prefer tuning numbers that are, without checking, unambiguously better than the current code gen. In particular the code gen for KNL is awful. Furthermore, I think that fine tuning this further has diminishing returns for various reasons. Are people okay with that?

[nemanjai]

The PPC changes are fine. The code is not only slightly better, but all current PPC CPU's have a fast HW implementation of popcnt. Please note of course that my approval is only for the PPC part and should not be understood to be an approval of the X86 changes.

llvm/test/CodeGen/PowerPC/vector-popcnt-128-ult-ugt.ll

; PWR9-NEXT:    blr
   %3 = icmp ult <16 x i8> %2, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ugt_2_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ugt_2_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI2_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI2_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 2, 5
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_2_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI2_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI2_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI2_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 2, 5
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_2_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI2_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <16 x i8> %2, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ult_3_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ult_3_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI3_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI3_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 3, 2
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_3_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI3_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI3_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI3_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 3, 2
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_3_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI3_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI3_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <16 x i8> %2, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ugt_3_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ugt_3_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI4_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI4_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 2, 3
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_3_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI4_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI4_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI4_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 2, 3
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_3_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI4_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <16 x i8> %2, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ult_4_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ult_4_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI5_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI5_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vcmpgtub 2, 4, 2
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_4_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI5_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI5_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vcmpgtub 2, 4, 2
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_4_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI5_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <16 x i8> %2, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ugt_4_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ugt_4_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI6_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI6_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI6_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI6_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vcmpgtub 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_4_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI6_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI6_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI6_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI6_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vcmpgtub 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_4_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI6_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI6_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <16 x i8> %2, <i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4, i8 4>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ult_5_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ult_5_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI7_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI7_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI7_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 5
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 3, 2
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_5_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI7_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI7_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI7_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 5
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 3, 2
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_5_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI7_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI7_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <16 x i8> %2, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ugt_5_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ugt_5_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI8_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI8_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI8_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI8_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 5
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 2, 3
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_5_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI8_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI8_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI8_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI8_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 5
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 2, 3
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_5_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI8_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI8_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <16 x i8> %2, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ult_6_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ult_6_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI9_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI9_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI9_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 6
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 3, 2
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_6_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI9_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI9_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI9_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 6
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 3, 2
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_6_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI9_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <16 x i8> %2, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ugt_6_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ugt_6_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI10_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI10_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI10_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 6
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 2, 3
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_6_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI10_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI10_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI10_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 6
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 2, 3
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_6_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI10_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <16 x i8> %2, <i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6, i8 6>
   %4 = sext <16 x i1> %3 to <16 x i8>
   ret <16 x i8> %4
 }
 
 define <16 x i8> @ult_7_v16i8(<16 x i8> %0) {
 ; PWR5-LABEL: ult_7_v16i8:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI11_0@toc@l
-; PWR5-NEXT:    vsrb 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI11_1@toc@l
-; PWR5-NEXT:    vspltisb 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsububm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrb 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 4
-; PWR5-NEXT:    vaddubm 2, 3, 2
-; PWR5-NEXT:    vsrb 3, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
-; PWR5-NEXT:    vaddubm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 7
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vaddubm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vcmpgtub 2, 3, 2
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vaddubm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequb 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_7_v16i8:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI11_0@toc@l
-; PWR6-NEXT:    vsrb 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI11_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI11_1@toc@l
-; PWR6-NEXT:    vspltisb 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsububm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrb 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 4
-; PWR6-NEXT:    vaddubm 2, 3, 2
-; PWR6-NEXT:    vsrb 3, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
-; PWR6-NEXT:    vaddubm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 7
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vcmpgtub 2, 3, 2
+; PWR6-NEXT:    vaddubm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vaddubm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequb 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_7_v16i8:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisb 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI11_0@toc@l
 ; PWR7-NEXT:    vspltisb 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_2_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_2_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
-; PWR5-NEXT:    vspltish 3, 1
-; PWR5-NEXT:    addi 3, 3, .LCPI14_0@toc@l
-; PWR5-NEXT:    vsrh 3, 2, 3
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI14_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI14_1@toc@l
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vand 3, 3, 4
-; PWR5-NEXT:    lvx 4, 0, 3
-; PWR5-NEXT:    vsubuhm 2, 2, 3
-; PWR5-NEXT:    vand 3, 2, 4
-; PWR5-NEXT:    vsrh 2, 2, 5
-; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vadduhm 2, 3, 2
-; PWR5-NEXT:    vspltish 3, 4
-; PWR5-NEXT:    vsrh 3, 2, 3
-; PWR5-NEXT:    vadduhm 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 15
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
 ; PWR5-NEXT:    vxor 4, 4, 4
 ; PWR5-NEXT:    vand 2, 2, 3
-; PWR5-NEXT:    vspltisb 3, 1
-; PWR5-NEXT:    vmladduhm 2, 2, 3, 4
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vcmpgtuh 2, 2, 5
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_2_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
-; PWR6-NEXT:    vspltish 3, 1
-; PWR6-NEXT:    addi 3, 3, .LCPI14_0@toc@l
-; PWR6-NEXT:    vsrh 3, 2, 3
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI14_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI14_1@toc@l
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vand 3, 3, 4
-; PWR6-NEXT:    lvx 4, 0, 3
-; PWR6-NEXT:    vsubuhm 2, 2, 3
-; PWR6-NEXT:    vand 3, 2, 4
-; PWR6-NEXT:    vsrh 2, 2, 5
-; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vadduhm 2, 3, 2
-; PWR6-NEXT:    vspltish 3, 4
-; PWR6-NEXT:    vsrh 3, 2, 3
-; PWR6-NEXT:    vadduhm 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 15
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
 ; PWR6-NEXT:    vxor 4, 4, 4
 ; PWR6-NEXT:    vand 2, 2, 3
-; PWR6-NEXT:    vspltisb 3, 1
-; PWR6-NEXT:    vmladduhm 2, 2, 3, 4
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vcmpgtuh 2, 2, 5
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_2_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI14_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_3_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_3_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI15_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI15_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 3
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_3_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI15_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI15_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI15_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 3
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_3_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI15_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_3_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_3_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI16_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI16_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI16_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 3
-; PWR5-NEXT:    vcmpgtuh 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_3_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI16_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI16_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI16_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 3
-; PWR6-NEXT:    vcmpgtuh 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_3_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI16_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_4_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_4_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI17_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI17_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI17_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vcmpgtuh 2, 5, 2
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_4_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI17_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI17_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI17_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vcmpgtuh 2, 5, 2
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_4_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
 ; PWR7-NEXT:    vxor 5, 5, 5
 ; PWR7-NEXT:    addi 3, 3, .LCPI17_0@toc@l
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_4_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_4_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI18_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI18_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI18_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI18_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 15
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
 ; PWR5-NEXT:    vand 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vcmpgtuh 2, 2, 5
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_4_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI18_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI18_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI18_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI18_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 15
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
 ; PWR6-NEXT:    vand 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vcmpgtuh 2, 2, 5
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_4_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI18_0@toc@ha
 ; PWR7-NEXT:    vxor 5, 5, 5
 ; PWR7-NEXT:    addi 3, 3, .LCPI18_0@toc@l
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4, i16 4>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_5_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_5_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI19_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI19_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI19_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI19_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 5
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_5_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI19_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI19_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI19_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI19_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 5
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_5_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI19_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI19_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_5_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_5_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI20_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI20_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI20_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 5
-; PWR5-NEXT:    vcmpgtuh 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_5_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI20_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI20_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI20_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 5
-; PWR6-NEXT:    vcmpgtuh 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_5_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI20_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_6_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_6_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI21_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI21_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 6
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_6_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI21_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI21_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI21_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 6
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_6_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI21_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_6_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_6_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI22_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI22_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI22_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 6
-; PWR5-NEXT:    vcmpgtuh 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_6_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI22_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI22_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI22_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 6
-; PWR6-NEXT:    vcmpgtuh 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_6_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI22_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6, i16 6>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_7_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_7_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI23_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI23_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 7
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_7_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI23_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI23_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 7
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_7_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI23_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI23_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_7_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_7_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI24_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI24_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI24_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 7
-; PWR5-NEXT:    vcmpgtuh 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_7_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI24_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI24_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI24_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 7
-; PWR6-NEXT:    vcmpgtuh 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_7_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI24_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_8_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_8_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI25_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI25_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI25_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_8_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI25_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI25_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI25_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_8_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI25_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <8 x i16> %2, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ugt_8_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ugt_8_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI26_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI26_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI26_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vcmpgtuh 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_8_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI26_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI26_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI26_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vcmpgtuh 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_8_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI26_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <8 x i16> %2, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
   %4 = sext <8 x i1> %3 to <8 x i16>
   ret <8 x i16> %4
 }
 
 define <8 x i16> @ult_9_v8i16(<8 x i16> %0) {
 ; PWR5-LABEL: ult_9_v8i16:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
-; PWR5-NEXT:    vspltish 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI27_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI27_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI27_1@toc@l
-; PWR5-NEXT:    vsrh 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 2
-; PWR5-NEXT:    vsubuhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    vspltish 5, 4
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vsrh 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduhm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR5-NEXT:    vspltish 3, 8
-; PWR5-NEXT:    vsrh 2, 2, 3
-; PWR5-NEXT:    vspltish 3, 9
-; PWR5-NEXT:    vcmpgtuh 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduhm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequh 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_9_v8i16:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
-; PWR6-NEXT:    vspltish 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI27_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI27_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI27_1@toc@l
-; PWR6-NEXT:    vsrh 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 2
-; PWR6-NEXT:    vsubuhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    vspltish 5, 4
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vsrh 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduhm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vmladduhm 2, 2, 4, 3
-; PWR6-NEXT:    vspltish 3, 8
-; PWR6-NEXT:    vsrh 2, 2, 3
-; PWR6-NEXT:    vspltish 3, 9
-; PWR6-NEXT:    vcmpgtuh 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduhm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequh 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_9_v8i16:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltish 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI27_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI27_0@toc@l
 ; PWR7-NEXT:    vspltish 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 2, i32 2, i32 2, i32 2>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_2_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_2_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI42_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI42_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI42_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI42_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 1, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vcmpgtuw 2, 2, 0
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_2_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI42_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI42_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI42_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI42_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 1, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vcmpgtuw 2, 2, 0
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_2_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI42_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI42_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 2, i32 2, i32 2, i32 2>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_3_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_3_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI43_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI43_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI43_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI43_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 3
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_3_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI43_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI43_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI43_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI43_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 3
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_3_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI43_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI43_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 3, i32 3, i32 3, i32 3>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_3_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_3_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI44_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI44_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI44_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI44_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 3
-; PWR5-NEXT:    vcmpgtuw 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_3_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI44_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI44_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI44_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI44_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 3
-; PWR6-NEXT:    vcmpgtuw 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_3_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI44_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI44_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 3, i32 3, i32 3, i32 3>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_4_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_4_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI45_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI45_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI45_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI45_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vspltisb 0, 15
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 0
-; PWR5-NEXT:    vspltisw 0, -16
-; PWR5-NEXT:    vrlw 1, 4, 0
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 0
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vcmpgtuw 2, 5, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_4_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI45_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI45_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI45_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI45_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vspltisb 0, 15
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 0
-; PWR6-NEXT:    vspltisw 0, -16
-; PWR6-NEXT:    vrlw 1, 4, 0
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 0
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vcmpgtuw 2, 5, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_4_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI45_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI45_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 4, i32 4, i32 4, i32 4>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_4_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_4_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI46_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI46_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI46_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI46_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vspltisb 0, 15
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 0
-; PWR5-NEXT:    vspltisw 0, -16
-; PWR5-NEXT:    vrlw 1, 4, 0
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 0
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vcmpgtuw 2, 2, 5
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_4_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI46_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI46_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI46_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI46_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vspltisb 0, 15
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 0
-; PWR6-NEXT:    vspltisw 0, -16
-; PWR6-NEXT:    vrlw 1, 4, 0
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 1, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 0
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vcmpgtuw 2, 2, 5
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_4_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI46_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI46_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 4, i32 4, i32 4, i32 4>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_5_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_5_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI47_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI47_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI47_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI47_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 5
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_5_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI47_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI47_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI47_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI47_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 5
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_5_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI47_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI47_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 5, i32 5, i32 5, i32 5>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_5_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_5_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI48_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI48_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI48_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 5
-; PWR5-NEXT:    vcmpgtuw 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_5_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI48_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI48_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI48_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 5
-; PWR6-NEXT:    vcmpgtuw 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_5_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI48_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 5, i32 5, i32 5, i32 5>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_6_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_6_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI49_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI49_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI49_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI49_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 6
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_6_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI49_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI49_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI49_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI49_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 6
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_6_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI49_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI49_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 6, i32 6, i32 6, i32 6>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_6_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_6_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI50_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI50_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI50_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI50_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 6
-; PWR5-NEXT:    vcmpgtuw 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_6_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI50_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI50_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI50_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI50_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 6
-; PWR6-NEXT:    vcmpgtuw 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_6_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI50_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI50_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 6, i32 6, i32 6, i32 6>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_7_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_7_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI51_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI51_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI51_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI51_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 7
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_7_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI51_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI51_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI51_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI51_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 7
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_7_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI51_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI51_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 7, i32 7, i32 7, i32 7>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_7_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_7_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI52_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI52_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI52_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI52_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 7
-; PWR5-NEXT:    vcmpgtuw 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_7_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI52_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI52_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI52_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI52_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 7
-; PWR6-NEXT:    vcmpgtuw 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_7_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI52_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI52_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 7, i32 7, i32 7, i32 7>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_8_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_8_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI53_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI53_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI53_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI53_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 8
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_8_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI53_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI53_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI53_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI53_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 8
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_8_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI53_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI53_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <4 x i32> %2, <i32 8, i32 8, i32 8, i32 8>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ugt_8_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ugt_8_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI54_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI54_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI54_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI54_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 8
-; PWR5-NEXT:    vcmpgtuw 2, 2, 3
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
+; PWR5-NEXT:    vnot 2, 2
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_8_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI54_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI54_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI54_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI54_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 8
-; PWR6-NEXT:    vcmpgtuw 2, 2, 3
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
+; PWR6-NEXT:    vnot 2, 2
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_8_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI54_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI54_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ugt <4 x i32> %2, <i32 8, i32 8, i32 8, i32 8>
   %4 = sext <4 x i1> %3 to <4 x i32>
   ret <4 x i32> %4
 }
 
 define <4 x i32> @ult_9_v4i32(<4 x i32> %0) {
 ; PWR5-LABEL: ult_9_v4i32:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    addis 3, 2, .LCPI55_0@toc@ha
-; PWR5-NEXT:    vspltisw 4, 1
-; PWR5-NEXT:    vxor 3, 3, 3
-; PWR5-NEXT:    addi 3, 3, .LCPI55_0@toc@l
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    addis 3, 2, .LCPI55_1@toc@ha
-; PWR5-NEXT:    addi 3, 3, .LCPI55_1@toc@l
-; PWR5-NEXT:    vspltisw 0, 2
-; PWR5-NEXT:    vsrw 4, 2, 4
-; PWR5-NEXT:    vand 4, 4, 5
-; PWR5-NEXT:    lvx 5, 0, 3
-; PWR5-NEXT:    vsubuwm 2, 2, 4
-; PWR5-NEXT:    vand 4, 2, 5
-; PWR5-NEXT:    vsrw 2, 2, 0
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, 4
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 4, 2, 5
-; PWR5-NEXT:    vspltisb 5, 15
-; PWR5-NEXT:    vadduwm 2, 2, 4
-; PWR5-NEXT:    vspltisb 4, 1
-; PWR5-NEXT:    vand 2, 2, 5
-; PWR5-NEXT:    vspltisw 5, -16
-; PWR5-NEXT:    vrlw 0, 4, 5
-; PWR5-NEXT:    vmulouh 4, 2, 4
-; PWR5-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR5-NEXT:    vspltisw 3, 12
-; PWR5-NEXT:    vadduwm 3, 3, 3
-; PWR5-NEXT:    vslw 2, 2, 5
-; PWR5-NEXT:    vadduwm 2, 4, 2
-; PWR5-NEXT:    vsrw 2, 2, 3
-; PWR5-NEXT:    vspltisw 3, 9
-; PWR5-NEXT:    vcmpgtuw 2, 3, 2
+; PWR5-NEXT:    vspltisb 3, -1
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 4, 2, 3
+; PWR5-NEXT:    vand 2, 2, 4
+; PWR5-NEXT:    vadduwm 3, 2, 3
+; PWR5-NEXT:    vxor 4, 4, 4
+; PWR5-NEXT:    vand 2, 2, 3
+; PWR5-NEXT:    vcmpequw 2, 2, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_9_v4i32:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    addis 3, 2, .LCPI55_0@toc@ha
-; PWR6-NEXT:    vspltisw 4, 1
-; PWR6-NEXT:    vxor 3, 3, 3
-; PWR6-NEXT:    addi 3, 3, .LCPI55_0@toc@l
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    addis 3, 2, .LCPI55_1@toc@ha
-; PWR6-NEXT:    addi 3, 3, .LCPI55_1@toc@l
-; PWR6-NEXT:    vspltisw 0, 2
-; PWR6-NEXT:    vsrw 4, 2, 4
-; PWR6-NEXT:    vand 4, 4, 5
-; PWR6-NEXT:    lvx 5, 0, 3
-; PWR6-NEXT:    vsubuwm 2, 2, 4
-; PWR6-NEXT:    vand 4, 2, 5
-; PWR6-NEXT:    vsrw 2, 2, 0
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, 4
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 4, 2, 5
-; PWR6-NEXT:    vspltisb 5, 15
-; PWR6-NEXT:    vadduwm 2, 2, 4
-; PWR6-NEXT:    vspltisb 4, 1
-; PWR6-NEXT:    vand 2, 2, 5
-; PWR6-NEXT:    vspltisw 5, -16
-; PWR6-NEXT:    vrlw 0, 4, 5
-; PWR6-NEXT:    vmulouh 4, 2, 4
-; PWR6-NEXT:    vmsumuhm 2, 2, 0, 3
-; PWR6-NEXT:    vspltisw 3, 12
-; PWR6-NEXT:    vadduwm 3, 3, 3
-; PWR6-NEXT:    vslw 2, 2, 5
-; PWR6-NEXT:    vadduwm 2, 4, 2
-; PWR6-NEXT:    vsrw 2, 2, 3
-; PWR6-NEXT:    vspltisw 3, 9
-; PWR6-NEXT:    vcmpgtuw 2, 3, 2
+; PWR6-NEXT:    vspltisb 3, -1
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 4, 2, 3
+; PWR6-NEXT:    vand 2, 2, 4
+; PWR6-NEXT:    vadduwm 3, 2, 3
+; PWR6-NEXT:    vxor 4, 4, 4
+; PWR6-NEXT:    vand 2, 2, 3
+; PWR6-NEXT:    vcmpequw 2, 2, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_9_v4i32:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    vspltisw 3, 1
 ; PWR7-NEXT:    addis 3, 2, .LCPI55_0@toc@ha
 ; PWR7-NEXT:    addi 3, 3, .LCPI55_0@toc@l
 ; PWR7-NEXT:    vspltisw 4, 2
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 2, i64 2>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_2_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_2_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 2
-; PWR5-NEXT:    subfic 3, 3, 2
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 2
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_2_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 2
-; PWR6-NEXT:    subfic 3, 3, 2
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 2
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_2_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 2, i64 2>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_3_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_3_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 3
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_3_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 3
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_3_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 3, i64 3>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_3_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_3_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 3
-; PWR5-NEXT:    subfic 3, 3, 3
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 3
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_3_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 3
-; PWR6-NEXT:    subfic 3, 3, 3
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 3
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_3_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 3, i64 3>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_4_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_4_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 4
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_4_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 4
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_4_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 4, i64 4>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_4_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_4_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 4
-; PWR5-NEXT:    subfic 3, 3, 4
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 4
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_4_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 4
-; PWR6-NEXT:    subfic 3, 3, 4
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 4
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_4_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 4, i64 4>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_5_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_5_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 5
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_5_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 5
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_5_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 5, i64 5>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_5_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_5_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 5
-; PWR5-NEXT:    subfic 3, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 5
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_5_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 5
-; PWR6-NEXT:    subfic 3, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 5
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_5_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 5, i64 5>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_6_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_6_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 6
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_6_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 6
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_6_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 6, i64 6>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_6_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_6_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 6
-; PWR5-NEXT:    subfic 3, 3, 6
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 6
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_6_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 6
-; PWR6-NEXT:    subfic 3, 3, 6
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 6
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_6_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 6, i64 6>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_7_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_7_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 7
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_7_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 7
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_7_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 7, i64 7>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_7_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_7_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 7
-; PWR5-NEXT:    subfic 3, 3, 7
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 7
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_7_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 7
-; PWR6-NEXT:    subfic 3, 3, 7
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 7
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_7_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 7, i64 7>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_8_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_8_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 8
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_8_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 8
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_8_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
; PWR9-NEXT:    blr
   %3 = icmp ult <2 x i64> %2, <i64 8, i64 8>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ugt_8_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ugt_8_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    li 5, 8
-; PWR5-NEXT:    subfic 3, 3, 8
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
-; PWR5-NEXT:    subfe 3, 5, 5
-; PWR5-NEXT:    subfic 4, 4, 8
-; PWR5-NEXT:    subfe 4, 5, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    subfic 3, 3, 0
+; PWR5-NEXT:    subfe 3, 3, 3
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    subfic 4, 4, 0
+; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ugt_8_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    li 5, 8
-; PWR6-NEXT:    subfic 3, 3, 8
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
-; PWR6-NEXT:    subfe 3, 5, 5
-; PWR6-NEXT:    subfic 4, 4, 8
-; PWR6-NEXT:    subfe 4, 5, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    subfic 3, 3, 0
+; PWR6-NEXT:    subfe 3, 3, 3
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    subfic 4, 4, 0
+; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ugt_8_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1
 ; PWR7-NEXT:    stxvd2x 34, 0, 3
; PWR9-NEXT:    blr
   %3 = icmp ugt <2 x i64> %2, <i64 8, i64 8>
   %4 = sext <2 x i1> %3 to <2 x i64>
   ret <2 x i64> %4
 }
 
 define <2 x i64> @ult_9_v2i64(<2 x i64> %0) {
 ; PWR5-LABEL: ult_9_v2i64:
 ; PWR5:       # %bb.0:
-; PWR5-NEXT:    lis 5, 21845
-; PWR5-NEXT:    lis 6, 13107
-; PWR5-NEXT:    ori 5, 5, 21845
-; PWR5-NEXT:    rotldi 8, 4, 63
-; PWR5-NEXT:    rotldi 9, 3, 63
-; PWR5-NEXT:    rldimi 5, 5, 32, 0
-; PWR5-NEXT:    and 8, 8, 5
-; PWR5-NEXT:    and 5, 9, 5
-; PWR5-NEXT:    ori 6, 6, 13107
-; PWR5-NEXT:    sub 3, 3, 5
-; PWR5-NEXT:    rldimi 6, 6, 32, 0
-; PWR5-NEXT:    sub 4, 4, 8
-; PWR5-NEXT:    and 8, 3, 6
-; PWR5-NEXT:    rotldi 3, 3, 62
-; PWR5-NEXT:    and 3, 3, 6
-; PWR5-NEXT:    lis 7, 3855
-; PWR5-NEXT:    and 5, 4, 6
-; PWR5-NEXT:    rotldi 4, 4, 62
-; PWR5-NEXT:    add 3, 8, 3
-; PWR5-NEXT:    lis 9, 257
-; PWR5-NEXT:    ori 7, 7, 3855
-; PWR5-NEXT:    and 4, 4, 6
-; PWR5-NEXT:    rldicl 6, 3, 60, 4
-; PWR5-NEXT:    ori 9, 9, 257
-; PWR5-NEXT:    rldimi 7, 7, 32, 0
-; PWR5-NEXT:    add 4, 5, 4
-; PWR5-NEXT:    add 3, 3, 6
-; PWR5-NEXT:    rldimi 9, 9, 32, 0
-; PWR5-NEXT:    rldicl 5, 4, 60, 4
-; PWR5-NEXT:    and 3, 3, 7
-; PWR5-NEXT:    add 4, 4, 5
-; PWR5-NEXT:    mulld 3, 3, 9
-; PWR5-NEXT:    and 4, 4, 7
-; PWR5-NEXT:    rldicl 3, 3, 8, 56
-; PWR5-NEXT:    li 5, 9
-; PWR5-NEXT:    mulld 4, 4, 9
-; PWR5-NEXT:    subc 6, 3, 5
-; PWR5-NEXT:    rldicl 4, 4, 8, 56
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addi 5, 3, -1
+; PWR5-NEXT:    and 3, 3, 5
+; PWR5-NEXT:    addi 5, 4, -1
+; PWR5-NEXT:    addic 3, 3, -1
 ; PWR5-NEXT:    subfe 3, 3, 3
-; PWR5-NEXT:    subc 5, 4, 5
+; PWR5-NEXT:    and 4, 4, 5
+; PWR5-NEXT:    addic 4, 4, -1
 ; PWR5-NEXT:    subfe 4, 4, 4
 ; PWR5-NEXT:    blr
 ;
 ; PWR6-LABEL: ult_9_v2i64:
 ; PWR6:       # %bb.0:
-; PWR6-NEXT:    lis 5, 21845
-; PWR6-NEXT:    lis 6, 13107
-; PWR6-NEXT:    ori 5, 5, 21845
-; PWR6-NEXT:    rotldi 8, 4, 63
-; PWR6-NEXT:    rotldi 9, 3, 63
-; PWR6-NEXT:    rldimi 5, 5, 32, 0
-; PWR6-NEXT:    and 8, 8, 5
-; PWR6-NEXT:    and 5, 9, 5
-; PWR6-NEXT:    ori 6, 6, 13107
-; PWR6-NEXT:    sub 3, 3, 5
-; PWR6-NEXT:    rldimi 6, 6, 32, 0
-; PWR6-NEXT:    sub 4, 4, 8
-; PWR6-NEXT:    and 8, 3, 6
-; PWR6-NEXT:    rotldi 3, 3, 62
-; PWR6-NEXT:    and 3, 3, 6
-; PWR6-NEXT:    lis 7, 3855
-; PWR6-NEXT:    and 5, 4, 6
-; PWR6-NEXT:    rotldi 4, 4, 62
-; PWR6-NEXT:    add 3, 8, 3
-; PWR6-NEXT:    lis 9, 257
-; PWR6-NEXT:    ori 7, 7, 3855
-; PWR6-NEXT:    and 4, 4, 6
-; PWR6-NEXT:    rldicl 6, 3, 60, 4
-; PWR6-NEXT:    ori 9, 9, 257
-; PWR6-NEXT:    rldimi 7, 7, 32, 0
-; PWR6-NEXT:    add 4, 5, 4
-; PWR6-NEXT:    add 3, 3, 6
-; PWR6-NEXT:    rldimi 9, 9, 32, 0
-; PWR6-NEXT:    rldicl 5, 4, 60, 4
-; PWR6-NEXT:    and 3, 3, 7
-; PWR6-NEXT:    add 4, 4, 5
-; PWR6-NEXT:    mulld 3, 3, 9
-; PWR6-NEXT:    and 4, 4, 7
-; PWR6-NEXT:    rldicl 3, 3, 8, 56
-; PWR6-NEXT:    li 5, 9
-; PWR6-NEXT:    mulld 4, 4, 9
-; PWR6-NEXT:    subc 6, 3, 5
-; PWR6-NEXT:    rldicl 4, 4, 8, 56
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addi 5, 3, -1
+; PWR6-NEXT:    and 3, 3, 5
+; PWR6-NEXT:    addi 5, 4, -1
+; PWR6-NEXT:    addic 3, 3, -1
 ; PWR6-NEXT:    subfe 3, 3, 3
-; PWR6-NEXT:    subc 5, 4, 5
+; PWR6-NEXT:    and 4, 4, 5
+; PWR6-NEXT:    addic 4, 4, -1
 ; PWR6-NEXT:    subfe 4, 4, 4
 ; PWR6-NEXT:    blr
 ;
 ; PWR7-LABEL: ult_9_v2i64:
 ; PWR7:       # %bb.0:
 ; PWR7-NEXT:    addi 3, 1, -32
 ; PWR7-NEXT:    li 5, 0
 ; PWR7-NEXT:    li 6, -1