This is an archive of the discontinued LLVM Phabricator instance.

[AArch64] Optimize lowering of 128-bit shifts by a variable
AbandonedPublic

Authored by efriedma on Oct 12 2020, 4:36 PM.

Details

Summary

This takes advantage of the work that's been done on funnel shifts to make the implementation more readable.

I think we could shave off one more instruction in the funnel shift lowering: if we do the shifts in the opposite order, we can fold the shift by one into the orr. Mostly orthogonal to this patch, though.

The implementation here isn't really target-specific; maybe we should be doing this in target-independent code?

Diff Detail

Event Timeline

efriedma created this revision.Oct 12 2020, 4:36 PM
efriedma requested review of this revision.Oct 12 2020, 4:37 PM

I agree there isn't any reason not to try and move this to generic legalization - although we are still finding a few edge legalization cases where funnel/rotates fail on some targets so you might encounter that.

reverse ping?

The implementation here isn't really target-specific; maybe we should be doing this in target-independent code?

@efriedma I'm hoping D101987's target-independent implementation will make this patch redundant.

efriedma abandoned this revision.May 6 2021, 10:47 AM

Looks like we end up with essentially the same code with this patch and your proposed patch; I'm happy to just use the target-independent version.