Add disassembly counter after disasembly line

[jiaolu]

Summary

This would make it easier for the AMDGPU shader debugging or
shader replacement at particular position.

Disassembly line would look like:

Before:

v_add_nc_u32_e32 v0, 0xd10, v4    ; 4A0008FF 00000D10

After:

v_add_nc_u32_e32 v0, 0xd10, v4    ; 00000004: 4A0008FF 00000D10

[nhaehnle]

I don't understand how this would help with shader replacement. Can you please explain how you plan to use this?

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h

149

The name is too unspecific. Suggestion: DisasmNumBytes.

[arsenm]

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

[jiaolu]

In D88774#2325404, @arsenm wrote:

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

There are several shader debugger tools/situation dependent on this feature.
e.g. one line like this "s_andn2_b32 vcc_lo, vcc_lo, 0 ;000974: 8A6A806A"
1). we feed the disassembly count "0x000974" to the shader debugger tool to get this line of code execution ,register input and output.
2).Also there is some other shader dump tool,e.g. umr. or windbg which output a stream of hardware codes, we can use the hardware code to find matched part of disassembly lines.
3). we also have one shader replacement tool , to drop and replace part of the elf hardware code, if we have full disassembly line with counter and hardware code, it would be handy where to edit hardware code.

Hope it explains.

[jiaolu]

In D88774#2325383, @nhaehnle wrote:

I don't understand how this would help with shader replacement. Can you please explain how you plan to use this?

s_getpc_b64 s[10:11] ; 00000000: BE8A1F00
s_mov_b32 s15, 0x21014fac ; 00000004: BE8F03FF 21014FAC
s_mov_b64 s[0:1], s[10:11] ; 0000000C: BE80040A
s_mov_b32 s0, s5 ; 00000010: BE800305
s_mov_b32 s14, -1 ; 00000014: BE8E03C1

DisasmNumBytes seems to means summary values, this variable means to tell you where the disassembly line position is in the code body,
If you don't like DisasmCounter , maybe DisasmOffset is better name?

[nhaehnle]

In D88774#2327009, @jiaolu wrote:

In D88774#2325404, @arsenm wrote:

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

There are several shader debugger tools/situation dependent on this feature.
e.g. one line like this "s_andn2_b32 vcc_lo, vcc_lo, 0 ;000974: 8A6A806A"
1). we feed the disassembly count "0x000974" to the shader debugger tool to get this line of code execution ,register input and output.
2).Also there is some other shader dump tool,e.g. umr. or windbg which output a stream of hardware codes, we can use the hardware code to find matched part of disassembly lines.
3). we also have one shader replacement tool , to drop and replace part of the elf hardware code, if we have full disassembly line with counter and hardware code, it would be handy where to edit hardware code.

Hope it explains.

It doesn't really. If you already parse this text output, surely you could just derive the offset yourself by counting the number of dwords in comments?

[arsenm]

In D88774#2327009, @jiaolu wrote:

In D88774#2325404, @arsenm wrote:

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

There are several shader debugger tools/situation dependent on this feature.
e.g. one line like this "s_andn2_b32 vcc_lo, vcc_lo, 0 ;000974: 8A6A806A"
1). we feed the disassembly count "0x000974" to the shader debugger tool to get this line of code execution ,register input and output.
2).Also there is some other shader dump tool,e.g. umr. or windbg which output a stream of hardware codes, we can use the hardware code to find matched part of disassembly lines.
3). we also have one shader replacement tool , to drop and replace part of the elf hardware code, if we have full disassembly line with counter and hardware code, it would be handy where to edit hardware code.

Hope it explains.

You can disassemble the text section in the tooling. The compiler does not need to provide this at all

[jiaolu]

In D88774#2331296, @nhaehnle wrote:

In D88774#2327009, @jiaolu wrote:

In D88774#2325404, @arsenm wrote:

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

There are several shader debugger tools/situation dependent on this feature.
e.g. one line like this "s_andn2_b32 vcc_lo, vcc_lo, 0 ;000974: 8A6A806A"
1). we feed the disassembly count "0x000974" to the shader debugger tool to get this line of code execution ,register input and output.
2).Also there is some other shader dump tool,e.g. umr. or windbg which output a stream of hardware codes, we can use the hardware code to find matched part of disassembly lines.
3). we also have one shader replacement tool , to drop and replace part of the elf hardware code, if we have full disassembly line with counter and hardware code, it would be handy where to edit hardware code.

Hope it explains.

It doesn't really. If you already parse this text output, surely you could just derive the offset yourself by counting the number of dwords in comments?

you do can count, however instruction is variant 1/2 dword. To get your target instruction offset, i want to save some brainpower out of this.

[jiaolu]

In D88774#2331300, @arsenm wrote:

In D88774#2327009, @jiaolu wrote:

In D88774#2325404, @arsenm wrote:

Please work on removing this feature from the backend instead. It's long past time to stop handling this in the compiler

There are several shader debugger tools/situation dependent on this feature.
e.g. one line like this "s_andn2_b32 vcc_lo, vcc_lo, 0 ;000974: 8A6A806A"
1). we feed the disassembly count "0x000974" to the shader debugger tool to get this line of code execution ,register input and output.
2).Also there is some other shader dump tool,e.g. umr. or windbg which output a stream of hardware codes, we can use the hardware code to find matched part of disassembly lines.
3). we also have one shader replacement tool , to drop and replace part of the elf hardware code, if we have full disassembly line with counter and hardware code, it would be handy where to edit hardware code.

Hope it explains.

You can disassemble the text section in the tooling. The compiler does not need to provide this at all

@arsenm , okay, i get it. you want remove whole disassembly part from AMDGPUAsmPrinter.cpp?

[arsenm]

I think this isn't needed anymore

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.h

bool isBlockOnlyReachableByFallthrough(
     const MachineBasicBlock *MBB) const override;
 
   bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
                        const char *ExtraCode, raw_ostream &O) override;
 
 protected:
   std::vector<std::string> DisasmLines, HexLines;
   size_t DisasmLineMaxLen;
+  size_t DisasmCounter;
 };
 
 } // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

if (STM.dumpCode()) {
     OutStreamer->setUseAssemblerInfoForParsing(SaveFlag);
     if (Assembler)
       DumpCodeInstEmitter = Assembler->getEmitterPtr();
   }
 
   DisasmLines.clear();
   HexLines.clear();
   DisasmLineMaxLen = 0;
+  DisasmCounter = 0;
 
   emitFunctionBody();
 
   if (isVerbose()) {
     MCSectionELF *CommentSection =
         Context.getELFSection(".AMDGPU.csdata", ELF::SHT_PROGBITS, 0);
     OutStreamer->SwitchSection(CommentSection);
 

llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp

if (DumpCodeInstEmitter) {
       SmallVector<char, 16> CodeBytes;
       raw_svector_ostream CodeStream(CodeBytes);
 
       DumpCodeInstEmitter->encodeInstruction(
           TmpInst, CodeStream, Fixups, MF->getSubtarget<MCSubtargetInfo>());
       HexLines.resize(HexLines.size() + 1);
       std::string &HexLine = HexLines.back();
       raw_string_ostream HexStream(HexLine);
+      HexStream << format("%08X: ", DisasmCounter);
 
       for (size_t i = 0; i < CodeBytes.size(); i += 4) {
         unsigned int CodeDWord = *(unsigned int *)&CodeBytes[i];
         HexStream << format("%s%08X", (i > 0 ? " " : ""), CodeDWord);
       }
 
+      DisasmCounter += CodeBytes.size();
       DisasmStream.flush();
       DisasmLineMaxLen = std::max(DisasmLineMaxLen, DisasmLine.size());
     }
   }
 }
 
 R600MCInstLower::R600MCInstLower(MCContext &Ctx, const R600Subtarget &ST,
                                  const AsmPrinter &AP) :