CodeGen: Fix livein calculation in MachineBasicBlock splitAt

[critson]

Summary

Fix and simplify computation of liveins for new block.

[arsenm]

Fix in what way? How was it broken before?

[critson]

In D88535#2303273, @arsenm wrote:

Fix in what way? How was it broken before?

I have not fully root caused it, but if I apply D88537 with splitAt as-is then I get code generation errors due to missing liveins.
Since the code sequence in splitAt is almost the same as that used by computeAndAddLiveIns, it seems logic to use that instead?

Looking at the code again for the moment, I think the problem is that SplitPoint (after increment) is missed in the stepBackward application.
i.e. the iteration needs to be inclusive of the whole range, not exclusive of the end point.

[critson]

Revise the fix to address the underlying problem in the original code.

I see now my previous fix was incorrect; however, was addressing the verifier
errors I was seeing because it would generate correct liveins on a per-block
basis, but not for chains of blocks (I am not sure if the verifier checks these?).

llvm/lib/CodeGen/MachineBasicBlock.cpp

MachineBasicBlock *MachineBasicBlock::splitAt(MachineInstr &MI,
   }
 
   MachineFunction *MF = getParent();
 
   LivePhysRegs LiveRegs;
   if (UpdateLiveIns) {
     // Make sure we add any physregs we define in the block as liveins to the
     // new block.
+    MachineBasicBlock::iterator Prev(&MI);
     LiveRegs.init(*MF->getSubtarget().getRegisterInfo());
     LiveRegs.addLiveOuts(*this);
-    for (auto I = rbegin(), E = SplitPoint.getReverse(); I != E; ++I)
+    for (auto I = rbegin(), E = Prev.getReverse(); I != E; ++I)
       LiveRegs.stepBackward(*I);
   }
 
   MachineBasicBlock *SplitBB = MF->CreateMachineBasicBlock(getBasicBlock());
 
   MF->insert(++MachineFunction::iterator(this), SplitBB);
   SplitBB->splice(SplitBB->begin(), this, SplitPoint, end());
 

llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir

body:             |
   ; GCN:   S_CBRANCH_EXECZ %bb.1, implicit $exec
   ; GCN:   S_BRANCH %bb.2
   ; GCN: bb.1:
   ; GCN:   successors: %bb.3(0x80000000)
   ; GCN:   [[COPY3:%[0-9]+]]:sreg_64_xexec = COPY [[S_MOV_B64_term]]
   ; GCN:   $exec = S_OR_B64_term $exec, [[COPY3]], implicit-def $scc
   ; GCN: bb.3:
   ; GCN:   successors: %bb.2(0x80000000)
-  ; GCN:   liveins: $vgpr3
   ; GCN:   $vgpr3 = V_MOV_B32_e32 0, implicit $exec
   ; GCN:   $sgpr4_sgpr5 = S_MOV_B64 32
   ; GCN: bb.2:
   ; GCN:   liveins: $vgpr3, $sgpr4_sgpr5
   ; GCN:   S_ENDPGM 0, implicit $vgpr3, implicit $sgpr4_sgpr5
   bb.0:
     liveins: $vgpr0, $vgpr1, $sgpr30_sgpr31