[RISCV][ASAN] implementation of ThreadSelf for riscv64

[EccoTheDolphin]

Summary

[6/11] patch series to port ASAN for riscv64

Depends On D87574

[eugenis]

LGTM

[EccoTheDolphin]

comments update

[EccoTheDolphin]

addressing comments/rebasing

[EccoTheDolphin]

addressing commits

compiler-rt/lib/sanitizer_common/sanitizer_linux_libcdep.cpp

 
 // The offset at which pointer to self is located in the thread descriptor.
 const uptr kThreadSelfOffset = FIRST_32_SECOND_64(8, 16);
 
 uptr ThreadSelfOffset() {
   return kThreadSelfOffset;
 }
 
-#if defined(__mips__) || defined(__powerpc64__)
+#if defined(__mips__) || defined(__powerpc64__) || \
+    (defined(__riscv) && (__riscv_xlen == 64))
 // TlsPreTcbSize includes size of struct pthread_descr and size of tcb
 // head structure. It lies before the static tls blocks.
 static uptr TlsPreTcbSize() {
 # if defined(__mips__)
   const uptr kTcbHead = 16; // sizeof (tcbhead_t)
 # elif defined(__powerpc64__)
   const uptr kTcbHead = 88; // sizeof (tcbhead_t)
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+  const uptr kTcbHead = 16;  // sizeof (tcbhead_t)
 # endif
   const uptr kTlsAlign = 16;
   const uptr kTlsPreTcbSize =
       RoundUpTo(ThreadDescriptorSize() + kTcbHead, kTlsAlign);
   return kTlsPreTcbSize;
 }
 #endif
 
# elif defined(__mips__)
   asm volatile(".set push;\
                 .set mips64r2;\
                 rdhwr %0,$29;\
                 .set pop" : "=r" (thread_pointer));
   descr_addr = thread_pointer - kTlsTcbOffset - TlsPreTcbSize();
 # elif defined(__aarch64__) || defined(__arm__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer()) -
                                       ThreadDescriptorSize();
+#elif (defined(__riscv) && (__riscv_xlen == 64))
+
+  uptr tcb_end;
+  asm volatile("mv %0, tp;\n" : "=r"(tcb_end));
+  // https://github.com/riscv/riscv-elf-psabi-doc/issues/53
+  const uptr kTlsTcbOffset = 0x800;
+  descr_addr =
+      reinterpret_cast<uptr>(tcb_end - kTlsTcbOffset - TlsPreTcbSize());
+
 # elif defined(__s390__)
   descr_addr = reinterpret_cast<uptr>(__builtin_thread_pointer());
 # elif defined(__powerpc64__)
   // PPC64LE uses TLS variant I. The thread pointer (in GPR 13)
   // points to the end of the TCB + 0x7000. The pthread_descr structure is
   // immediately in front of the TCB. TlsPreTcbSize() includes the size of the
   // TCB and the size of pthread_descr.
   const uptr kTlsTcbOffset = 0x7000;