[AArch64][SVE] Fix calculation restore point for SVE callee saves.

[sdesmalen]

Summary

This fixes an issue where the restore point of callee-saves in the
function epilogues was incorrectly calculated when the basic block
consisted of only a RET instruction. This caused dealloc instructions
to be inserted in between the block of callee-save restore instructions,
rather than before it.

[paulwalker-arm]

Just a couple of typos to fix before landing the patch.

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

1697

Not due to this patch but since you're here can you remove the extra ";" please?

1703

I'm guessing the rouge >> is a tab character that should be removed.

[efriedma]

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

1699

Can we simplify this to something like while (RestoreBegin != MBB.begin() && IsSVECalleeSave(std::prev(RestoreBegin)) --RestoreBegin;, instead of bouncing around in both directions?

[sdesmalen]

Addressed review comments before committing.

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

void AArch64FrameLowering::emitEpilogue(MachineFunction &MF,
   NumBytes -= PrologueSaveSize;
   assert(NumBytes >= 0 && "Negative stack allocation size!?");
 
   // Process the SVE callee-saves to determine what space needs to be
   // deallocated.
   StackOffset DeallocateBefore = {}, DeallocateAfter = SVEStackSize;
   MachineBasicBlock::iterator RestoreBegin = LastPopI, RestoreEnd = LastPopI;
   if (int64_t CalleeSavedSize = AFI->getSVECalleeSavedStackSize()) {
     RestoreBegin = std::prev(RestoreEnd);;
     while (IsSVECalleeSave(RestoreBegin) &&
            RestoreBegin != MBB.begin())
       --RestoreBegin;
+
+    if (!IsSVECalleeSave(RestoreBegin))
       ++RestoreBegin;
 
     assert(IsSVECalleeSave(RestoreBegin) &&
            IsSVECalleeSave(std::prev(RestoreEnd)) && "Unexpected instruction");
 
     StackOffset CalleeSavedSizeAsOffset = {CalleeSavedSize, MVT::nxv1i8};
     DeallocateBefore = SVEStackSize - CalleeSavedSizeAsOffset;
     DeallocateAfter = CalleeSavedSizeAsOffset;
   }

llvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir

+# NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+# RUN: llc -mattr=+sve -mtriple=aarch64-none-linux-gnu -start-before=prologepilog %s -o - | FileCheck %s
+
+--- |
+  define aarch64_sve_vector_pcs void @fix_restorepoint_p4() { entry: unreachable }
+  ; CHECK-LABEL: fix_restorepoint_p4:
+  ; CHECK:       // %bb.0: // %entry
+  ; CHECK-NEXT:    str x29, [sp, #-16]! // 8-byte Folded Spill
+  ; CHECK-NEXT:    addvl sp, sp, #-2
+  ; CHECK-NEXT:    str p4, [sp, #7, mul vl] // 2-byte Folded Spill
+  ; CHECK-NEXT:    str z8, [sp, #1, mul vl] // 16-byte Folded Spill
+  ; CHECK-NEXT:    addvl sp, sp, #-1
+  ; CHECK-NEXT:    .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x18, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 24 * VG
+  ; CHECK-NEXT:    .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
+  ; CHECK-NEXT:    .cfi_offset w29, -16
+  ; CHECK-NEXT:    // implicit-def: $z8
+  ; CHECK-NEXT:    // implicit-def: $p4
+  ; CHECK-NEXT:    addvl sp, sp, #1
+  ; CHECK-NEXT:    ldr p4, [sp, #7, mul vl] // 2-byte Folded Reload
+  ; CHECK-NEXT:    ldr z8, [sp, #1, mul vl] // 16-byte Folded Reload
+  ; CHECK-NEXT:    addvl sp, sp, #2
+  ; CHECK-NEXT:    ldr x29, [sp], #16 // 8-byte Folded Reload
+  ; CHECK-NEXT:    ret
+...
+name: fix_restorepoint_p4
+stack:
+  - { id: 0, stack-id: sve-vec, size: 16, alignment: 16 }
+body:             |
+  bb.0.entry:
+    $z8 = IMPLICIT_DEF
+    $p4 = IMPLICIT_DEF
+    B %bb.1
+
+  bb.1.entry:
+    RET_ReallyLR
+---