[PowerPC][AIX] Fix frame-pointer and base-pointer save/restore offset.

[sfertile]

Summary

gprs 30 and 31 are handled differently when they are reserved as the base-pointer and frame-pointer respectively. This fixes the offset of their fixed-stack objects when there are fpr calle-saved registers.

[Xiangling_L]

llvm/test/CodeGen/PowerPC/aix-framepointer-save-restore.ll

3

Since you have a variable n here, I believe we've already had some testcases making sure frame pointer will definitely be used in this scenario, you can remove -frame-pointer=all. But I am okay if you want to keep it just in case. And if so, should we also add on for below 64bit case?

[ZarkoCA]

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

1545–1546

I'm pretty sure this variable is no longer needed.

llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

13

Just a question: is this test maybe good to have as it is to show behaviour for a void return?

[sfertile]

• Removed now unused local variable.
• Removed -framepointer=all option in lit test.
• Fixed formatting of runsteps in new lit test.

[sfertile]

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

1545–1546

You are right, good catch.

llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

13

I could have both a void return and a float return versions in the test, but I'm not sure its really worth the bother.

llvm/test/CodeGen/PowerPC/aix-framepointer-save-restore.ll

3

Good point. I removed it from the 64 bit run step but missed this one.

[ZarkoCA]

Looks good with minor nit.

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

1545–1546

It looks like this causes a build failure with Werror on.

llvm/test/CodeGen/PowerPC/aix-framepointer-save-restore.ll

2

nit: can the indentation be lined up?

5

same as above

[Xiangling_L]

llvm/test/CodeGen/PowerPC/aix-framepointer-save-restore.ll

2

As a reference, external reviewers used to point out the proper way to arrange the testcase command line here:
https://reviews.llvm.org/D78929#inline-740137

llvm/lib/Target/PowerPC/PPCFrameLowering.cpp

assert(SingleScratchReg &&
          "Required number of registers not available in this block");
 
   SingleScratchReg = ScratchReg == TempReg;
 
   int LROffset = getReturnSaveOffset();
 
   int FPOffset = 0;
   if (HasFP) {
-    if (isSVR4ABI) {
-      MachineFrameInfo &MFI = MF.getFrameInfo();
-      int FPIndex = FI->getFramePointerSaveIndex();
-      assert(FPIndex && "No Frame Pointer Save Slot!");
-      FPOffset = MFI.getObjectOffset(FPIndex);
-    } else {
-      FPOffset = getFramePointerSaveOffset();
-    }
   }
 
   int BPOffset = 0;
   if (HasBP) {
-    if (isSVR4ABI) {
-      MachineFrameInfo &MFI = MF.getFrameInfo();
-      int BPIndex = FI->getBasePointerSaveIndex();
-      assert(BPIndex && "No Base Pointer Save Slot!");
-      BPOffset = MFI.getObjectOffset(BPIndex);
-    } else {
-      BPOffset = getBasePointerSaveOffset();
-    }
   }
 
   int PBPOffset = 0;
   if (FI->usesPICBase()) {
     MachineFrameInfo &MFI = MF.getFrameInfo();
     int PBPIndex = FI->getPICBasePointerSaveIndex();
     assert(PBPIndex && "No PIC Base Pointer Save Slot!");
     PBPOffset = MFI.getObjectOffset(PBPIndex);
void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
 
   // Get alignment info so we know how to restore the SP.
   const MachineFrameInfo &MFI = MF.getFrameInfo();
 
   // Get the number of bytes allocated from the FrameInfo.
   int FrameSize = MFI.getStackSize();
 
   // Get processor type.
   bool isPPC64 = Subtarget.isPPC64();
-  // Get the ABI.
-  bool isSVR4ABI = Subtarget.isSVR4ABI();
 
   // Check if the link register (LR) has been saved.
   PPCFunctionInfo *FI = MF.getInfo<PPCFunctionInfo>();
   bool MustSaveLR = FI->mustSaveLR();
   const SmallVectorImpl<Register> &MustSaveCRs = FI->getMustSaveCRs();
   bool MustSaveCR = !MustSaveCRs.empty();
   // Do we have a frame pointer and/or base pointer for this function?
   bool HasFP = hasFP(MF);
   bool HasBP = RegInfo->hasBasePointer(MF);
void PPCFrameLowering::emitEpilogue(MachineFunction &MF,
   bool SingleScratchReg = findScratchRegister(&MBB, true, false, &ScratchReg,
                                               &TempReg);
   assert(SingleScratchReg &&
          "Could not find an available scratch register");
 
   SingleScratchReg = ScratchReg == TempReg;
 
   if (HasFP) {
-    if (isSVR4ABI) {
-      int FPIndex = FI->getFramePointerSaveIndex();
-      assert(FPIndex && "No Frame Pointer Save Slot!");
-      FPOffset = MFI.getObjectOffset(FPIndex);
-    } else {
-      FPOffset = getFramePointerSaveOffset();
-    }
   }
 
   int BPOffset = 0;
   if (HasBP) {
-    if (isSVR4ABI) {
       int BPIndex = FI->getBasePointerSaveIndex();
       assert(BPIndex && "No Base Pointer Save Slot!");
       BPOffset = MFI.getObjectOffset(BPIndex);
-    } else {
-      BPOffset = getBasePointerSaveOffset();
-    }
   }
 
   int PBPOffset = 0;
   if (FI->usesPICBase()) {
     int PBPIndex = FI->getPICBasePointerSaveIndex();
     assert(PBPIndex && "No PIC Base Pointer Save Slot!");
     PBPOffset = MFI.getObjectOffset(PBPIndex);
   }

llvm/test/CodeGen/PowerPC/aix-base-pointer.ll

 ; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
 ; RUN:   -mtriple=powerpc-unknown-aix < %s  | FileCheck %s --check-prefix 32BIT
 
 ; RUN: llc -mcpu=pwr7 -mattr=-altivec -verify-machineinstrs \
 ; RUN:   -mtriple=powerpc64-unknown-aix < %s | FileCheck %s --check-prefix 64BIT
 
 ; Use an overaligned buffer to force base-pointer usage. Test verifies:
 ; - base pointer register (r30) is saved/defined/restored.
 ; - stack frame is allocated with correct alignment.
 ; - Address of %AlignedBuffer is calculated based off offset from the stack
 ;   pointer.
 
-define void @caller() {
+define float @caller(float %f) {
   %AlignedBuffer = alloca [32 x i32], align 32
   %Pointer = getelementptr inbounds [32 x i32], [32 x i32]* %AlignedBuffer, i64 0, i64 0
   call void @callee(i32* %Pointer)
-  ret void
+  ret float %f
 }
 
 declare void @callee(i32*)
 
 ; 32BIT-LABEL: .caller:
-; 32BIT:         stw 30, -8(1)
+; 32BIT:         stw 30, -16(1)
 ; 32BIT:         mr 30, 1
 ; 32BIT:         clrlwi  0, 1, 27
 ; 32BIT:         subfic 0, 0, -224
 ; 32BIT:         stwux 1, 1, 0
 ; 32BIT:         addi 3, 1, 64
 ; 32BIT:         bl .callee
 ; 32BIT:         lwz 1, 0(1)
-; 32BIT:         lwz 30, -8(1)
+; 32BIT:         lwz 30, -16(1)
 
 ; 64BIT-LABEL: .caller:
-; 64BIT:         std 30, -16(1)
+; 64BIT:         std 30, -24(1)
 ; 64BIT:         mr 30, 1
 ; 64BIT:         clrldi  0, 1, 59
 ; 64BIT:         subfic 0, 0, -288
 ; 64BIT:         stdux 1, 1, 0
 ; 64BIT:         addi 3, 1, 128
 ; 64BIT:         bl .callee
 ; 64BIT:         ld 1, 0(1)
-; 64BIT:         ld 30, -16(1)
+; 64BIT:         ld 30, -24(1)

llvm/test/CodeGen/PowerPC/aix-framepointer-save-restore.ll

+; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
+; RUN:   -mtriple=powerpc-ibm-aix-xcoff | FileCheck %s -check-prefix=AIX32
+
+; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
+; RUN:   -mtriple=powerpc64-ibm-aix-xcoff | FileCheck %s -check-prefixes=AIX64
+
+declare void @clobber(i32*)
+
+define dso_local float @frameptr_only(i32 %n, float %f) {
+entry:
+  %0 = alloca i32, i32 %n
+  call void @clobber(i32* %0)
+  ret float %f
+}
+
+; AIX32: stw 31, -12(1)
+; AIX32: stwu 1, -80(1)
+; AIX32: lwz 1, 0(1)
+; AIX32: lwz 31, -12(1)
+
+; AIX64: std 31, -16(1)
+; AIX64: stdu 1, -144(1)
+; AIX64: ld 1, 0(1)
+; AIX64: ld 31, -16(1)
+