[ARM] Enable outliner at -Oz for M-class

[samparker]

Summary

Enable default outlining when the function has the minsize attribute and we're targeting an m-class core. @yroux I don't want to step on your toes about this, but I would like this to be enabled by default for our downstream testing, so please say if you have any major concerns!

[SjoerdMeijer]

+1 from me

[yroux]

Hi Sam,

no worries, I thought the optim would have to bake a bit longer before being bundled into Oz, but I'm happy you propose to do it and think it will be better tested with that change.

So I'm OK with your proposal and the patch, but while working on the next Oulining mode I found a latent issue with the liveness information calcuted by the MachineOutliner, in a nutshell if-conversion can introduce a predicated BX_RET in the middle of a BB and the current implementation doesn't see that LR is not dead and needs to be saved/restored when trying to outline a chunk before this BX_RET. I'm testing a fix for that and will submit it as soon as possible, so maybe wait for it before committing it.

[samparker]

Thanks, I'm hoping that doing it just for M-class at the moment won't disrupt too many people if there are some bug to fix.

so maybe wait for it before committing it.

Sure!

[samparker]

Rebased.
Shall we do this Yvan?

[yroux]

Hi Sam,

Yes that's good for me, thanks!

llvm/lib/Target/ARM/ARMBaseInstrInfo.h

bool isMBBSafeToOutlineFrom(MachineBasicBlock &MBB,
                               unsigned &Flags) const override;
   void buildOutlinedFrame(MachineBasicBlock &MBB, MachineFunction &MF,
                           const outliner::OutlinedFunction &OF) const override;
   MachineBasicBlock::iterator
   insertOutlinedCall(Module &M, MachineBasicBlock &MBB,
                      MachineBasicBlock::iterator &It, MachineFunction &MF,
                      const outliner::Candidate &C) const override;
 
+  /// Enable outlining by default at -Oz.
+  bool shouldOutlineFromFunctionByDefault(MachineFunction &MF) const override;
+
 private:
   /// Returns an unused general-purpose register which can be used for
   /// constructing an outlined call if one exists. Returns 0 otherwise.
   unsigned findRegisterToSaveLRTo(const outliner::Candidate &C) const;
 
   unsigned getInstBundleLength(const MachineInstr &MI) const;
 
   int getVLDMDefCycle(const InstrItineraryData *ItinData,

llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp

     copyPhysReg(MBB, It, DebugLoc(), ARM::LR, Reg, true);
     It--;
     return CallPt;
   }
   // Insert the call.
   It = MBB.insert(It, CallMIB);
   return It;
 }
+bool ARMBaseInstrInfo::shouldOutlineFromFunctionByDefault(
+  MachineFunction &MF) const {
+  return Subtarget.isMClass() && MF.getFunction().hasMinSize();
+}

llvm/lib/Target/ARM/ARMTargetMachine.cpp

ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT,
 
   // ARM supports the debug entry values.
   setSupportsDebugEntryValues(true);
 
   initAsmInfo();
 
   // ARM supports the MachineOutliner.
   setMachineOutliner(true);
-  setSupportsDefaultOutlining(false);
+  setSupportsDefaultOutlining(true);
 }
 
 ARMBaseTargetMachine::~ARMBaseTargetMachine() = default;
 
 const ARMSubtarget *
 ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
   Attribute CPUAttr = F.getFnAttribute("target-cpu");
   Attribute FSAttr = F.getFnAttribute("target-features");

llvm/test/CodeGen/ARM/O3-pipeline.ll

 ; CHECK-NEXT:      Insert XRay ops
 ; CHECK-NEXT:      Implement the 'patchable-function' attribute
 ; CHECK-NEXT:      Thumb2 instruction size reduce pass
 ; CHECK-NEXT:      Unpack machine instruction bundles
 ; CHECK-NEXT:      optimise barriers pass
 ; CHECK-NEXT:      Contiguously Lay Out Funclets
 ; CHECK-NEXT:      StackMap Liveness Analysis
 ; CHECK-NEXT:      Live DEBUG_VALUE analysis
+; CHECK-NEXT:    Machine Outliner
+; CHECK-NEXT:    FunctionPass Manager
 ; CHECK-NEXT:      MachineDominator Tree Construction
 ; CHECK-NEXT:      ARM constant island placement and branch shortening pass
 ; CHECK-NEXT:      MachineDominator Tree Construction
 ; CHECK-NEXT:      Machine Natural Loop Construction
 ; CHECK-NEXT:      ReachingDefAnalysis
 ; CHECK-NEXT:      ARM Low Overhead Loops pass
 ; CHECK-NEXT:      Lazy Machine Block Frequency Analysis
 ; CHECK-NEXT:      Machine Optimization Remark Emitter
 ; CHECK-NEXT:      ARM Assembly Printer
 ; CHECK-NEXT:      Free MachineFunction

llvm/test/CodeGen/ARM/machine-outliner-tail.ll

 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=arm-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=ARM
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv7-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs \
 ; RUN: -mtriple=thumbv7-apple-darwin --stop-after=machine-outliner < %s \
 ; RUN: | FileCheck %s --check-prefix=MACHO
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv5-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB1
+; RUN: llc -verify-machineinstrs -mtriple=thumbv8m.main \
+; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 
 ; ARM-LABEL: name:            OUTLINED_FUNCTION_0
 ; ARM: $r0 = MOVi 1, 14 /* CC::al */, $noreg, $noreg
 ; ARM-NEXT: $r1 = MOVi 2, 14 /* CC::al */, $noreg, $noreg
 ; ARM-NEXT: $r2 = MOVi 3, 14 /* CC::al */, $noreg, $noreg
 ; ARM-NEXT: $r3 = MOVi 4, 14 /* CC::al */, $noreg, $noreg
 ; ARM-NEXT: TAILJMPd @z
 
 ; THUMB-LABEL: name:            OUTLINED_FUNCTION_0
 ; THUMB: $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
 ; THUMB-NEXT: $r1, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
 ; THUMB-NEXT: $r2, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
 ; THUMB-NEXT: $r3, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
 ; THUMB-NEXT: tTAILJMPdND @z, 14 /* CC::al */, $noreg
 
 ; MACHO-LABEL: name:            OUTLINED_FUNCTION_0
 ; MACHO: $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
 ; MACHO-NEXT: $r1, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
 ; MACHO-NEXT: $r2, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
 ; MACHO-NEXT: $r3, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
 ; MACHO-NEXT: tTAILJMPd @z, 14 /* CC::al */, $noreg
 
 ; THUMB1-NOT: OUTLINED_FUNCTION_0
 
-define void @a() {
+define void @a() #0 {
 entry:
   tail call void @z(i32 1, i32 2, i32 3, i32 4)
   ret void
 }
 
 declare void @z(i32, i32, i32, i32)
 
-define dso_local void @b(i32* nocapture readnone %p) {
+define dso_local void @b(i32* nocapture readnone %p) #0 {
 entry:
   tail call void @z(i32 1, i32 2, i32 3, i32 4)
   ret void
 }
+
+attributes #0 = { minsize optsize }

llvm/test/CodeGen/ARM/machine-outliner-thunk.ll

 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=armv7-- \
 ; RUN: -stop-after=machine-outliner < %s | FileCheck %s --check-prefix=ARM
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv7-- \
 ; RUN: -stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs \
 ; RUN: -mtriple=thumbv7-apple-darwin -stop-after=machine-outliner < %s \
 ; RUN: | FileCheck %s --check-prefix=MACHO
 ; RUN: llc -enable-machine-outliner -verify-machineinstrs -mtriple=thumbv5-- \
 ; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB1
+; RUN: llc -verify-machineinstrs -mtriple=thumbv8m.main \
+; RUN: --stop-after=machine-outliner < %s | FileCheck %s --check-prefix=THUMB
 
 declare i32 @thunk_called_fn(i32, i32, i32, i32)
 
-define i32 @a() {
+define i32 @a() #0 {
 ; ARM-LABEL: name:             a
 ; ARM:       bb.0.entry:
 ; ARM-NEXT:    liveins: $r11, $lr
 ; ARM:         $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_offset 8
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION offset $lr, -4
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION offset $r11, -8
 ; ARM-NEXT:    BL @OUTLINED_FUNCTION_0{{.*}}

 ; THUMB1-NOT: OUTLINED_FUNCTION_0
 
 entry:
   %call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
   %cx = add i32 %call, 8
   ret i32 %cx
 }
 
-define i32 @b() {
+define i32 @b() #0 {
 ; ARM-LABEL: name:             b
 ; ARM:       bb.0.entry:
 ; ARM-NEXT:    liveins: $r11, $lr
 ; ARM:         $sp = frame-setup STMDB_UPD $sp, 14 /* CC::al */, $noreg, killed $r11, killed $lr
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_offset 8
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION offset $lr, -4
 ; ARM-NEXT:    frame-setup CFI_INSTRUCTION offset $r11, -8
 ; ARM-NEXT:    BL @OUTLINED_FUNCTION_0{{.*}}

 ; MACHO-LABEL: name:            OUTLINED_FUNCTION_0
 ; MACHO:        bb.0:
 ; MACHO-NEXT:   liveins: $r7, $r6, $r5, $r4, $r11, $r10, $r8, $d15, $d14, $d13, $d12, $d11, $d10, $d9, $d8
 ; MACHO:        $r0, dead $cpsr = tMOVi8 1, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r1, dead $cpsr = tMOVi8 2, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r2, dead $cpsr = tMOVi8 3, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   $r3, dead $cpsr = tMOVi8 4, 14 /* CC::al */, $noreg
 ; MACHO-NEXT:   tTAILJMPd @thunk_called_fn, 14 /* CC::al */, $noreg, implicit $sp
+
+attributes #0 = { minsize optsize }