[CodeGen] Fix warnings in getPackedVectorTypeFromPredicateType

[david-arm]

Summary

Use getVectorElementCount() instead of getVectorNumElements().
The code changed in this patch is covered by an existing test:

CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll

[fpetrogalli]

HI @david-arm ,

I will not hold this patch if you disagree on the nit, but I think you should remove the tests as they seem to duplicate something that is already tested.

Ciao,

Francesco

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

4627–4630

NIT:

We could be explicit here on the PredVT that we want to use and swap the statements as follows:

if (PredVT != MVT::nxv16i1 && PredVT != MVT::nxv8i1 && ...)
  return EVT();

ElementCount EC = ...

I am also wondering whether we can remove at all the idea of using EC.Min in this code and just use TypeSize. Something like the following:

if (PredVT != MVT::nxv16i1 && PredVT != MVT::nxv8i1 && ...)
  return EVT();

// This could actually be a global in the AArch64 namespace, to be used as AArch64::SVEBits,
// I suspect it will be handy in other situations.
const auto SVEVecSize = TypeSize::Scalable(AArch64::SVEBitsPerBlock);

EVT MemVT = PredVT;
while (MemVT.getSizeInBits() < SVETySy)
  MemVT = MemVT.widenIntegerVectorElementType(Ctx);

return MemVT;

Seems like a good thing to get rid of the EC.Min here?

llvm/test/CodeGen/AArch64/sve-intrinsics-prfw.ll

1 ↗

(On Diff #266459)

These are already tested here: https://github.com/llvm/llvm-project/blob/master/llvm/test/CodeGen/AArch64/sve-intrinsics-contiguous-prefetches.ll

Any reason for re-adding them in a separate file? Or am I missing something?

[david-arm]

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

4627–4630

I think changing your first suggestion for checking the PredVT makes sense, however I don't think we should be afraid of using EC.Min here for calculations. However, I think your second suggestion is inefficient, since we are already in the AArch64 backend and we know exactly how to deal with scalable vectors. I believe calculating (SVEBitsPerBlock / EC.Min) is the right thing to do here - we know at this point EC is for a legal type, since we've already discarded illegal types.

[fpetrogalli]

LGTM, thank for the explanation.

Francesco

llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

 /// When \p PredVT is a scalable vector predicate in the form
 /// MVT::nx<M>xi1, it builds the correspondent scalable vector of
 /// integers MVT::nx<M>xi<bits> s.t. M x bits = 128. If the input
 /// PredVT is not in the form MVT::nx<M>xi1, it returns an invalid
 /// EVT.
 static EVT getPackedVectorTypeFromPredicateType(LLVMContext &Ctx, EVT PredVT) {
   if (!PredVT.isScalableVector() || PredVT.getVectorElementType() != MVT::i1)
     return EVT();
 
-  const unsigned NumElts = PredVT.getVectorNumElements();
-
-  if (NumElts != 2 && NumElts != 4 && NumElts != 8 && NumElts != 16)
+  if (PredVT != MVT::nxv16i1 && PredVT != MVT::nxv8i1 &&
+      PredVT != MVT::nxv4i1 && PredVT != MVT::nxv2i1)
     return EVT();
 
-  EVT ScalarVT = EVT::getIntegerVT(Ctx, AArch64::SVEBitsPerBlock / NumElts);
-  EVT MemVT = EVT::getVectorVT(Ctx, ScalarVT, NumElts, /*IsScalable=*/true);
+  ElementCount EC = PredVT.getVectorElementCount();
+  EVT ScalarVT = EVT::getIntegerVT(Ctx, AArch64::SVEBitsPerBlock / EC.Min);
+  EVT MemVT = EVT::getVectorVT(Ctx, ScalarVT, EC);
   return MemVT;
 }
 
 /// Return the EVT of the data associated to a memory operation in \p
 /// Root. If such EVT cannot be retrived, it returns an invalid EVT.
 static EVT getMemVTFromNode(LLVMContext &Ctx, SDNode *Root) {
   if (isa<MemSDNode>(Root))
     return cast<MemSDNode>(Root)->getMemoryVT();