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New intrinsic @llvm.get.active.lane.mask()
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Authored by SjoerdMeijer on May 26 2020, 3:52 PM.

Details

Summary

This is split off from D79100 and:

  • adds a intrinsic description/definition for @llvm.get.active.lane.mask(), and
  • describe its semantics in LangRef.

Diff Detail

Event Timeline

SjoerdMeijer created this revision.May 26 2020, 3:52 PM
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simoll added inline comments.May 28 2020, 1:01 AM
llvm/docs/LangRef.rst
16382

Since this intrinsic is really only useful (by itself) with scalable types, i guess you should add an example with scalable types here.

16409

I don't like how this is described in terms of the vector hwloop thing. If i am not mistaken, the semantics is simply:

%m[i] = icmp ule (%base + i) <= %n

is equivalent to

%m = @llvm.get.active.lane.mask(%base, %n)
16409

%VIV and %BTC are both integers now (no splat needed).

16425

This example seems a bit convoluted - i understand that this is because this is the code pattern you emit in LV. How about you drop the first two lines and call the intrinsic directly with two unspecified i64 arguments?

Hi Simon, many thanks for the feedback, comments addressed.

Minor change in Examples

simoll added inline comments.May 28 2020, 5:25 AM
llvm/docs/LangRef.rst
16416

You don't need the VIV and back-edge taken count here to describe the semantics of the intrinsic. It makes sense to mention them only in the second paragrah referring to vector hwloops. So, the first paragraph would be about the semantics and the second paragraph below would explain how this is used for hwloops.

16418

To make it clear that overflows cannot occur, you could instead say that the implied %base + i and comparison against %n is performed properly in the integer numbers (and not machine integers).

Agreed, and thanks again, comments addressed.

SjoerdMeijer retitled this revision from New intrinsc @llvm.get.active.lane.mask() to New intrinsic @llvm.get.active.lane.mask().May 28 2020, 7:18 AM

LGTM. Anybody else?

efriedma added inline comments.May 28 2020, 12:31 PM
llvm/docs/LangRef.rst
16396

The "to accomodate scalable vectors" etc. belongs in the paragraph describing the intended use-case, I think.

llvm/include/llvm/IR/Intrinsics.td
1298

We probably want a verifier check that the result is actually an i1 vector, since we can't express that in TableGen.

Added a Verifier check and test, moved that sentence to the intendend use-case paragraph.

This revision is now accepted and ready to land.May 28 2020, 2:21 PM

Many thanks for your help with this, and the reviews.

This revision was automatically updated to reflect the committed changes.