[AArch64] Fix unwind info generated by outliner.

[efriedma]

Summary

The offsets were wrong. The result is now the same as what the compiler would generate for a function that spills lr normally.

(Looking over the code, I'm concerned this doesn't work correctly on Windows, since the unwind info there is different, but that's a separate issue, I guess.)

[dmgreen]

Oh right. Nice one. I hadn't even realized it created these cfi directives (although, I'm not sure what I did expect. That they magiked out of thin air?)

I agree that these now create the same as a clang compiled function doing the same thing, and seems to work for the testcase I had that was hanging. LGTM. Thanks.

llvm/lib/Target/AArch64/AArch64InstrInfo.cpp

if (std::any_of(MBB.instr_begin(), MBB.instr_end(), IsNonTailCall)) {
     It = MBB.insert(It, STRXpre);
 
     const TargetSubtargetInfo &STI = MF.getSubtarget();
     const MCRegisterInfo *MRI = STI.getRegisterInfo();
     unsigned DwarfReg = MRI->getDwarfRegNum(AArch64::LR, true);
 
     // Add a CFI saying the stack was moved 16 B down.
     int64_t StackPosEntry =
-        MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, 16));
+        MF.addFrameInst(MCCFIInstruction::createDefCfaOffset(nullptr, -16));
     BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION))
         .addCFIIndex(StackPosEntry)
         .setMIFlags(MachineInstr::FrameSetup);
 
     // Add a CFI saying that the LR that we want to find is now 16 B higher than
     // before.
     int64_t LRPosEntry =
-        MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, DwarfReg, 16));
+        MF.addFrameInst(MCCFIInstruction::createOffset(nullptr, DwarfReg, -16));
     BuildMI(MBB, It, DebugLoc(), get(AArch64::CFI_INSTRUCTION))
         .addCFIIndex(LRPosEntry)
         .setMIFlags(MachineInstr::FrameSetup);
 
     // Insert a restore before the terminator for the function.
     MachineInstr *LDRXpost = BuildMI(MF, DebugLoc(), get(AArch64::LDRXpost))
                                  .addReg(AArch64::SP, RegState::Define)
                                  .addReg(AArch64::LR, RegState::Define)

llvm/test/CodeGen/AArch64/machine-outliner-calls.mir

 body:             |
   bb.0:
     liveins: $w0, $lr, $w8
     RET undef $lr
 
 # CHECK: name:            OUTLINED_FUNCTION_0
 # CHECK: bb.0:
 # CHECK: liveins: $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $d15, $d8, $d9, $d10, $d11, $d12, $d13, $d14, $lr
-# CHECK-DAG: frame-setup CFI_INSTRUCTION def_cfa_offset -16
-# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, 16
+# CHECK-DAG: frame-setup CFI_INSTRUCTION def_cfa_offset 16
+# CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w30, -16
 # CHECK-NEXT: early-clobber $sp = STRXpre $lr, $sp, -16
 # CHECK-NEXT: BL @baz, implicit-def dead $lr, implicit $sp
 # CHECK-NEXT: $w17 = ORRWri $wzr, 1
 # CHECK-NEXT: $w17 = ORRWri $wzr, 1
 # CHECK-NEXT: early-clobber $sp, $lr = LDRXpost $sp, 16
 # CHECK-NEXT: RET $lr