[PowerPC] Remove unnecessary XSRSP instruction in MI peephole

[qiucf]

Summary

This is found when looking at test results in D64193. Eliminate xsrsp instruction besides frsp.

[amyk]

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

544

I think it would be good if we also updated the comments and possibly the debug lines to account for the removal of XSRSP.

[steven.zhang]

LGTM as far as you address Amy's comments.

llvm/lib/Target/PowerPC/PPCMIPeephole.cpp

for (MachineInstr &MI : MBB) {
               !Register::isVirtualRegister(DefsReg2))
             break;
           MachineInstr *P1 = MRI->getVRegDef(DefsReg1);
           MachineInstr *P2 = MRI->getVRegDef(DefsReg2);
 
           if (!P1 || !P2)
             break;
 
           // Remove the passed FRSP instruction if it only feeds this MI and
           // set any uses of that FRSP (in this MI) to the source of the FRSP.
           auto removeFRSPIfPossible = [&](MachineInstr *RoundInstr) {
-            if (RoundInstr->getOpcode() == PPC::FRSP &&
+            unsigned Opc = RoundInstr->getOpcode();
+            if ((Opc == PPC::FRSP || Opc == PPC::XSRSP) &&
                 MRI->hasOneNonDBGUse(RoundInstr->getOperand(0).getReg())) {
               Simplified = true;
               Register ConvReg1 = RoundInstr->getOperand(1).getReg();
               Register FRSPDefines = RoundInstr->getOperand(0).getReg();
               MachineInstr &Use = *(MRI->use_instr_begin(FRSPDefines));
               for (int i = 0, e = Use.getNumOperands(); i < e; ++i)
                 if (Use.getOperand(i).isReg() &&
                     Use.getOperand(i).getReg() == FRSPDefines)

llvm/test/CodeGen/PowerPC/mi-simplify-code.mir

bb.0.entry:
     %10:vsrc = XXPERMDI %23, %22, 0
     %11:vrrc = XVCVDPSP killed %10, implicit $rm
     $v2 = COPY %11
     BLR8 implicit $lr8, implicit $rm, implicit $v2
 ...
 # CHECK-LABEL: remove_xsrsp
 # CHECK: sldi 4, 4, 2
 # CHECK-NEXT: lfsux 0, 3, 4
-# CHECK-NEXT: xsrsp 0, 0
+# CHECK-NOT: xsrsp
 # CHECK-NEXT: lfs 1, 8(3)
 # CHECK-NEXT: xxmrghd 0, 1, 0
 # CHECK-NEXT: xvcvdpsp 34, 0
 # CHECK-NEXT: blr