Instead of zero-extending the constant, sign-extend it and we can support 0 or negative constants.
Diff Detail
Event Timeline
- Added test for add with -1 constant and changed X86 test
I could not somehow make tests for sub. SCEV could not deduce that we won't overflow. Also, in the test file that added the test, which
seems to be the one that tests the function I changed, there was no sub whatsoever.
Moreover, I could not get SCEV to work for 0 constant. I'll have to check that again.
Other than that, one irrelevant test had to be changed. Unfortunately, by removing the cast, the codegen is worse. Previously, the slow
instruction was well.. the cast, i.e. cvtsi2sd while now we have spills and reloads.
; LSR previously eliminated the sitofp by introducing an induction ; variable which stepped by a bogus ((double)UINT32_C(-1)). It's theoretically ; possible to eliminate the sitofp using a proper -1.0 step though; this ; test should be changed if that is done.
I haven't seen that comment in llvm/test/CodeGen/X86/negative-stride-fptosi-user.ll. Apparently people have thought about that,
unfortunately the codegen is not better.
llvm/test/Transforms/LoopStrengthReduce/X86/2008-08-14-ShadowIV.ll | ||
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347 | This test should also be showing the new IV. I can see that this is currently in line with the reset of the tests here, which is a shame. Would you mind running the update script on it? |
Run update_test_checks.py over 2008-08-14-ShadowIV.ll. Added some CHECK-NOTs over it.
Thanks, LGTM. Please wait 24 hours to give the others some more time to respond though.
This test should also be showing the new IV. I can see that this is currently in line with the reset of the tests here, which is a shame. Would you mind running the update script on it?