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[ARM,MVE] Correct MC operands in VCVT.F32.F16. (NFC)
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Authored by simon_tatham on Feb 27 2020, 6:57 AM.

Details

Summary

The two MVE instructions that convert between v4f32 and v8f16 were
implemented as instances of the same class, with the same MC operand
list.

But that's not really appropriate, because the narrowing conversion
only partially overwrites its output register (it only has 4 f16
values to write into a vector of 8), so even when unpredicated, it
needs a $Qd_src input, a constraint tying that to the $Qd output, and
a vpred_n.

The widening conversion is better represented like any other
instruction that completely replaces its output when unpredicated: it
should have no $Qd_src operand, and instead, a vpred_r containing a
$inactive parameter. That's a better match to other similar
instructions, such as its integer analogue, the VMOVL instruction that
makes a v4i32 by sign- or zero-extending every other lane of a v8i16.

This commit brings the widening VCVT.F32.F16 into line with the other
instructions that behave like it. That means you can write isel
patterns that use it unpredicated, without having to add a pointless
undefined $QdSrc operand.

No existing code generation uses that instruction yet, so there should
be no functional change from this fix.

Diff Detail

Event Timeline

simon_tatham created this revision.Feb 27 2020, 6:57 AM
dmgreen accepted this revision.Feb 27 2020, 2:41 PM

LGTM

This revision is now accepted and ready to land.Feb 27 2020, 2:41 PM
This revision was automatically updated to reflect the committed changes.