[X86] Support function attribute "patchable-function-entry"

[MaskRay]

Summary

For x86-64, we diverge from GCC -fpatchable-function-entry in that we
emit multi-byte NOPs.

[merge_guards_bot]

Unit tests: fail. 61247 tests passed, 1 failed and 736 were skipped.

failed: LLVM.CodeGen/X86/patchable-function-entry.ll

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[MaskRay]

The GCC implementer did the work for Linux kernel AArch64. They probably did not think of x86 multi-byte NOP. Currently this feature is only used by the Linux kernel on arm64/parisc. I asked whether the x86 implementation should be improved https://gcc.gnu.org/ml/gcc/2020-01/msg00020.html

We don't support M!=0 (-fpatchable-function-entry=N,M). If we do, its interaction with -falign-functions=32 will be interesting. GCC apparently just simply aligns the first NOP, so the function symbol may be misaligned.

[craig.topper]

llvm/lib/Target/X86/X86MCInstLower.cpp

1601

is this longer than 80 columns?

[MaskRay]

clang-format

[merge_guards_bot]

Unit tests: pass. 61250 tests passed, 0 failed and 736 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: pass.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[craig.topper]

LGTM

[nickdesaulniers]

llvm/lib/Target/X86/X86MCInstLower.cpp

1604

Sounds like this may be updated based on @ostannard 's comment in https://reviews.llvm.org/D72215#inline-653987.

[MaskRay]

Implement .section __patchable_function_entries,"aw",@progbits

[merge_guards_bot]

Unit tests: pass. 61276 tests passed, 0 failed and 736 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: pass.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[MaskRay]

Rebase.

[nickdesaulniers]

llvm/lib/Target/X86/X86MCInstLower.cpp

1607

Can llvm::Attribute::getValueAsInt() be used here?

[merge_guards_bot]

Unit tests: pass. 61759 tests passed, 0 failed and 780 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: pass.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

llvm/lib/Target/X86/X86MCInstLower.cpp

if (Is64Bits) {
     }
   }
 }
 
 /// Emit the largest nop instruction smaller than or equal to \p NumBytes
 /// bytes.  Return the size of nop emitted.
 static unsigned EmitNop(MCStreamer &OS, unsigned NumBytes, bool Is64Bit,
                         const MCSubtargetInfo &STI) {
-  // This works only for 64bit. For 32bit we have to do additional checking if
-  // the CPU supports multi-byte nops.
-  assert(Is64Bit && "EmitNops only supports X86-64");
+  if (!Is64Bit) {
+    // TODO Do additional checking if the CPU supports multi-byte nops.
+    OS.EmitInstruction(MCInstBuilder(X86::NOOP), STI);
+    return 1;
+  }
 
   unsigned NopSize;
   unsigned Opc, BaseReg, ScaleVal, IndexReg, Displacement, SegmentReg;
   IndexReg = Displacement = SegmentReg = 0;
   BaseReg = X86::RAX;
   ScaleVal = 1;
   switch (NumBytes) {
   case 0:
void X86AsmPrinter::LowerPATCHABLE_TYPED_EVENT_CALL(const MachineInstr &MI,
   // Record the sled version.
   recordSled(CurSled, MI, SledKind::TYPED_EVENT, 0);
 }
 
 void X86AsmPrinter::LowerPATCHABLE_FUNCTION_ENTER(const MachineInstr &MI,
                                                   X86MCInstLower &MCIL) {
 
   NoAutoPaddingScope NoPadScope(*OutStreamer);
 
+  const Function &F = MF->getFunction();
+  if (F.hasFnAttribute("patchable-function-entry")) {
+    unsigned Num;
+    if (F.getFnAttribute("patchable-function-entry")
+            .getValueAsString()
+            .getAsInteger(10, Num))
+      return;
+    EmitNops(*OutStreamer, Num, Subtarget->is64Bit(), getSubtargetInfo());
+    return;
+  }
   // We want to emit the following pattern:
   //
   //   .p2align 1, ...
   // .Lxray_sled_N:
   //   jmp .tmpN
   //   # 9 bytes worth of noops
   //
   // We need the 9 bytes because at runtime, we'd be patching over the full 11

llvm/test/CodeGen/X86/patchable-function-entry.ll

+; RUN: llc -mtriple=i386 %s -o - | FileCheck --check-prefixes=CHECK,NOFSECT,32 %s
+; RUN: llc -mtriple=x86_64 %s -o - | FileCheck --check-prefixes=CHECK,NOFSECT,64 %s
+
+define void @f0() "patchable-function-entry"="0" {
+; CHECK-LABEL: f0:
+; CHECK-NEXT: .Lfunc_begin0:
+; CHECK-NOT:   nop
+; CHECK:       ret
+; CHECK:       .section __patchable_function_entries,"awo",@progbits,f0,unique,0
+; 32:          .p2align 2
+; 32-NEXT:     .long .Lfunc_begin0
+; 64:          .p2align 3
+; 64-NEXT:     .quad .Lfunc_begin0
+  ret void
+}
+
+define void @f1() "patchable-function-entry"="1" {
+; CHECK-LABEL: f1:
+; CHECK:       nop
+; CHECK-NEXT:  ret
+; NOFSECT:     .section __patchable_function_entries,"awo",@progbits,f0,unique,0
+; FSECT:       .section __patchable_function_entries,"awo",@progbits,f1,unique,1
+; 32:          .p2align 2
+; 32-NEXT:     .long .Lfunc_begin1
+; 64:          .p2align 3
+; 64-NEXT:     .quad .Lfunc_begin1
+  ret void
+}
+
+$f3 = comdat any
+define void @f3() "patchable-function-entry"="3" comdat {
+; CHECK-LABEL: f3:
+; 32-COUNT-3:  nop
+; 64:          nopl (%rax)
+; CHECK:       ret
+; NOFSECT:     .section __patchable_function_entries,"aGwo",@progbits,f3,comdat,f3,unique,1
+; FSECT:       .section __patchable_function_entries,"aGwo",@progbits,f3,comdat,f3,unique,2
+; 32:          .p2align 2
+; 32-NEXT:     .long .Lfunc_begin2
+; 64:          .p2align 3
+; 64-NEXT:     .quad .Lfunc_begin2
+  ret void
+}
+
+$f5 = comdat any
+define void @f5() "patchable-function-entry"="5" comdat {
+; CHECK-LABEL: f5:
+; 32-COUNT-5:  nop
+; 64:          nopl 8(%rax,%rax)
+; CHECK-NEXT:  ret
+; NOFSECT      .section __patchable_function_entries,"aGwo",@progbits,f5,comdat,f5,unique,2
+; FSECT:       .section __patchable_function_entries,"aGwo",@progbits,f5,comdat,f5,unique,3
+; 32:          .p2align 2
+; 32-NEXT:     .long .Lfunc_begin3
+; 64:          .p2align 3
+; 64-NEXT:     .quad .Lfunc_begin3
+  ret void
+}