[clang-tidy] new altera kernel name restriction check

[ffrankies]

Summary

This lint check is part of the FLOCL (FPGA Linters for OpenCL) project out of the Synergy Lab at Virginia Tech.

FLOCL is a set of lint checks aimed at FPGA developers who code in OpenCL.

The altera kernel name restriction check finds kernel files and include directives whose filename is "kernel.cl", "Verilog.cl", or "VHDL.cl". Such kernel file names cause the Altera Offline Compiler to generate intermediate design files that have the same names as certain internal files, which leads to a compilation error.

As per the "Guidelines for Naming the Kernel" section in the "Intel FPGA SDK for OpenCL Pro Edition: Programming Guide."

Depends on D66564 due to the altera module being introduced there.

[Eugene.Zelenko]

clang-tidy/altera/KernelNameRestrictionCheck.cpp

22

Please separate with empty line.

47

Please separate with empty line.

docs/ReleaseNotes.rst

79

Please fix indentation and use single back-ticks to highlight file names. Same in documentation.

docs/clang-tidy/checks/altera-kernel-name-restriction.rst

14

May be link is better?

[Eugene.Zelenko]

clang-tidy/altera/KernelNameRestrictionCheck.cpp

14

Please include string, vector

70

Please don't use auto unless type is not spelled in same statement or iterator.

71

Please don't use auto unless type is not spelled in same statement or iterator.

83

Please don't use auto unless type is not spelled in same statement or iterator.

85

Please don't use auto unless type is not spelled in same statement or iterator.

[ffrankies]

Implemented changes requested by @Eugene.Zelenko:

• Added empty lines around namespace block
• Fixed use of auto keyword
• Fixed formatting in documentation
• Added dependency on previous revision (D66564) to the Summary.

[ffrankies]

• Updated underlying repo to https://github.com/llvm/llvm-project
• Removed braces from one-line if-statements

[ffrankies]

• Rebased code and fixed merge conflicts with D66564
• Added KernelNameRestrictionCheck.cpp to BUILD.gn

[Eugene.Zelenko]

clang-tools-extra/docs/clang-tidy/checks/altera-kernel-name-restriction.rst

4 ↗

(On Diff #294215)

Please make same length as text above.

[aaron.ballman]

clang-tools-extra/clang-tidy/altera/KernelNameRestrictionCheck.cpp

53 ↗

(On Diff #294215)

You can elide the identifier ModuleExpanderPP since it's not used in the call.

74–76 ↗

(On Diff #294215)

Rather than do path manipulations manually, I'd rather use llvm::sys::path::filename()

78 ↗

(On Diff #294215)

clang-tidy diagnostics are not meant to be grammatically correct, so I think this should be something more like: including '%0' may cause additional compilation errors due to the name of the file; consider renaming the included file and pass in the name of the file being included.

86–88 ↗

(On Diff #294215)

Similar here about using filesystem utilities.

90 ↗

(On Diff #294215)

Similar here, I would word it something like: compiling a source file named '%0' may result in additional compilation errors due to the name of the file; consider renaming the source file

clang-tools-extra/test/clang-tidy/checkers/altera-kernel-name-restriction.cpp

40 ↗

(On Diff #294215)

I assume it's also fine if the user does something really weird like: #include "kernel.cl/foo.h" ?

[ffrankies]

Addressed changes requested by @Eugene.Zelenko and @aaron.ballman

[aaron.ballman]

clang-tools-extra/clang-tidy/altera/KernelNameRestrictionCheck.cpp

90 ↗

(On Diff #294215)

The diagnostic here doesn't look quite right. This is the case where the source compiland is named poorly, but the diagnostic is talking about including files. It looks like there's test coverage missing for this.

[ffrankies]

Addressed comments by @aaron.ballman regarding the diagnostic warning.

I tried to add a test case for when the filename is kernel.cl, verilog.cl, or vhdl.cl, but that did not work because the test suite appends .tmp.cpp to the end of the test files, and kernel.cl.tmp.cpp is not a restricted filename. If you know of a way to include this test case in the test suite, please let me know. In the meantime, I tested this functionality manually, and found a minor bug that has since been fixed.

The bug was: if kernel.cl does not have any include directives, then the warning would not show up. Fixed this by rearranging the code to check the main file name before checking the include directives.

[aaron.ballman]

In D72218#2334787, @ffrankies wrote:

Addressed comments by @aaron.ballman regarding the diagnostic warning.

I tried to add a test case for when the filename is kernel.cl, verilog.cl, or vhdl.cl, but that did not work because the test suite appends .tmp.cpp to the end of the test files, and kernel.cl.tmp.cpp is not a restricted filename. If you know of a way to include this test case in the test suite, please let me know.

Oh, that's an interesting fact I hadn't considered before. I don't know of a better way to do that.

In the meantime, I tested this functionality manually, and found a minor bug that has since been fixed.

Great!

The bug was: if kernel.cl does not have any include directives, then the warning would not show up. Fixed this by rearranging the code to check the main file name before checking the include directives.

That makes sense to me.

The check LGTM aside from some minor nits. If you need me to commit on your behalf once you've made the changes, just let me know. Thanks!

clang-tools-extra/clang-tidy/altera/KernelNameRestrictionCheck.cpp

60–63 ↗

(On Diff #298601)

It looks like you can leave a bunch of identifiers off the parameters to shorten the declaration and avoid unused parameter diagnostics in some compilers.

73–74 ↗

(On Diff #298601)

Rather than duplicate the checking logic here and below, I'd like a small helper function to check whether the name is problematic that gets called from both places.

clang-tools-extra/docs/clang-tidy/checks/altera-kernel-name-restriction.rst

7 ↗

(On Diff #298601)

We should explicitly document that the check is case insensitive.

[ffrankies]

Implemented changes requested by @aaron.ballman

• Added a helper function that implements the string comparison logic
• Clarified that check is case insensitive
• Removed unused identifiers from KernelNameRestrictionPPCallbacks::InclusionDirective function

[ffrankies]

@aaron.ballman Can you please commit this on my behalf? My github username is ffrankies.

And could you take a look at D72241 altera single work item barrier check? It's also been updated and awaiting review.

clang-tools-extra/clang-tidy/altera/KernelNameRestrictionCheck.cpp

90 ↗

(On Diff #294215)

My bad, I copied this line over the from other diagnostic and didn't change "including" to "compiling". Will update shortly

clang-tools-extra/test/clang-tidy/checkers/altera-kernel-name-restriction.cpp

40 ↗

(On Diff #294215)

Yes, this is fine. The guide only specifies potential errors when the kernel source file is named kernel.cl, verilog.cl, or vhdl.cl.

I've added additional test cases that use these names as directory names below.

[aaron.ballman]

In D72218#2364297, @ffrankies wrote:

@aaron.ballman Can you please commit this on my behalf? My github username is ffrankies.

I've commit on your behalf in 43a38a65233039b5e71797a644d41a890f8d7f2b, thank you!

And could you take a look at D72241 altera single work item barrier check? It's also been updated and awaiting review.

I'll take a look, thank you for pinging it.

[ffrankies]

Moved test files KERNEL.cl, VHDL.cl and vERILOG.cl to the uppercase subdirectory to prevent filename clashes in some environments.

This is in response to the buildbot failure where Verilog.cl, KERNEL.cl, and VHDL.cl were not present in the buildbot output despite showing up as present in Differential.

@aaron.ballman Can you please try committing this again?

[aaron.ballman]

In D72218#2381149, @ffrankies wrote:

Moved test files KERNEL.cl, VHDL.cl and vERILOG.cl to the uppercase subdirectory to prevent filename clashes in some environments.

This is in response to the buildbot failure where Verilog.cl, KERNEL.cl, and VHDL.cl were not present in the buildbot output despite showing up as present in Differential.

@aaron.ballman Can you please try committing this again?

I've recommit in 9ca6fc4e095f9aacd70e406e640472ad2d370553, thanks!

clang-tidy/CMakeLists.txt

target_link_libraries(clangTidy PRIVATE
     clangStaticAnalyzerFrontend
   )
 endif()
 
 # Checks.
 # If you add a check, also add it to ClangTidyForceLinker.h in this directory.
 add_subdirectory(android)
 add_subdirectory(abseil)
+add_subdirectory(altera)
 add_subdirectory(boost)
 add_subdirectory(bugprone)
 add_subdirectory(cert)
 add_subdirectory(cppcoreguidelines)
 add_subdirectory(darwin)
 add_subdirectory(fuchsia)
 add_subdirectory(google)
 add_subdirectory(hicpp)
 add_subdirectory(linuxkernel)
 add_subdirectory(llvm)
 add_subdirectory(misc)
 add_subdirectory(modernize)
 if(CLANG_ENABLE_STATIC_ANALYZER)
   add_subdirectory(mpi)
 endif()
 add_subdirectory(objc)
 add_subdirectory(openmp)
 add_subdirectory(performance)
 add_subdirectory(portability)
 add_subdirectory(readability)
 add_subdirectory(zircon)
 set(ALL_CLANG_TIDY_CHECKS
   clangTidyAndroidModule
   clangTidyAbseilModule
+  clangTidyAlteraModule
   clangTidyBoostModule
   clangTidyBugproneModule
   clangTidyCERTModule
   clangTidyCppCoreGuidelinesModule
   clangTidyDarwinModule
   clangTidyFuchsiaModule
   clangTidyGoogleModule
   clangTidyHICPPModule

clang-tidy/ClangTidyForceLinker.h

 static int LLVM_ATTRIBUTE_UNUSED CERTModuleAnchorDestination =
     CERTModuleAnchorSource;
 
 // This anchor is used to force the linker to link the AbseilModule.
 extern volatile int AbseilModuleAnchorSource;
 static int LLVM_ATTRIBUTE_UNUSED AbseilModuleAnchorDestination =
     AbseilModuleAnchorSource;
 
+// This anchor is used to force the linker to link the AlteraModule.
+extern volatile int AlteraModuleAnchorSource;
+static int LLVM_ATTRIBUTE_UNUSED AlteraModuleAnchorDestination =
+    AlteraModuleAnchorSource;
+
 // This anchor is used to force the linker to link the BoostModule.
 extern volatile int BoostModuleAnchorSource;
 static int LLVM_ATTRIBUTE_UNUSED BoostModuleAnchorDestination =
     BoostModuleAnchorSource;
 
 // This anchor is used to force the linker to link the BugproneModule.
 extern volatile int BugproneModuleAnchorSource;
 static int LLVM_ATTRIBUTE_UNUSED BugproneModuleAnchorDestination =

clang-tidy/altera/AlteraTidyModule.cpp

+//===--- AlteraTidyModule.cpp - clang-tidy --------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "../ClangTidy.h"
+#include "../ClangTidyModule.h"
+#include "../ClangTidyModuleRegistry.h"
+#include "KernelNameRestrictionCheck.h"
+
+using namespace clang::ast_matchers;
+
+namespace clang {
+namespace tidy {
+namespace altera {
+
+class AlteraModule : public ClangTidyModule {
+public:
+  void addCheckFactories(ClangTidyCheckFactories &CheckFactories) override {
+    CheckFactories.registerCheck<KernelNameRestrictionCheck>(
+        "altera-kernel-name-restriction");
+  }
+};
+
+} // namespace altera
+
+// Register the AlteraTidyModule using this statically initialized variable.
+static ClangTidyModuleRegistry::Add<altera::AlteraModule>
+    X("altera-module", "Adds Altera FPGA OpenCL lint checks.");
+
+// This anchor is used to force the linker to link in the generated object file
+// and thus register the AlteraModule.
+volatile int AlteraModuleAnchorSource = 0;
+
+} // namespace tidy
+} // namespace clang

clang-tidy/altera/CMakeLists.txt

+set(LLVM_LINK_COMPONENTS support)
+
+add_clang_library(clangTidyAlteraModule
+  AlteraTidyModule.cpp
+  KernelNameRestrictionCheck.cpp
+
+  LINK_LIBS
+  clangAnalysis
+  clangAST
+  clangASTMatchers
+  clangBasic
+  clangLex
+  clangTidy
+  clangTidyUtils
+  )

clang-tidy/altera/KernelNameRestrictionCheck.h

+//===--- KernelNameRestrictionCheck.h - clang-tidy --------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_ALTERA_KERNEL_NAME_RESTRICTION_CHECK_H
+#define LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_ALTERA_KERNEL_NAME_RESTRICTION_CHECK_H
+
+#include "../ClangTidy.h"
+
+namespace clang {
+namespace tidy {
+namespace altera {
+
+/// Flags kernel files that are named `kernel.cl`, `Verilog.cl` or `VHDL.cl` as
+/// warnings, since this may lead to intermediate files being generated that
+/// have the same names as certain internal files, leading to compiler errors.
+///
+/// For the user-facing documentation see:
+/// http://clang.llvm.org/extra/clang-tidy/checks/altera-kernel-name-restriction.html
+class KernelNameRestrictionCheck : public ClangTidyCheck {
+public:
+  KernelNameRestrictionCheck(StringRef Name, ClangTidyContext *Context)
+      : ClangTidyCheck(Name, Context) {}
+  void registerPPCallbacks(const SourceManager &SM, Preprocessor *PP,
+                           Preprocessor *ModuleExpanderPP) override;
+};
+
+} // namespace altera
+} // namespace tidy
+} // namespace clang
+
+#endif // LLVM_CLANG_TOOLS_EXTRA_CLANG_TIDY_ALTERA_KERNEL_NAME_RESTRICTION_CHECK_H

clang-tidy/altera/KernelNameRestrictionCheck.cpp

+//===--- KernelNameRestrictionCheck.cpp - clang-tidy ----------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "KernelNameRestrictionCheck.h"
+#include "clang/Frontend/CompilerInstance.h"
+#include "clang/Lex/PPCallbacks.h"
+#include "clang/Lex/Preprocessor.h"
+#include <string>
+#include <vector>
+
+using namespace clang::ast_matchers;
+
+namespace clang {
+namespace tidy {
+namespace altera {
+
+namespace {
+
+class KernelNameRestrictionPPCallbacks : public PPCallbacks {
+public:
+  explicit KernelNameRestrictionPPCallbacks(ClangTidyCheck &Check,
+                                            const SourceManager &SM)
+      : Check(Check), SM(SM) {}
+
+  void InclusionDirective(SourceLocation HashLoc, const Token &IncludeTok,
+                          StringRef FileName, bool IsAngled,
+                          CharSourceRange FileNameRange, const FileEntry *File,
+                          StringRef SearchPath, StringRef RelativePath,
+                          const Module *Imported,
+                          SrcMgr::CharacteristicKind FileType) override;
+
+  void EndOfMainFile() override;
+
+private:
+  struct IncludeDirective {
+    SourceLocation Loc;   // Location in the include directive.
+    std::string Filename; // Filename as a string.
+  };
+  std::vector<IncludeDirective> IncludeDirectives;
+
+  ClangTidyCheck &Check;
+  const SourceManager &SM;
+};
+
+} // namespace
+
+void KernelNameRestrictionCheck::registerPPCallbacks(
+    const SourceManager &SM, Preprocessor *PP, Preprocessor *ModuleExpanderPP) {
+  PP->addPPCallbacks(
+      std::make_unique<KernelNameRestrictionPPCallbacks>(*this, SM));
+}
+
+void KernelNameRestrictionPPCallbacks::InclusionDirective(
+    SourceLocation HashLoc, const Token &IncludeTok, StringRef FileName,
+    bool IsAngled, CharSourceRange FilenameRange, const FileEntry *File,
+    StringRef SearchPath, StringRef RelativePath, const Module *Imported,
+    SrcMgr::CharacteristicKind FileType) {
+  IncludeDirective ID = {HashLoc, FileName};
+  IncludeDirectives.push_back(std::move(ID));
+}
+
+void KernelNameRestrictionPPCallbacks::EndOfMainFile() {
+  if (IncludeDirectives.empty())
+    return;
+
+  // Check included files for restricted names.
+  for (const IncludeDirective &ID : IncludeDirectives) {
+    StringRef FilePath = StringRef(ID.Filename);
+    StringRef FileName = FilePath.substr(FilePath.find_last_of("/\\") + 1);
+    if (FileName.equals_lower("kernel.cl") ||
+        FileName.equals_lower("verilog.cl") ||
+        FileName.equals_lower("vhdl.cl")) {
+      Check.diag(ID.Loc,
+                 "The imported kernel source file is named 'kernel.cl',"
+                 "'Verilog.cl', or 'VHDL.cl', which could cause compilation "
+                 "errors.");
+    }
+  }
+
+  // Check main file for restricted names.
+  const FileEntry *Entry = SM.getFileEntryForID(SM.getMainFileID());
+  StringRef FilePath = Entry->getName();
+  StringRef FileName = FilePath.substr(FilePath.find_last_of("/\\") + 1);
+  if (FileName.equals_lower("kernel.cl") ||
+      FileName.equals_lower("verilog.cl") || FileName.equals_lower("vhdl.cl")) {
+    Check.diag(SM.getLocForStartOfFile(SM.getMainFileID()),
+               "Naming your OpenCL kernel source file 'kernel.cl', 'Verilog.cl'"
+               ", or 'VHDL.cl' could cause compilation errors.");
+  }
+}
+
+} // namespace altera
+} // namespace tidy
+} // namespace clang

docs/ReleaseNotes.rst

 Improvements to clang-rename
 ----------------------------
 
 The improvements are...
 
 Improvements to clang-tidy
 --------------------------
 
+- New :doc:`altera <clang-tidy/modules/altera>` module.
+
+  Includes checks related to OpenCL for FPGA coding guidelines, based on the
+  `Altera SDK for OpenCL: Best Practices Guide
+  <https://www.altera.com/en_US/pdfs/literature/hb/opencl-sdk/aocl_optimization_guide.pdf>`_.
+
+- New :doc:`altera-kernel-name-restriction
+  <clang-tidy/checks/altera-kernel-name-restriction>` check.
+
+  Checks for cases where the kernel source file is named `kernel.cl`,
+  `Verilog.cl`, or `VHDL.cl`.
+
 - New :doc:`bugprone-dynamic-static-initializers
   <clang-tidy/checks/bugprone-dynamic-static-initializers>` check.
 
   Finds instances where variables with static storage are initialized
   dynamically in header files.
 
 - New :doc:`bugprone-infinite-loop
   <clang-tidy/checks/bugprone-infinite-loop>` check.

docs/clang-tidy/checks/altera-kernel-name-restriction.rst

+.. title:: clang-tidy - altera-kernel-name-restriction
+
+altera-kernel-name-restriction
+============================
+
+Finds kernel files and include directives whose filename is `kernel.cl`, 
+`Verilog.cl`, or `VHDL.cl`.
+
+Such kernel file names cause the offline compiler to generate intermediate 
+design files that have the same names as certain internal files, which 
+leads to a compilation error.
+
+Based on the `Guidelines for Naming the Kernel` section in the 
+`Intel FPGA SDK for OpenCL Pro Edition: Programming Guide
+<https://www.intel.com/content/www/us/en/programmable/documentation/mwh1391807965224.html#ewa1412973930963>`_.

docs/clang-tidy/checks/list.rst

.. toctree::
    abseil-no-internal-dependencies
    abseil-no-namespace
    abseil-redundant-strcat-calls
    abseil-str-cat-append
    abseil-string-find-startswith
    abseil-time-comparison
    abseil-time-subtraction
    abseil-upgrade-duration-conversions
+   altera-kernel-name-restriction
    android-cloexec-accept
    android-cloexec-accept4
    android-cloexec-creat
    android-cloexec-dup
    android-cloexec-epoll-create
    android-cloexec-epoll-create1
    android-cloexec-fopen
    android-cloexec-inotify-init

docs/clang-tidy/index.rst

 
 There are currently the following groups of checks:
 
 ====================== =========================================================
 Name prefix            Description
 ====================== =========================================================
 ``abseil-``            Checks related to Abseil library.
 ``android-``           Checks related to Android.
+``altera-``            Checks related to OpenCL programming for FPGAs.
 ``boost-``             Checks related to Boost library.
 ``bugprone-``          Checks that target bugprone code constructs.
 ``cert-``              Checks related to CERT Secure Coding Guidelines.
 ``cppcoreguidelines-`` Checks related to C++ Core Guidelines.
 ``clang-analyzer-``    Clang Static Analyzer checks.
 ``fuchsia-``           Checks related to Fuchsia coding conventions.
 ``google-``            Checks related to Google coding conventions.
 ``hicpp-``             Checks related to High Integrity C++ Coding Standard.

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/KERNEL.cl

+const int KERNELINT2 = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/VHDL.cl

+const int VHDLINT = 3;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/Verilog.cl

+const int VERILOGINT = 2;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/kernel.h

+const int KERNELINT3 = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/kernel.cl

+const int KERNELINT = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/other_Verilog.cl

+const int OTHERVERILOGINT = 2;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/otherdir/vhdl.cl

+const int OTHERDIRVHDLINT = 3;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/otherthing.cl

+const int OTHERTHINGINT = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/some/dir/kernel.cl

+const int SOMEDIRKERNELINT = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/some_kernel.cl

+const int SOMEKERNELINT = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/somedir/verilog.cl

+const int SOMEDIRVERILOGINT = 2;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/thing.h

+const int THINGINT = 1;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/vERILOG.cl

+const int VERILOGINT2 = 2;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/verilog.h

+const int VERILOGINT3 = 2;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/vhdl.h

+const int VHDLINT3 = 3;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/vhdl.CL

+const int VHDLINT2 = 3;

test/clang-tidy/checkers/Inputs/altera-kernel-name-restriction/vhdl_number_two.cl

+const int VHDLNUMBERTWOINT = 3;

test/clang-tidy/checkers/altera-kernel-name-restriction.cpp

+// RUN: %check_clang_tidy %s altera-kernel-name-restriction %t -- -- -I%S/Inputs/altera-kernel-name-restriction
+
+// These are the banned kernel filenames, and should trigger warnings
+#include "kernel.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "Verilog.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "VHDL.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+
+// The warning should be triggered regardless of capitalization
+#include "KERNEL.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "vERILOG.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "vhdl.CL"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+
+// The warning should be triggered if the names are within a directory
+#include "some/dir/kernel.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "somedir/verilog.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+#include "otherdir/vhdl.cl"
+// CHECK-MESSAGES: :[[@LINE-1]]:1: warning: The imported kernel source file is named 'kernel.cl','Verilog.cl', or 'VHDL.cl', which could cause compilation errors. [altera-kernel-name-restriction]
+
+// There are no FIX-ITs for the altera-kernel-name-restriction lint check
+
+// The following include directives shouldn't trigger the warning
+#include "otherthing.cl"
+#include "thing.h"
+
+// It doesn't make sense to have kernel.h, verilog.h, or vhdl.h as filenames without the corresponding .cl files,
+// but the Altera Programming Guide doesn't explicitly forbid it
+#include "kernel.h"
+#include "verilog.h"
+#include "vhdl.h"
+
+// The files can still have the forbidden names in them, so long as they're not the entire file name
+#include "some_kernel.cl"
+#include "other_Verilog.cl"
+#include "vhdl_number_two.cl"