[AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below

[pbarrio]

Summary

The Pointer Authentication Extension (PAC) was added in Armv8.3-A. Some
instructions are implemented in the HINT space to allow compiling code
common to CPUs regardless of whether they feature PAC or not, and still
benefit from PAC protection in the PAC-enabled CPUs.

The 8.3-specific mnemonics were currently enabled in any architecture, and
LLVM was emitting them in assembly files when PAC code generation was
enabled. This was ok for compilations where both LLVM codegen and the
integrated assembler were used. However, the LLVM codegen was not
compatible with other assemblers (e.g. GAS). Given the fact that the
approach from these assemblers (i.e. to disallow Armv8.3-A mnemonics if
compiling for Armv8.2-A or lower) is entirely reasonable, this patch makes
LLVM to emit HINT when building for Armv8.2-A and below, instead of
PACIASP, AUTIASP and friends. Then, LLVM assembly should be compatible
with other assemblers.

[pbarrio]

Ping

[samparker]

LGTM

[pbarrio]

Updated tests and rebase conflict with new "isAuthenticated" predicate

llvm/lib/Target/AArch64/AArch64InstrInfo.td

def : Pat<(Ty (int_aarch64_neon_vcadd_rot90 (Ty V128:$Rn), (Ty V128:$Rm))),
               (!cast<Instruction>("FCADD"#Ty) (Ty V128:$Rn), (Ty V128:$Rm), (i32 0))>;
     def : Pat<(Ty (int_aarch64_neon_vcadd_rot270 (Ty V128:$Rn), (Ty V128:$Rm))),
               (!cast<Instruction>("FCADD"#Ty) (Ty V128:$Rn), (Ty V128:$Rm), (i32 1))>;
   }
 }
 
 // v8.3a Pointer Authentication
 // These instructions inhabit part of the hint space and so can be used for
-// armv8 targets
+// armv8 targets. Keeping the old HINT mnemonic when compiling without PA is
+// important for compatibility with other assemblers (e.g. GAS) when building
+// software compatible with both CPUs that do or don't implement PA.
 let Uses = [LR], Defs = [LR] in {
-  def PACIAZ   : SystemNoOperands<0b000, "paciaz">;
-  def PACIBZ   : SystemNoOperands<0b010, "pacibz">;
+  def PACIAZ   : SystemNoOperands<0b000, "hint #24">;
+  def PACIBZ   : SystemNoOperands<0b010, "hint #26">;
   let isAuthenticated = 1 in {
-    def AUTIAZ   : SystemNoOperands<0b100, "autiaz">;
-    def AUTIBZ   : SystemNoOperands<0b110, "autibz">;
+    def AUTIAZ   : SystemNoOperands<0b100, "hint #28">;
+    def AUTIBZ   : SystemNoOperands<0b110, "hint #30">;
   }
 }
 let Uses = [LR, SP], Defs = [LR] in {
-  def PACIASP  : SystemNoOperands<0b001, "paciasp">;
-  def PACIBSP  : SystemNoOperands<0b011, "pacibsp">;
+  def PACIASP  : SystemNoOperands<0b001, "hint #25">;
+  def PACIBSP  : SystemNoOperands<0b011, "hint #27">;
   let isAuthenticated = 1 in {
-    def AUTIASP  : SystemNoOperands<0b101, "autiasp">;
-    def AUTIBSP  : SystemNoOperands<0b111, "autibsp">;
+    def AUTIASP  : SystemNoOperands<0b101, "hint #29">;
+    def AUTIBSP  : SystemNoOperands<0b111, "hint #31">;
   }
 }
 let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in {
-  def PACIA1716  : SystemNoOperands<0b000, "pacia1716">;
-  def PACIB1716  : SystemNoOperands<0b010, "pacib1716">;
+  def PACIA1716  : SystemNoOperands<0b000, "hint #8">;
+  def PACIB1716  : SystemNoOperands<0b010, "hint #10">;
   let isAuthenticated = 1 in {
-    def AUTIA1716  : SystemNoOperands<0b100, "autia1716">;
-    def AUTIB1716  : SystemNoOperands<0b110, "autib1716">;
+    def AUTIA1716  : SystemNoOperands<0b100, "hint #12">;
+    def AUTIB1716  : SystemNoOperands<0b110, "hint #14">;
   }
 }
 
 let Uses = [LR], Defs = [LR], CRm = 0b0000 in {
-  def XPACLRI   : SystemNoOperands<0b111, "xpaclri">;
+  def XPACLRI   : SystemNoOperands<0b111, "hint #7">;
 }
 
-// These pointer authentication isntructions require armv8.3a
+// These pointer authentication instructions require armv8.3a
 let Predicates = [HasPA] in {
+
+  // When compiling with PA, there is a better mnemonic for these instructions.
+  def : InstAlias<"paciaz", (PACIAZ), 1>;
+  def : InstAlias<"pacibz", (PACIBZ), 1>;
+  def : InstAlias<"autiaz", (AUTIAZ), 1>;
+  def : InstAlias<"autibz", (AUTIBZ), 1>;
+  def : InstAlias<"paciasp", (PACIASP), 1>;
+  def : InstAlias<"pacibsp", (PACIBSP), 1>;
+  def : InstAlias<"autiasp", (AUTIASP), 1>;
+  def : InstAlias<"autibsp", (AUTIBSP), 1>;
+  def : InstAlias<"pacia1716", (PACIA1716), 1>;
+  def : InstAlias<"pacib1716", (PACIB1716), 1>;
+  def : InstAlias<"autia1716", (AUTIA1716), 1>;
+  def : InstAlias<"autib1716", (AUTIB1716), 1>;
+  def : InstAlias<"xpaclri", (XPACLRI), 1>;
+
   multiclass SignAuth<bits<3> prefix, bits<3> prefix_z, string asm> {
     def IA   : SignAuthOneData<prefix, 0b00, !strconcat(asm, "ia")>;
     def IB   : SignAuthOneData<prefix, 0b01, !strconcat(asm, "ib")>;
     def DA   : SignAuthOneData<prefix, 0b10, !strconcat(asm, "da")>;
     def DB   : SignAuthOneData<prefix, 0b11, !strconcat(asm, "db")>;
     def IZA  : SignAuthZero<prefix_z, 0b00, !strconcat(asm, "iza")>;
     def DZA  : SignAuthZero<prefix_z, 0b10, !strconcat(asm, "dza")>;
     def IZB  : SignAuthZero<prefix_z, 0b01, !strconcat(asm, "izb")>;

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-cfi.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 ; Function a's outlining candidate contains a sp modifying add without a
 ; corresponsing sub, so we shouldn't outline it.
 define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" {
-; CHECK-LABEL:      a:                                     // @a
-; CHECK:            // %bb.0:
-; CHECK-NEXT:           .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
-; CHECK-NEXT:           .cfi_negate_ra_state
+; CHECK-LABEL:         a:                     // @a
+; CHECK:               // %bb.0:
+; CHECK-NEXT:          .cfi_b_key_frame
+; V8A-NEXT:            hint #27
+; V83A-NEXT:           pacibsp
+; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
 ; CHECK-NOT:          bl OUTLINED_FUNCTION_{{[0-9]+}}
-; CHECK:              autibsp
-; CECK-NEXT:          ret
+; V8A:                hint #31
+; V83A:               autibsp
+; CHECK-NEXT:         ret
   ret void
 }
 
 define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
 ; CHECK-LABEL:      b:                                     // @b
 ; CHECK-NEXT:       // %bb.0:
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:         hint #27
+; V83A-NEXT:        pacibsp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
 ; CHECK:                bl [[OUTLINED_FUNC:OUTLINED_FUNCTION_[0-9]+]]
-; CHECK:                autibsp
-; CHECK-NEXT:           ret
+; V8A:                  hint #31
+; V83A:                 autibsp
+; V8A-NEXT, V83A-NEXT:  ret
   ret void
 }
 
 define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
 ; CHECK-LABEL:      c:                                     // @c
 ; CHECK-NEXT:       // %bb.0:
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:         hint #27
+; V83A-NEXT:        pacibsp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
 ; CHECK:                bl [[OUTLINED_FUNC]]
-; CHECK:                autibsp
-; CHECK-NEXT:           ret
+; V8A:                  hint #31
+; V83A:                 autibsp
+; V8A-NEXT, V83A-NEXT:  ret
   ret void
 }
 
 ; CHECK:            [[OUTLINED_FUNC]]
 ; CHECK:            // %bb.0:
 ; CHECK-NEXT:           .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:             hint #27
+; V83A-NEXT:            pacibsp
 ; CHECK-NEXT:           .cfi_negate_ra_state
-; CHECK:                autibsp
-; CHECK-NEXT:           ret
+; V8A:                  hint #31
+; V83A:                 autibsp
+; V8A-NEXT, V83A-NEXT:  ret

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-diff-scope-same-key.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 define void @a() "sign-return-address"="all" {
 ; CHECK-LABEL:      a:                                     // @a
-; CHECK:            paciasp
+; V8A:              hint #25
+; V83A:             paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:          autiasp
+; V8A:            hint #29
+; V83A:           autiasp
   ret void
 ; CHECK:          .cfi_endproc
 }
 
 define void @b() "sign-return-address"="non-leaf" {
-; CHECK-LABEL:      b:                                     // @b
-; CHECK-NOT:        paciasp
+; CHECK-LABE:      b:                                     // @b
+; V8A-NOT:         hint #25
+; V83A-NOT:        paciasp
 ; CHECK-NOT:       .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK-NOT:        autiasp
+; V8A-NOT:          hint #29
+; V83A-NOT:         autiasp
   ret void
 ; CHECK:            .cfi_endproc
 }
 
 define void @c() "sign-return-address"="all" {
-; CHECK-LABEL:      c:                                     // @c
-; CHECK:            paciasp
-; CHECK-NEXT:       .cfi_negate_ra_state
+; CHECK-LABEL:         c:              // @c
+; V8A:                 hint #25
+; V83A:                paciasp
+; V8A-NEXT, V83A-NEXT: .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:          autiasp
+; V8A:            hint #29
+; V83A:           autiasp
   ret void
 ; CHECK:          .cfi_endproc
 }
 
 ; CHECK-NOT:      OUTLINED_FUNCTION_{{[0-9]+}}:
 ; CHECK-NOT:      // -- Begin function

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-non-leaf.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 define i64 @a(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
 ; CHECK-LABEL:      a:                                     // @a
 ; CHECK:                .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:             hint #27
+; V83A-NEXT:            pacibsp
 ; CHECK-NEXT:           .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
   call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
   ret i64 %x
 }
 
 define i64 @b(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
 ; CHECK-LABEL:      b:                                     // @b
 ; CHECK:                .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:             hint #27
+; V83A-NEXT:            pacibsp
 ; CHECK-NEXT:           .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
   call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
   ret i64 %x
 }
 
 define i64 @c(i64 %x) "sign-return-address"="non-leaf" "sign-return-address-key"="b_key" {
 ; CHECK-LABEL:      c:                                     // @c
 ; CHECK:                .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:             hint #27
+; V83A-NEXT:            pacibsp
 ; CHECK-NEXT:           .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
   call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
   ret i64 %x
 }
 
 ; Outlined function is leaf-function => don't sign it
 ; CHECK-LABEL:      OUTLINED_FUNCTION_0:
 ; CHECK-NOT:            .cfi_b_key_frame
 ; CHECK-NOT:            paci{{[a,b]}}sp
+; CHECK-NOT:            hint #2{{[5,7]}}
 ; CHECK-NOT:            .cfi_negate_ra_state
 ; CHECK-NOT:            auti{{[a,b]}}sp

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-diff-key.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 define void @a() "sign-return-address"="all" {
 ; CHECK-LABEL:      a:                                     // @a
-; CHECK:            paciasp
+; V8A:              hint #25
+; V83A:             paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:          autiasp
+; V8A:            hint #29
+; V83A:           autiasp
   ret void
 ; CHECK:          .cfi_endproc
 }
 
 define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" {
 ; CHECK-LABEL:      b:                                     // @b
 ; CHECK:            .cfi_b_key_frame
-; CHECK-NEXT:       pacibsp
+; V8A-NEXT:         hint #27
+; V83A-NEXT:        pacibsp
 ; CHECK-NEXT:       .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK-NOT:        autiasp
+; V8A-NOT:          hint #29
+; V83A-NOT:         autiasp
   ret void
 ; CHECK:            .cfi_endproc
 }
 
 define void @c() "sign-return-address"="all" {
 ; CHECK-LABEL:      c:                                     // @c
-; CHECK:            paciasp
+; V8A:              hint #25
+; V83A:             paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:          autiasp
+; V8A:            hint #29
+; V83A:           autiasp
   ret void
 ; CHECK:          .cfi_endproc
 }
 
 ; CHECK-NOT:      OUTLINED_FUNCTION_0:
 ; CHECK-NOT:      // -- Begin function

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-a.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 define void @a() "sign-return-address"="all" "sign-return-address-key"="a_key" nounwind {
 ; CHECK-LABEL:      a:                                     // @a
-; CHECK:                paciasp
+; V8A:              hint #25
+; V83A:             paciasp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:              autiasp
+; V8A:              hint #29
+; V83A:             autiasp
   ret void
 }
 
 define void @b() "sign-return-address"="all" nounwind {
 ; CHECK-LABEL:      b:                                     // @b
-; CHECK:                paciasp
+; V8A:              hint #25
+; V83A:             paciasp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:                autiasp
+; V8A:              hint #29
+; V83A:             autiasp
   ret void
 }
 
 define void @c() "sign-return-address"="all" nounwind {
 ; CHECK-LABEL:      c:                                     // @c
-; CHECK:                paciasp
+; V8A:              hint #25
+; V83A:             paciasp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:              autiasp
+; V8A:              hint #29
+; V83A:             autiasp
   ret void
 }
 
 ; CHECK-LABEL:      OUTLINED_FUNCTION_0:
-; CHECK:              paciasp
-; CHECK:              autiasp
+; V8A:                hint #25
+; V83A:               paciasp
+; V8A:                hint #29
+; V83A:               autiasp
 ; CHECK-NEXT:         ret

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-same-scope-same-key-b.ll

 ; RUN: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
-; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s
+; RUN: aarch64-arm-none-eabi %s -o - | FileCheck %s --check-prefixes CHECK,V8A
+; RUN-V83A: llc -verify-machineinstrs -enable-machine-outliner -mtriple \
+; RUN-V83A: aarch64-arm-none-eabi -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 define void @a() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
 ; CHECK-LABEL:      a:                                     // @a
 ; CHECK-NEXT:       // %bb.0:
-; CHECK-NEXT:           pacibsp
+; V8A:              hint #27
+; V83A:             pacibsp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:              autibsp
+; V8A:              hint #31
+; V83A:             autibsp
   ret void
 }
 
 define void @b() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
 ; CHECK-LABEL:      b:                                     // @b
 ; CHECK-NEXT:       // %bb.0:
-; CHECK-NEXT:           pacibsp
+; V8A:              hint #27
+; V83A:             pacibsp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:                autibsp
+; V8A:              hint #31
+; V83A:             autibsp
   ret void
 }
 
 define void @c() "sign-return-address"="all" "sign-return-address-key"="b_key" nounwind {
 ; CHECK-LABEL:      c:                                     // @c
 ; CHECK-NEXT:       // %bb.0:
-; CHECK-NEXT:           pacibsp
+; V8A:              hint #27
+; V83A:             pacibsp
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:                autibsp
+; V8A:              hint #31
+; V83A:             autibsp
   ret void
 }
 
 ; CHECK-LABEL:      OUTLINED_FUNCTION_0:
 ; CHECK:            // %bb.0:
 ; CHECK-NEXT:           .cfi_b_key_frame
-; CHECK-NEXT:           pacibsp
+; V8A-NEXT:             hint #27
+; V83A-NEXT:            pacibsp
 ; CHECK-NEXT:           .cfi_negate_ra_state
-; CHECK:                autibsp
+; V8A:                  hint #31
+; V83A:                 autibsp
 ; CHECK-NEXT:           ret

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-subtarget.ll

 ; CHECK-NOT:              auti[a,b]sp
   ret void
 }
 
 define void @c() #1 {
 ; CHECK-LABEL:      c:                                     // @c
 ; CHECK:            // %bb.0:
 ; CHECK-NEXT:               .cfi_b_key_frame
-; CHECK-NEXT:               pacibsp
+; CHECK-NEXT:               hint #27
 ; CHECK-NEXT:               .cfi_negate_ra_state
 ; CHECK-NOT:                OUTLINED_FUNCTION_
   %1 = alloca i32, align 4
   %2 = alloca i32, align 4
   %3 = alloca i32, align 4
   %4 = alloca i32, align 4
   %5 = alloca i32, align 4
   %6 = alloca i32, align 4
   store i32 1, i32* %1, align 4
   store i32 2, i32* %2, align 4
   store i32 3, i32* %3, align 4
   store i32 4, i32* %4, align 4
   store i32 5, i32* %5, align 4
   store i32 6, i32* %6, align 4
-; CHECK:                  autibsp
+; CHECK:                  hint #31
 ; CHECK-NOT:              ret{{[a,b]}}
   ret void
 }
 
 attributes #0 = { "sign-return-address"="all"
                   "sign-return-address-key"="b_key"
                   "target-features"="+v8.3a" }
 
 attributes #1 = { "sign-return-address"="all"
                   "sign-return-address-key"="b_key" }
 
 ; CHECK-NOT:                OUTLINED_FUNCTION_

llvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-thunk.ll

 ; RUN: llc -mtriple aarch64-arm-linux-gnu --enable-machine-outliner \
-; RUN: -verify-machineinstrs %s -o - | FileCheck %s
+; RUN: -verify-machineinstrs %s -o - | FileCheck --check-prefixes CHECK,V8A %s
+; RUN-V83A: llc -mtriple aarch64-arm-none-eabi -enable-machine-outliner \
+; RUN-V83A: -verify-machineinstrs -mattr=+v8.3a %s -o - > %t
+; RUN-V83A: FileCheck --check-prefixes CHECK,V83A < %t %s
 
 declare i32 @thunk_called_fn(i32, i32, i32, i32)
 
 define i32 @a() #0 {
 ; CHECK-LABEL:  a:                                      // @a
 ; CHECK:        // %bb.0:                               // %entry
-; CHECK-NEXT:       paciasp
-; CHECK:            autiasp
+; V8A-NEXT:         hint #25
+; V83A-NEXT:        paciasp
+; V8A:              hint #29
+; V83A:             autiasp
 ; CHECK-NEXT:       ret
 entry:
   %call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
   %cx = add i32 %call, 8
   ret i32 %cx
 }
 
 define i32 @b() #0 {
 ; CHECK-LABEL:  b:                                      // @b
 ; CHECK:        // %bb.0:                               // %entry
-; CHECK-NEXT:       paciasp
+; V8A-NEXT:         hint #25
+; V83A-NEXT:        paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
-; CHECK:            autiasp
+; V8A:              hint #29
+; V83A:             autiasp
 ; CHECK-NEXT:       ret
 entry:
   %call = tail call i32 @thunk_called_fn(i32 1, i32 2, i32 3, i32 4)
   %cx = add i32 %call, 88
   ret i32 %cx
 }
 
 define hidden i32 @c(i32 (i32, i32, i32, i32)* %fptr) #0 {
 ; CHECK-LABEL:  c:                                      // @c
 ; CHECK:        // %bb.0:                               // %entry
-; CHECK-NEXT:       paciasp
+; V8A-NEXT:         hint #25
+; V83A-NEXT:        paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
-; CHECK:            autiasp
+; V8A:              hint #29
+; V83A:             autiasp
 ; CHECK-NEXT:       ret
 entry:
   %call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
   %add = add nsw i32 %call, 8
   ret i32 %add
 }
 
 define hidden i32 @d(i32 (i32, i32, i32, i32)* %fptr) #0 {
 ; CHECK-LABEL:  d:                                      // @d
 ; CHECK:        // %bb.0:                               // %entry
-; CHECK-NEXT:       paciasp
+; V8A-NEXT:         hint #25
+; V83A-NEXT:        paciasp
 ; CHECK-NEXT:       .cfi_negate_ra_state
-; CHECK:            autiasp
+; V8A:              hint #29
+; V83A:             autiasp
 ; CHECK-NEXT:       ret
 entry:
   %call = tail call i32 %fptr(i32 1, i32 2, i32 3, i32 4)
   %add = add nsw i32 %call, 88
   ret i32 %add
 }
 
 attributes #0 = { "sign-return-address"="non-leaf" }
 
 ; CHECK-NOT:        [[OUTLINED_FUNCTION_{{.*}}]]
 ; CHECK-NOT:         .cfi_b_key_frame
 ; CHECK-NOT:         paci{{[a,b]}}sp
+; CHECK-NOT:         hint #2{{[5,7]}}
 ; CHECK-NOT:         .cfi_negate_ra_state
 ; CHECK-NOT:         auti{{[a,b]}}sp
+; CHECK-NOT:         hint #{{[29,31]}}

llvm/test/CodeGen/AArch64/sign-return-address.ll

-; RUN: llc -mtriple=aarch64-none-eabi < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-eabi              < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-none-eabi -mattr=v8.3a < %s | FileCheck --check-prefix CHECK-V83A %s
 
 ; CHECK-LABEL: @leaf
 ; CHECK-NOT: paci{{[a,b]}}sp
 ; CHECK-NOT: auti{{[a,b]}}sp
 define i32 @leaf(i32 %x) {
   ret i32 %x
 }
 
 ; CHECK-LABEL: @leaf_sign_none
 ; CHECK-NOT: paci{{[a,b]}}sp
 ; CHECK-NOT: auti{{[a,b]}}sp
 define i32 @leaf_sign_none(i32 %x) "sign-return-address"="none"  {
   ret i32 %x
 }
 
 ; CHECK-LABEL: @leaf_sign_non_leaf
 ; CHECK-NOT: paci{{[a,b]}}sp
 ; CHECK-NOT: auti{{[a,b]}}sp
 define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf"  {
   ret i32 %x
 }
 
 ; CHECK-LABEL: @leaf_sign_all
-; CHECK: paciasp
-; CHECK: autiasp
-; CHECK: ret
+; CHECK:       hint #25
+; CHECK:       hint #29
+; CHECK:       ret
+; CHECK-V83A:  paciasp
+; CHECK-V83A:  retaa
 define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
   ret i32 %x
 }
 
-; CHECK: @leaf_clobbers_lr
-; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
-; CHECK: ldr  x30, [sp], #16
-; CHECK-NEXT: autiasp
-; CHECK: ret
+; CHECK:             @leaf_clobbers_lr
+; CHECK:             hint #25
+; CHECK-V83A:        paciasp
+; CHECK, CHECK-V83A: str x30, [sp, #-16]!
+; CHECK, CHECK-V83A: ldr x30, [sp], #16
+; CHECK:             hint #29
+; CHECK:             ret
+; CHECK-V32A-NEXT:   retaa
 define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf"  {
   call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
   ret i64 %x
 }
 
 declare i32 @foo(i32)
 
-; CHECK: @non_leaf_sign_all
-; CHECK: paciasp
-; CHECK: autiasp
-; CHECK: ret
+; CHECK:      @non_leaf_sign_all
+; CHECK:      hint #25
+; CHECK:      hint #29
+; CHECK:      ret
+; CHECK-V83A: paciasp
+; CHECK-V83A: retaa
 define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
   %call = call i32 @foo(i32 %x)
   ret i32 %call
 }
 
-; CHECK: @non_leaf_sign_non_leaf
-; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
-; CHECK: ldr  x30, [sp], #16
-; CHECK: autiasp
-; CHECK: ret
+; CHECK:             @non_leaf_sign_non_leaf
+; CHECK:             hint #25
+; CHECK-V83A:        paciasp
+; CHECK, CHECK-V83A: str x30, [sp, #-16]!
+; CHECK, CHECK-V83A: ldr x30, [sp], #16
+; CHECK:             hint #29
+; CHECK:             ret
+; CHECK-V83A:        retaa
 define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf"  {
   %call = call i32 @foo(i32 %x)
   ret i32 %call
 }
 
 ; CHECK-LABEL: @leaf_sign_all_v83
 ; CHECK: paciasp
 ; CHECK-NOT: ret
 ; CHECK: retaa
 ; CHECK-NOT: ret
 define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" {
   ret i32 %x
 }
 
 declare fastcc i64 @bar(i64)
 
-; CHECK-LABEL: @spill_lr_and_tail_call
-; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
-; CHECK: ldr  x30, [sp], #16
-; CHECK: autiasp
-; CHECK: b  bar
+; CHECK-LABEL:       @spill_lr_and_tail_call
+; CHECK:             hint #25
+; CHECK-V83A:        paciasp
+; CHECK, CHECK-V83A: str x30, [sp, #-16]!
+; CHECK, CHECK-V83A: ldr x30, [sp], #16
+; CHECK-V83A:        autiasp
+; CHECK:             hint #29
+; CHECK:             b bar
 define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
   call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
   tail call fastcc i64 @bar(i64 %x)
   ret void
 }
 
 ; CHECK-LABEL: @leaf_sign_all_a_key
-; CHECK: paciasp
-; CHECK: autiasp
+; CHECK:       hint #25
+; CHECK:       hint #29
+; CHECK-V83A:  paciasp
+; CHECK-V83A:  retaa
 define i32 @leaf_sign_all_a_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="a_key" {
   ret i32 %x
 }
 
 ; CHECK-LABEL: @leaf_sign_all_b_key
-; CHECK: pacibsp
-; CHECK: autibsp
+; CHECK:       hint #27
+; CHECK:       hint #31
+; CHECK-V83A:  pacibsp
+; CHECK-V83A:  retab
 define i32 @leaf_sign_all_b_key(i32 %x) "sign-return-address"="all" "sign-return-address-key"="b_key" {
   ret i32 %x
 }
 
 ; CHECK-LABEL: @leaf_sign_all_v83_b_key
 ; CHECK: pacibsp
 ; CHECK-NOT: ret
 ; CHECK: retab
 ; CHECK-NOT: ret
 define i32 @leaf_sign_all_v83_b_key(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" "sign-return-address-key"="b_key" {
   ret i32 %x
 }

llvm/test/CodeGen/AArch64/speculation-hardening-dagisel.ll

entry:
   br i1 %cmp, label %if.then, label %cleanup
 
 ; CHECK: b.ls
 ; SLH: dsb sy
 ; SLH: isb
 ; NOSLH-NOT: dsb sy
 ; NOSLH-NOT: isb
 if.then:
-  %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a)
+  %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a)
 ; CHECK: bl g
 ; SLH: dsb sy
 ; SLH: isb
 ; NOSLH-NOT: dsb sy
 ; NOSLH-NOT: isb
 ; CHECK: ret
   %call = tail call i64 @g(i64 %a, i64 %b) #3
   %add = add i64 %call, %0

llvm/test/CodeGen/AArch64/speculation-hardening-loads.ll

 ; CHECK-NEXT: ret
 }
 
 define i64 @no_masking_with_full_control_flow_barriers(i64 %a, i64 %b, i64* %p) speculative_load_hardening {
 ; CHECK-LABEL: no_masking_with_full_control_flow_barriers
 ; CHECK: dsb sy
 ; CHECK: isb
 entry:
-  %0 = tail call i64 asm "autia1716", "={x17},{x16},0"(i64 %b, i64 %a)
+  %0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a)
   %X = load i64, i64* %p, align 8
   %ret = add i64 %X, %0
 ; CHECK-NOT: csdb
 ; CHECK-NOT: and
 ; CHECK: ret
   ret i64 %ret
 }
 

llvm/test/MC/AArch64/armv8.3a-signed-pointer.s

 // RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.3a -o - %s 2>&1 | \
 // RUN: FileCheck --check-prefixes=CHECK,ALL %s
 
-// RUN: not llvm-mc -triple aarch64-none-linux-gnu %s -o - > %t.1 2>%t.2
-// RUN: FileCheck --check-prefixes=ALL,NOENC %s < %t.1
+// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding %s -o - > %t.1 2>%t.2
+// RUN: FileCheck --check-prefixes=ALL %s < %t.1
 // RUN: FileCheck --check-prefix=CHECK-REQ %s < %t.2
 
 // ALL: .text
   mrs x0, apiakeylo_el1
   mrs x0, apiakeyhi_el1
   mrs x0, apibkeylo_el1
   mrs x0, apibkeyhi_el1
   mrs x0, apdakeylo_el1

 // CHECK-REQ-NEXT:  msr apgakeylo_el1, x0
 // CHECK-REQ: error: expected writable system register or pstate
 // CHECK-REQ-NEXT:  msr apgakeyhi_el1, x0
 
 // ALL-EMPTY:
 // ALL-EMPTY:
   paciasp
 // CHECK-NEXT: paciasp        // encoding: [0x3f,0x23,0x03,0xd5]
-// NOENC-NEXT: paciasp
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: paciasp
   autiasp
 // CHECK-NEXT: autiasp        // encoding: [0xbf,0x23,0x03,0xd5]
-// NOENC-NEXT: autiasp
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autiasp
   paciaz
 // CHECK-NEXT: paciaz         // encoding: [0x1f,0x23,0x03,0xd5]
-// NOENC-NEXT: paciaz
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: paciaz
   autiaz
 // CHECK-NEXT: autiaz         // encoding: [0x9f,0x23,0x03,0xd5]
-// NOENC-NEXT: autiaz
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autiaz
   pacia1716
 // CHECK-NEXT: pacia1716      // encoding: [0x1f,0x21,0x03,0xd5]
-// NOENC-NEXT: pacia1716
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: pacia1716
   autia1716
 // CHECK-NEXT: autia1716      // encoding: [0x9f,0x21,0x03,0xd5]
-// NOENC-NEXT: autia1716
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autia1716
   pacibsp
 // CHECK-NEXT: pacibsp        // encoding: [0x7f,0x23,0x03,0xd5]
-// NOENC-NEXT: pacibsp
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: pacibsp
   autibsp
 // CHECK-NEXT: autibsp        // encoding: [0xff,0x23,0x03,0xd5]
-// NOENC-NEXT: autibsp
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autibsp
   pacibz
 // CHECK-NEXT: pacibz         // encoding: [0x5f,0x23,0x03,0xd5]
-// NOENC-NEXT: pacibz
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: pacibz
   autibz
 // CHECK-NEXT: autibz         // encoding: [0xdf,0x23,0x03,0xd5]
-// NOENC-NEXT: autibz
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autibz
   pacib1716
 // CHECK-NEXT: pacib1716      // encoding: [0x5f,0x21,0x03,0xd5]
-// NOENC-NEXT: pacib1716
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: pacib1716
   autib1716
 // CHECK-NEXT: autib1716      // encoding: [0xdf,0x21,0x03,0xd5]
-// NOENC-NEXT: autib1716
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: autib1716
   xpaclri
-// CHECK-NEXT: xpaclri           // encoding: [0xff,0x20,0x03,0xd5]
-// NOENC-NEXT: xpaclri
+// CHECK-NEXT: xpaclri        // encoding: [0xff,0x20,0x03,0xd5]
+// CHECK-REQ: error: instruction requires: pa
+// CHECK-REQ-NEXT: xpaclri
 
 // ALL-EMPTY:
   pacia x0, x1
 // CHECK-NEXT: pacia x0, x1     // encoding: [0x20,0x00,0xc1,0xda]
 // CHECK-REQ-NEXT:      ^
 // CHECK-REQ-NEXT: error: instruction requires: pa
 // CHECK-REQ-NEXT: pacia x0, x1
   autia x0, x1