[ELF][Hexagon] Add support for TLS IE relocations

[sidneym]

Summary

Support TLS IE relocations

[MaskRay]

lld/test/ELF/hexagon-tls-ie.s

2

See ppc32-tls-ie.s and riscv-tls-ie.s

You need both a -shared test and an executable (-no-pie, it is the default) test.

No separate input file in Inputs/ is necessary.

[sidneym]

merge ie and iegot relocations
put the testcase into just a single file.

[MaskRay]

lld/ELF/Arch/Hexagon.cpp

123

Is it really R_GOT (absolute), instead of R_GOT_PC (PC-relative)?

R_GOT is really only used by i386 because it lacks PC-relative instructions. This is a quite serious deficiency so x86_64 ISA and ABI have fixed the problem. (AArch64 does also use R_GOT but it has bool AArch64::usesOnlyLowPageBits(RelType type), so using R_GOT is not a problem.)

lld/test/ELF/hexagon-tls-ie.s

63

Use -NEXT is applicable. CHECK-RELA-NEXT: is too long. So you can consider using RELA as the check-prefix.

[sidneym]

Update Check names.

I confirmed that R_GOT is correct. The ABI is worded as:
R_HEX_IE_16_X ... (G + GOT) Unsigned Truncate
and I verified the output with an internal linker, hexagon-link.

[MaskRay]

I'd like to ask some questions which can help understand the situation better.

• Does Hexagon have a binutils port or an alternative linker?
• Is -pie and -shared used a lot on Hexagon?
• How is Hexagon's dynamic loader ld.so implemented? Is the source code available?
• How is TLS going to be used on Hexagon?
• Is text relocations acceptable?
• Is it really impossible to use a PC-relative GOT address load on Hexagon? R_GOT on EM_386 has severe limitations. EM_X86_64 fixed these issues. (I don't want to see newer architectures behave like it.)

I shall also mention that this is unfortunate.

bool canRelax = config->emachine != EM_ARM &&

config->emachine != EM_RISCV;

RISC-V TLS has several problems. Its design/implementation was copied from ARM/MIPS. The two architectures really do not provide the best reference for TLS implementations. The RISC-V TLS implementation has several defects. I've reported a few bugs on the binutils bugzilla.

[sidneym]

In D71143#1806565, @MaskRay wrote:

I'd like to ask some questions which can help understand the situation better.

• Does Hexagon have a binutils port or an alternative linker?

The binutils port was never made public. The internal linker can be downloaded with a click-thu license agreement, the same one needed to get to the ABI spec. That linker is a branch of mclinker.

• Is -pie and -shared used a lot on Hexagon?

-pie isn't but shared is.

• How is Hexagon's dynamic loader ld.so implemented? Is the source code available?

The code isn't yet available from Qualcomm but we have a port of MUSL and I don't think much more than adding the #defines to reloc.h and the files dlsym.s/tlsdesc.s was done. Nothing weird for hexagon.

• How is TLS going to be used on Hexagon?

There isn't anything out of the ordinary in how it is used and it is necessary for C++11 support.

• Is text relocations acceptable?

No. The reason I needed to add the -z notext in the -shared test was because technically the wrong relocations were being used. I did that so that I could condense the IE patch into a single file testcase.

• Is it really impossible to use a PC-relative GOT address load on Hexagon? R_GOT on EM_386 has severe limitations. EM_X86_64 fixed these issues. (I don't want to see newer architectures behave like it.)

The R_HEX_IE_GOT... are used for shared/pic code. As far as I know the R_HEX_IE_32_6_X/16_X.. are used only when building static code. The ABI has examples for both of these IE static and IE for PIC.

I shall also mention that this is unfortunate.

bool canRelax = config->emachine != EM_ARM &&

config->emachine != EM_RISCV;

RISC-V TLS has several problems. Its design/implementation was copied from ARM/MIPS. The two architectures really do not provide the best reference for TLS implementations. The RISC-V TLS implementation has several defects. I've reported a few bugs on the binutils bugzilla.

[MaskRay]

In D71143#1806854, @sidneym wrote:

In D71143#1806565, @MaskRay wrote:

I'd like to ask some questions which can help understand the situation better.

• Does Hexagon have a binutils port or an alternative linker?

The binutils port was never made public. The internal linker can be downloaded with a click-thu license agreement, the same one needed to get to the ABI spec. That linker is a branch of mclinker.

Like @ruiu argued before, a click-thu license agreement may be unacceptable in many environments. I am also concerned whether a click-thru license agreement is considered 100% GPLv3 conformance.

• Is -pie and -shared used a lot on Hexagon?

-pie isn't but shared is.

• How is Hexagon's dynamic loader ld.so implemented? Is the source code available?

The code isn't yet available from Qualcomm but we have a port of MUSL and I don't think much more than adding the #defines to reloc.h and the files dlsym.s/tlsdesc.s was done. Nothing weird for hexagon.

The source code will be appreciated.

• How is TLS going to be used on Hexagon?

There isn't anything out of the ordinary in how it is used and it is necessary for C++11 support.

• Is text relocations acceptable?

No. The reason I needed to add the -z notext in the -shared test was because technically the wrong relocations were being used. I did that so that I could condense the IE patch into a single file testcase.

Not entirely wrong, and used in practice, e.g. libGL.so and libGLESv2.so use DT_STATIC_TLS. There are certain PC relative instructions, so R_GOT looks out-of-place to me. I hope this can be changed.

lld/ELF/Arch/Hexagon.cpp

137

Add config->hasStaticTlsModel = true; if you use Initial Exec TLS model. And create a llvm-readelf -d test (see riscv-tls-ie.s).

[sidneym]

In D71143#1807026, @MaskRay wrote:

In D71143#1806854, @sidneym wrote:

In D71143#1806565, @MaskRay wrote:

I'd like to ask some questions which can help understand the situation better.

• Does Hexagon have a binutils port or an alternative linker?

The binutils port was never made public. The internal linker can be downloaded with a click-thu license agreement, the same one needed to get to the ABI spec. That linker is a branch of mclinker.

Like @ruiu argued before, a click-thu license agreement may be unacceptable in many environments. I am also concerned whether a click-thru license agreement is considered 100% GPLv3 conformance.

All hexagon work on binutils/gcc was done during the GPLv2 timeframe. The downloadable linker I'm referring to is a branch from the old mclinker project.

• Is -pie and -shared used a lot on Hexagon?

-pie isn't but shared is.

• How is Hexagon's dynamic loader ld.so implemented? Is the source code available?

The code isn't yet available from Qualcomm but we have a port of MUSL and I don't think much more than adding the #defines to reloc.h and the files dlsym.s/tlsdesc.s was done. Nothing weird for hexagon.

The source code will be appreciated.

I agree and will make sure you are notified when it is available.

• How is TLS going to be used on Hexagon?

There isn't anything out of the ordinary in how it is used and it is necessary for C++11 support.

• Is text relocations acceptable?

No. The reason I needed to add the -z notext in the -shared test was because technically the wrong relocations were being used. I did that so that I could condense the IE patch into a single file testcase.

Not entirely wrong, and used in practice, e.g. libGL.so and libGLESv2.so use DT_STATIC_TLS. There are certain PC relative instructions, so R_GOT looks out-of-place to me. I hope this can be changed.

[sidneym]

Add config->hasStaticTlsModel in R_GOT case.

[sidneym]

Move hasStaticTlsModel from R_GOT case to the suggested R_GOTPLT case.

[MaskRay]

lld/test/ELF/hexagon-tls-ie.s

6

## for comments.

8

%t.so for shared objects.

Users expect %t.o and %t.so to be related, so don't add 2 suffix.

9

no-show-raw-insn to disable hex pairs in llvm-objdump -d output

34

llvm-readelf -x .got to test .got . See riscv-tls-ie.s

62

align

[sidneym]

Address testcase issues.

lld/ELF/Arch/Hexagon.cpp

Hexagon::Hexagon() {
   gotPltHeaderEntriesNum = 4;
 
   pltEntrySize = 16;
   pltHeaderSize = 32;
 
   // Hexagon Linux uses 64K pages by default.
   defaultMaxPageSize = 0x10000;
   noneRel = R_HEX_NONE;
+  tlsGotRel = R_HEX_TPREL_32;
 }
 
 uint32_t Hexagon::calcEFlags() const {
   assert(!objectFiles.empty());
 
   // The architecture revision must always be equal to or greater than
   // greatest revision in the list of inputs.
   uint32_t ret = 0;
case R_HEX_32_PCREL:
     return R_PC;
   case R_HEX_B9_PCREL_X:
   case R_HEX_B15_PCREL_X:
   case R_HEX_B22_PCREL:
   case R_HEX_PLT_B22_PCREL:
   case R_HEX_B22_PCREL_X:
   case R_HEX_B32_PCREL_X:
     return R_PLT_PC;
+  case R_HEX_IE_32_6_X:
+  case R_HEX_IE_16_X:
+  case R_HEX_IE_HI16:
+  case R_HEX_IE_LO16:
+    return R_GOT;
   case R_HEX_GOTREL_11_X:
   case R_HEX_GOTREL_16_X:
   case R_HEX_GOTREL_32_6_X:
   case R_HEX_GOTREL_HI16:
   case R_HEX_GOTREL_LO16:
     return R_GOTPLTREL;
   case R_HEX_GOT_11_X:
   case R_HEX_GOT_16_X:
   case R_HEX_GOT_32_6_X:
     return R_GOTPLT;
+  case R_HEX_IE_GOT_11_X:
+  case R_HEX_IE_GOT_16_X:
+  case R_HEX_IE_GOT_32_6_X:
+  case R_HEX_IE_GOT_HI16:
+  case R_HEX_IE_GOT_LO16:
+    config->hasStaticTlsModel = true;
+    return R_GOTPLT;
   case R_HEX_TPREL_11_X:
   case R_HEX_TPREL_16:
   case R_HEX_TPREL_16_X:
   case R_HEX_TPREL_32_6_X:
   case R_HEX_TPREL_HI16:
   case R_HEX_TPREL_LO16:
     return R_TLS;
   default:
case R_HEX_8_X:
     break;
   case R_HEX_9_X:
     or32le(loc, applyMask(0x00003fe0, val & 0x3f));
     break;
   case R_HEX_10_X:
     or32le(loc, applyMask(0x00203fe0, val & 0x3f));
     break;
   case R_HEX_11_X:
+  case R_HEX_IE_GOT_11_X:
   case R_HEX_GOT_11_X:
   case R_HEX_GOTREL_11_X:
   case R_HEX_TPREL_11_X:
     or32le(loc, applyMask(findMaskR11(read32le(loc)), val & 0x3f));
     break;
   case R_HEX_12_X:
     or32le(loc, applyMask(0x000007e0, val));
     break;
   case R_HEX_16_X: // These relocs only have 6 effective bits.
+  case R_HEX_IE_16_X:
+  case R_HEX_IE_GOT_16_X:
   case R_HEX_GOT_16_X:
   case R_HEX_GOTREL_16_X:
   case R_HEX_TPREL_16_X:
     or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0x3f));
     break;
   case R_HEX_TPREL_16:
     or32le(loc, applyMask(findMaskR16(read32le(loc)), val & 0xffff));
     break;
   case R_HEX_32:
   case R_HEX_32_PCREL:
     or32le(loc, val);
     break;
   case R_HEX_32_6_X:
   case R_HEX_GOT_32_6_X:
   case R_HEX_GOTREL_32_6_X:
+  case R_HEX_IE_GOT_32_6_X:
+  case R_HEX_IE_32_6_X:
   case R_HEX_TPREL_32_6_X:
     or32le(loc, applyMask(0x0fff3fff, val >> 6));
     break;
   case R_HEX_B9_PCREL:
     checkInt(loc, val, 11, type);
     or32le(loc, applyMask(0x003000fe, val >> 2));
     break;
   case R_HEX_B9_PCREL_X:
void Hexagon::relocateOne(uint8_t *loc, RelType type, uint64_t val) const {
   case R_HEX_B22_PCREL_X:
     or32le(loc, applyMask(0x1ff3ffe, val & 0x3f));
     break;
   case R_HEX_B32_PCREL_X:
     or32le(loc, applyMask(0x0fff3fff, val >> 6));
     break;
   case R_HEX_GOTREL_HI16:
   case R_HEX_HI16:
+  case R_HEX_IE_GOT_HI16:
+  case R_HEX_IE_HI16:
   case R_HEX_TPREL_HI16:
     or32le(loc, applyMask(0x00c03fff, val >> 16));
     break;
   case R_HEX_GOTREL_LO16:
   case R_HEX_LO16:
+  case R_HEX_IE_GOT_LO16:
+  case R_HEX_IE_LO16:
   case R_HEX_TPREL_LO16:
     or32le(loc, applyMask(0x00c03fff, val));
     break;
   default:
     llvm_unreachable("unknown relocation");
   }
 }
 

lld/ELF/Relocations.cpp

if (in.got->addDynTlsEntry(sym)) {
       mainPart->relaDyn->addReloc(
           {target->tlsDescRel, in.got, off, !sym.isPreemptible, &sym, 0});
     }
     if (expr != R_TLSDESC_CALL)
       c.relocations.push_back({expr, type, offset, addend, &sym});
     return 1;
   }
 
-  bool canRelax = config->emachine != EM_ARM && config->emachine != EM_RISCV;
+  bool canRelax = config->emachine != EM_ARM &&
+                  config->emachine != EM_HEXAGON &&
+                  config->emachine != EM_RISCV;
 
   // If we are producing an executable and the symbol is non-preemptable, it
   // must be defined and the code sequence can be relaxed to use Local-Exec.
   //
   // ARM and RISC-V do not support any relaxations for TLS relocations, however,
   // we can omit the DTPMOD dynamic relocations and resolve them at link time
   // because them are always 1. This may be necessary for static linking as
   // DTPMOD may not be expected at load time.

lld/test/ELF/hexagon-tls-ie.s

+# REQUIRES: hexagon
+# RUN: llvm-mc -filetype=obj -triple=hexagon-unknown-elf %s -o %t.o
+# RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=RELOC %s
+# RUN: ld.lld %t.o -o %t
+## shared needs -z notext because of the R_HEX_IE_16/32_X(R_GOT) static
+## relocations
+# RUN: ld.lld -z notext -shared %t.o -o %t.so
+# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t | FileCheck %s
+# RUN:  llvm-readobj -x .got %t | FileCheck -check-prefix=GOT %s
+# RUN: llvm-objdump -d --no-show-raw-insn --print-imm-hex %t.so | \
+# RUN: FileCheck -check-prefix=SHARED %s
+# RUN: llvm-readobj -r  %t.so | FileCheck -check-prefix=RELA %s
+
+  .globl  _start
+  .type _start, @function
+_start:
+
+# RELOC:      0x0 R_HEX_IE_32_6_X a 0x0
+# RELOC-NEXT: 0x4 R_HEX_IE_16_X a 0x0
+# CHECK:      {   immext(#0x30180)
+# CHECK-NEXT:     r2 = memw(##0x301a4) }
+                  r2 = memw(##a@IE)
+
+# RELOC-NEXT: 0x8 R_HEX_IE_LO16 a 0x0
+# CHECK: {       r2.l = #0x1a4 }
+                 r2.l = #a@IE
+# RELOC-NEXT: 0xC R_HEX_IE_HI16 a 0x0
+# CHECK: {       r2.h = #0x3 }
+                 r2.h = #a@IE
+
+
+# GOT: Hex dump of section '.got':
+# GOT-NEXT: 0x000301a4 f0ffffff f4ffffff f8ffffff fcffffff
+                 r2 = memw(##a@IE)
+                 r2 = memw(##b@IE)
+                 r2 = memw(##c@IE)
+                 r2 = memw(##d@IE)
+
+# RELOC:      0x30 R_HEX_IE_GOT_32_6_X a 0x0
+# RELOC-NEXT: 0x34 R_HEX_IE_GOT_16_X a 0x0
+# SHARED:      { immext(#0xfffeffc0)
+# SHARED-NEXT:   r2 = memw(##0xfffefff0) }
+                 r2 = memw(##a@IEGOT)
+
+# RELOC-NEXT: 0x38 R_HEX_IE_GOT_LO16 a 0x0
+# SHARED: {     r2.l = #0xfff0 }
+                r2.l = #a@IEGOT
+# RELOC-NEXT: 0x3C R_HEX_IE_GOT_HI16 a 0x0
+# SHARED: {     r2.h = #0xfffe }
+                r2.h = #a@IEGOT
+
+# RELOC:      0x44 R_HEX_IE_GOT_11_X a 0x0
+# SHARED:    {  immext(#0xfffeffc0)
+# SHARED-NEXT:  r0 = !cmp.eq(r1,##-0x10010) }
+                r0=!cmp.eq(r1,##a@iegot)
+
+# RELA:       0x203C4 R_HEX_TPREL_32 a 0x0
+# RELA-NEXT:  0x203C8 R_HEX_TPREL_32 b 0x0
+# RELA-NEXT:  0x203CC R_HEX_TPREL_32 c 0x0
+# RELA-NEXT:  0x203D0 R_HEX_TPREL_32 d 0x0
+                r2 = memw(##b@IEGOT)
+                r2 = memw(##c@IEGOT)
+                r2 = memw(##d@IEGOT)
+
+
+.section        .tdata,"awT",@progbits
+.globl  a
+a:
+.word 1
+.globl  b
+b:
+.word 2
+.globl  c
+c:
+.word 3
+.globl  d
+d:
+.word 4