AMDGPU: Fixed indeterminate map iteration in SIPeepholeSDWA

[tpr]

Summary

Change-Id: Ic26f915a4acb4c00ecefa9d09d7c24cec370ed06

[tpr]

No test because by definition it was indeterminate.

[rampitec]

Did the problem manifest in any way?

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

32

Includes need to be alphabetically sorted.

[tpr]

In D70783#1762087, @rampitec wrote:

Did the problem manifest in any way?

I had a couple of big graphics shaders that generated different but still correct code due to registers being allocated in a different order, depending on whether I had some other change in the front-end compiler that only affected IR metadata, and the difference only happened on one of two machines I tried it on. I spotted it because I had a bunch of front-end compiler changes that were not supposed to affect output code, and I was testing that by compiling as much stuff as I could with before-change and after-change compilers.

[tpr]

V2: Sorted includes alphabetically.

[rampitec]

LGTM

[arsenm]

In D70783#1761745, @tpr wrote:

No test because by definition it was indeterminate.

I mean if you have a test, it will detect if it were to fail on some other map implementation

llvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp

 
 #include "AMDGPU.h"
 #include "AMDGPUSubtarget.h"
 #include "SIDefines.h"
 #include "SIInstrInfo.h"
 #include "SIRegisterInfo.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
 #include "Utils/AMDGPUBaseInfo.h"
+#include "llvm/ADT/MapVector.h"
 #include "llvm/ADT/None.h"
 #include "llvm/ADT/Optional.h"
 #include "llvm/ADT/STLExtras.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/ADT/Statistic.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
 #include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/MachineOperand.h"

 public:
   using SDWAOperandsVector = SmallVector<SDWAOperand *, 4>;
 
 private:
   MachineRegisterInfo *MRI;
   const SIRegisterInfo *TRI;
   const SIInstrInfo *TII;
 
-  std::unordered_map<MachineInstr *, std::unique_ptr<SDWAOperand>> SDWAOperands;
-  std::unordered_map<MachineInstr *, SDWAOperandsVector> PotentialMatches;
+  MapVector<MachineInstr *, std::unique_ptr<SDWAOperand>> SDWAOperands;
+  MapVector<MachineInstr *, SDWAOperandsVector> PotentialMatches;
   SmallVector<MachineInstr *, 8> ConvertedInstructions;
 
   Optional<int64_t> foldToImm(const MachineOperand &Op) const;
 
 public:
   static char ID;
 
   SIPeepholeSDWA() : MachineFunctionPass(ID) {