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Differential D67925

[FPEnv] Strict FP tests should use the requisite function attributes
ClosedPublic

Authored by kpn on Sep 23 2019, 10:21 AM.

Details

Reviewers
craig.topper
andrew.w.kaylor
cameron.mcinally
efriedma
hfinkel
uweigand
kbarton
Commits
rG68b805212134: [FPEnv] Strict FP tests should use the requisite function attributes.
rL373761: [FPEnv] Strict FP tests should use the requisite function attributes.
Summary

A set of function attributes is required in any function that uses constrained floating point intrinsics. None of our tests use these attributes. I've got IR verifier changes in the works that enforce use of them, but first the existing tests need to be made compliant.

Diff Detail

Event Timeline

kpn created this revision.Sep 23 2019, 10:21 AM
Herald added a project: Restricted Project. · View Herald TranscriptSep 23 2019, 10:21 AM
Herald added subscribers: llvm-commits, pengfei, jsji and 2 others. · View Herald Transcript
uweigand added a comment.Sep 24 2019, 11:19 AM

This looks fine to me, assuming we agree that this is in fact the set of attributes we need. So I think https://reviews.llvm.org/D67839 should go in first.

Herald added a subscriber: • wuzish. · View Herald TranscriptSep 24 2019, 11:19 AM
cameron.mcinally added a comment.Sep 24 2019, 11:50 AM

Would it be better to do an attributes #0 = { ...} style change? E.g.:

define double @f5(double %a) #0 {
...
}

attributes #0 = {strictfp noimplicitfloat}
kpn added a comment.Sep 24 2019, 12:19 PM
In D67925#1681156, @cameron.mcinally wrote:

Would it be better to do an attributes #0 = { ...} style change? E.g.:

define double @f5(double %a) #0 {
...
}

attributes #0 = {strictfp noimplicitfloat}

I like that syntax since it is much more compact. I imagine I'll need to update the tests after D67839 is concluded. I'll give this syntax a spin then.

kpn planned changes to this revision.Sep 26 2019, 11:08 AM

This needs to be updated to mark function calls now that D67839 is done.

kpn updated this revision to Diff 223039.Oct 3 2019, 9:33 AM

Based on the conclusion from D67839, I've updated the tests to have function attribute strictfp always be used when constrained intrinsics are used, and all function calls are also marked strictfp when the function itself is marked strictfp.

There are still three tests that aren't correct. Those will be subsequent patches.

The verifier changes are in D68233. It can't go in until all tests are passing with it.

uweigand added a comment.Oct 3 2019, 9:56 AM

SystemZ changes still LGTM.

andrew.w.kaylor accepted this revision.Oct 3 2019, 1:21 PM

I assume you've tested this with your verifier changes. This is a bit too much to verify every call and function manually. I looked at the ones that weren't boilerplate updates, and I sampled the boilerplate changes. Based on that review strategy, it looks good to me.

This revision is now accepted and ready to land.Oct 3 2019, 1:21 PM
Closed by commit rL373761: [FPEnv] Strict FP tests should use the requisite function attributes. (authored by kpn). · Explain WhyOct 4 2019, 10:02 AM
This revision was automatically updated to reflect the committed changes.

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Diff 223039

llvm/test/CodeGen/PowerPC/fp-intrinsics-fptosi-legal.ll

; RUN: llc -O3 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe < %s | FileCheck %s ; RUN: llc -O3 -mtriple=powerpc-unknown-linux-gnu -mcpu=e500 -mattr=spe < %s | FileCheck %s
; PowerPC SPE is a rare in-tree target that has the FP_TO_SINT node marked ; PowerPC SPE is a rare in-tree target that has the FP_TO_SINT node marked
; as Legal. ; as Legal.
; Verify that fptosi(42.1) isn't simplified when the rounding mode is ; Verify that fptosi(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; Verify that no gross errors happen. ; Verify that no gross errors happen.
; CHECK-LABEL: @f20 ; CHECK-LABEL: @f20
; COMMON: cfdctsiz ; COMMON: cfdctsiz
define i32 @f20(double %a) { define i32 @f20(double %a) strictfp {
entry: entry:
%result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1, %result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1,
metadata !"fpexcept.strict") metadata !"fpexcept.strict")
strictfp
ret i32 %result ret i32 %result
} }
@llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata" @llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata"
declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata)

llvm/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu < %s | FileCheck --check-prefix=PC64LE %s ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu < %s | FileCheck --check-prefix=PC64LE %s
; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck --check-prefix=PC64LE9 %s ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck --check-prefix=PC64LE9 %s
define <1 x float> @constrained_vector_fdiv_v1f32() nounwind { define <1 x float> @constrained_vector_fdiv_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v1f32: ; PC64LE-LABEL: constrained_vector_fdiv_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI0_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI0_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI0_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI0_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI0_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI0_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI0_1@toc@l(4)
; PC64LE-NEXT: xsdivsp 0, 1, 0 ; PC64LE-NEXT: xsdivsp 0, 1, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
Show All 10 Lines
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32( %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %div ret <1 x float> %div
} }
define <2 x double> @constrained_vector_fdiv_v2f64() nounwind { define <2 x double> @constrained_vector_fdiv_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v2f64: ; PC64LE-LABEL: constrained_vector_fdiv_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI1_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI1_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI1_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI1_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI1_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI1_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI1_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI1_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 12 Lines
; PC64LE9-NEXT: lxvx 1, 0, 3 ; PC64LE9-NEXT: lxvx 1, 0, 3
; PC64LE9-NEXT: xvdivdp 34, 1, 0 ; PC64LE9-NEXT: xvdivdp 34, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64( %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %div ret <2 x double> %div
} }
define <3 x float> @constrained_vector_fdiv_v3f32() nounwind { define <3 x float> @constrained_vector_fdiv_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v3f32: ; PC64LE-LABEL: constrained_vector_fdiv_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI2_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI2_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI2_3@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI2_3@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI2_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI2_2@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI2_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI2_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI2_3@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI2_3@toc@l(4)
; PC64LE-NEXT: lfs 2, .LCPI2_2@toc@l(5) ; PC64LE-NEXT: lfs 2, .LCPI2_2@toc@l(5)
Show All 40 Lines
; PC64LE9-NEXT: xxsldwi 35, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 35, 0, 0, 1
; PC64LE9-NEXT: vperm 2, 3, 2, 4 ; PC64LE9-NEXT: vperm 2, 3, 2, 4
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32( %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %div ret <3 x float> %div
} }
define <3 x double> @constrained_vector_fdiv_v3f64() nounwind { define <3 x double> @constrained_vector_fdiv_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v3f64: ; PC64LE-LABEL: constrained_vector_fdiv_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI3_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI3_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI3_3@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI3_3@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI3_2@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI3_2@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI3_3@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI3_3@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 28 Lines
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64( %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>, <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %div ret <3 x double> %div
} }
define <4 x double> @constrained_vector_fdiv_v4f64() nounwind { define <4 x double> @constrained_vector_fdiv_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_fdiv_v4f64: ; PC64LE-LABEL: constrained_vector_fdiv_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI4_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI4_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI4_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI4_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI4_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI4_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI4_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI4_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addi 3, 4, .LCPI4_1@toc@l ; PC64LE-NEXT: addi 3, 4, .LCPI4_1@toc@l
Show All 23 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64( %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %div ret <4 x double> %div
} }
define <1 x float> @constrained_vector_frem_v1f32() nounwind { define <1 x float> @constrained_vector_frem_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_frem_v1f32: ; PC64LE-LABEL: constrained_vector_frem_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI5_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI5_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI5_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI5_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI5_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI5_0@toc@l(3)
Show All 24 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32( %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %rem ret <1 x float> %rem
} }
define <2 x double> @constrained_vector_frem_v2f64() nounwind { define <2 x double> @constrained_vector_frem_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_frem_v2f64: ; PC64LE-LABEL: constrained_vector_frem_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: addis 4, 2, .LCPI6_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI6_1@toc@ha
; PC64LE-NEXT: addis 3, 2, .LCPI6_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI6_0@toc@ha
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64( %rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %rem ret <2 x double> %rem
} }
define <3 x float> @constrained_vector_frem_v3f32() nounwind { define <3 x float> @constrained_vector_frem_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_frem_v3f32: ; PC64LE-LABEL: constrained_vector_frem_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32( %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %rem ret <3 x float> %rem
} }
define <3 x double> @constrained_vector_frem_v3f64() nounwind { define <3 x double> @constrained_vector_frem_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_frem_v3f64: ; PC64LE-LABEL: constrained_vector_frem_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -96(1) ; PC64LE-NEXT: stdu 1, -96(1)
; PC64LE-NEXT: addis 4, 2, .LCPI8_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI8_1@toc@ha
; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64( %rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>, <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %rem ret <3 x double> %rem
} }
define <4 x double> @constrained_vector_frem_v4f64() nounwind { define <4 x double> @constrained_vector_frem_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_frem_v4f64: ; PC64LE-LABEL: constrained_vector_frem_v4f64:
; PC64LE: # %bb.0: ; PC64LE: # %bb.0:
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -96(1) ; PC64LE-NEXT: stdu 1, -96(1)
; PC64LE-NEXT: addis 4, 2, .LCPI9_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI9_1@toc@ha
; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
%rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64( %rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %rem ret <4 x double> %rem
} }
define <1 x float> @constrained_vector_fmul_v1f32() nounwind { define <1 x float> @constrained_vector_fmul_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_fmul_v1f32: ; PC64LE-LABEL: constrained_vector_fmul_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI10_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI10_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI10_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI10_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI10_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI10_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI10_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI10_1@toc@l(4)
; PC64LE-NEXT: xsmulsp 0, 1, 0 ; PC64LE-NEXT: xsmulsp 0, 1, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
Show All 10 Lines
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32( %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 2.000000e+00>, <1 x float> <float 2.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %mul ret <1 x float> %mul
} }
define <2 x double> @constrained_vector_fmul_v2f64() nounwind { define <2 x double> @constrained_vector_fmul_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_fmul_v2f64: ; PC64LE-LABEL: constrained_vector_fmul_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI11_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI11_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI11_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI11_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI11_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI11_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI11_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI11_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 12 Lines
; PC64LE9-NEXT: lxvx 1, 0, 3 ; PC64LE9-NEXT: lxvx 1, 0, 3
; PC64LE9-NEXT: xvmuldp 34, 1, 0 ; PC64LE9-NEXT: xvmuldp 34, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 2.000000e+00, double 3.000000e+00>, <2 x double> <double 2.000000e+00, double 3.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %mul ret <2 x double> %mul
} }
define <3 x float> @constrained_vector_fmul_v3f32() nounwind { define <3 x float> @constrained_vector_fmul_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_fmul_v3f32: ; PC64LE-LABEL: constrained_vector_fmul_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI12_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI12_1@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI12_3@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI12_3@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI12_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI12_2@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI12_1@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI12_1@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI12_3@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI12_3@toc@l(4)
; PC64LE-NEXT: lfs 2, .LCPI12_2@toc@l(5) ; PC64LE-NEXT: lfs 2, .LCPI12_2@toc@l(5)
▲ Show 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: vperm 2, 3, 2, 4 ; PC64LE9-NEXT: vperm 2, 3, 2, 4
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32( %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
<3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000, <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,
float 0x7FF0000000000000>, float 0x7FF0000000000000>,
<3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>, <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %mul ret <3 x float> %mul
} }
define <3 x double> @constrained_vector_fmul_v3f64() nounwind { define <3 x double> @constrained_vector_fmul_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_fmul_v3f64: ; PC64LE-LABEL: constrained_vector_fmul_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI13_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI13_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI13_3@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI13_3@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI13_2@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI13_2@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI13_3@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI13_3@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 29 Lines
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64( %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>, <3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %mul ret <3 x double> %mul
} }
define <4 x double> @constrained_vector_fmul_v4f64() nounwind { define <4 x double> @constrained_vector_fmul_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_fmul_v4f64: ; PC64LE-LABEL: constrained_vector_fmul_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI14_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI14_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI14_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI14_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI14_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI14_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI14_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI14_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI14_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI14_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
Show All 23 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64( %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 2.000000e+00, double 3.000000e+00, <4 x double> <double 2.000000e+00, double 3.000000e+00,
double 4.000000e+00, double 5.000000e+00>, double 4.000000e+00, double 5.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %mul ret <4 x double> %mul
} }
define <1 x float> @constrained_vector_fadd_v1f32() nounwind { define <1 x float> @constrained_vector_fadd_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_fadd_v1f32: ; PC64LE-LABEL: constrained_vector_fadd_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI15_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI15_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI15_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI15_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI15_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI15_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI15_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI15_1@toc@l(4)
; PC64LE-NEXT: xsaddsp 0, 1, 0 ; PC64LE-NEXT: xsaddsp 0, 1, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
Show All 10 Lines
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32( %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.0>, <1 x float> <float 1.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %add ret <1 x float> %add
} }
define <2 x double> @constrained_vector_fadd_v2f64() nounwind { define <2 x double> @constrained_vector_fadd_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_fadd_v2f64: ; PC64LE-LABEL: constrained_vector_fadd_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI16_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI16_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI16_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI16_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI16_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI16_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI16_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI16_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 12 Lines
; PC64LE9-NEXT: lxvx 1, 0, 3 ; PC64LE9-NEXT: lxvx 1, 0, 3
; PC64LE9-NEXT: xvadddp 34, 1, 0 ; PC64LE9-NEXT: xvadddp 34, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %add ret <2 x double> %add
} }
define <3 x float> @constrained_vector_fadd_v3f32() nounwind { define <3 x float> @constrained_vector_fadd_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_fadd_v3f32: ; PC64LE-LABEL: constrained_vector_fadd_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI17_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI17_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI17_2@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI17_2@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI17_1@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI17_1@toc@ha
; PC64LE-NEXT: xxlxor 3, 3, 3 ; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: lfs 0, .LCPI17_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI17_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI17_2@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI17_2@toc@l(4)
Show All 39 Lines
; PC64LE9-NEXT: vperm 2, 3, 2, 4 ; PC64LE9-NEXT: vperm 2, 3, 2, 4
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32( %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %add ret <3 x float> %add
} }
define <3 x double> @constrained_vector_fadd_v3f64() nounwind { define <3 x double> @constrained_vector_fadd_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_fadd_v3f64: ; PC64LE-LABEL: constrained_vector_fadd_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI18_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI18_1@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI18_2@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI18_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI18_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI18_1@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI18_2@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI18_2@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 27 Lines
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64( %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> <double 2.0, double 1.0, double 0.0>, <3 x double> <double 2.0, double 1.0, double 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %add ret <3 x double> %add
} }
define <4 x double> @constrained_vector_fadd_v4f64() nounwind { define <4 x double> @constrained_vector_fadd_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_fadd_v4f64: ; PC64LE-LABEL: constrained_vector_fadd_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI19_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI19_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI19_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI19_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI19_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI19_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI19_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI19_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI19_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI19_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
Show All 23 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64( %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %add ret <4 x double> %add
} }
define <1 x float> @constrained_vector_fsub_v1f32() nounwind { define <1 x float> @constrained_vector_fsub_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_fsub_v1f32: ; PC64LE-LABEL: constrained_vector_fsub_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI20_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI20_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI20_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI20_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI20_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI20_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI20_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI20_1@toc@l(4)
; PC64LE-NEXT: xssubsp 0, 1, 0 ; PC64LE-NEXT: xssubsp 0, 1, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
Show All 10 Lines
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32( %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %sub ret <1 x float> %sub
} }
define <2 x double> @constrained_vector_fsub_v2f64() nounwind { define <2 x double> @constrained_vector_fsub_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_fsub_v2f64: ; PC64LE-LABEL: constrained_vector_fsub_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI21_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI21_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI21_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI21_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI21_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI21_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI21_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI21_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 12 Lines
; PC64LE9-NEXT: lxvx 1, 0, 3 ; PC64LE9-NEXT: lxvx 1, 0, 3
; PC64LE9-NEXT: xvsubdp 34, 1, 0 ; PC64LE9-NEXT: xvsubdp 34, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %sub ret <2 x double> %sub
} }
define <3 x float> @constrained_vector_fsub_v3f32() nounwind { define <3 x float> @constrained_vector_fsub_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_fsub_v3f32: ; PC64LE-LABEL: constrained_vector_fsub_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI22_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI22_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI22_2@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI22_2@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI22_1@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI22_1@toc@ha
; PC64LE-NEXT: xxlxor 3, 3, 3 ; PC64LE-NEXT: xxlxor 3, 3, 3
; PC64LE-NEXT: lfs 0, .LCPI22_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI22_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI22_2@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI22_2@toc@l(4)
Show All 39 Lines
; PC64LE9-NEXT: vperm 2, 3, 2, 4 ; PC64LE9-NEXT: vperm 2, 3, 2, 4
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32( %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %sub ret <3 x float> %sub
} }
define <3 x double> @constrained_vector_fsub_v3f64() nounwind { define <3 x double> @constrained_vector_fsub_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_fsub_v3f64: ; PC64LE-LABEL: constrained_vector_fsub_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI23_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI23_1@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI23_2@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI23_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI23_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI23_1@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI23_2@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI23_2@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 27 Lines
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64( %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
<3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF>,
<3 x double> <double 2.0, double 1.0, double 0.0>, <3 x double> <double 2.0, double 1.0, double 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %sub ret <3 x double> %sub
} }
define <4 x double> @constrained_vector_fsub_v4f64() nounwind { define <4 x double> @constrained_vector_fsub_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_fsub_v4f64: ; PC64LE-LABEL: constrained_vector_fsub_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI24_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI24_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI24_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI24_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI24_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI24_2@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI24_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI24_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI24_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI24_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
Show All 23 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64( %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(
<4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %sub ret <4 x double> %sub
} }
define <1 x float> @constrained_vector_sqrt_v1f32() nounwind { define <1 x float> @constrained_vector_sqrt_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v1f32: ; PC64LE-LABEL: constrained_vector_sqrt_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI25_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI25_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI25_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI25_0@toc@l(3)
; PC64LE-NEXT: xssqrtsp 0, 0 ; PC64LE-NEXT: xssqrtsp 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_sqrt_v1f32: ; PC64LE9-LABEL: constrained_vector_sqrt_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI25_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI25_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI25_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI25_0@toc@l(3)
; PC64LE9-NEXT: xssqrtsp 0, 0 ; PC64LE9-NEXT: xssqrtsp 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32( %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %sqrt ret <1 x float> %sqrt
} }
define <2 x double> @constrained_vector_sqrt_v2f64() nounwind { define <2 x double> @constrained_vector_sqrt_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v2f64: ; PC64LE-LABEL: constrained_vector_sqrt_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI26_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI26_0@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI26_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI26_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
; PC64LE-NEXT: xvsqrtdp 34, 0 ; PC64LE-NEXT: xvsqrtdp 34, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_sqrt_v2f64: ; PC64LE9-LABEL: constrained_vector_sqrt_v2f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI26_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI26_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI26_0@toc@l ; PC64LE9-NEXT: addi 3, 3, .LCPI26_0@toc@l
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvsqrtdp 34, 0 ; PC64LE9-NEXT: xvsqrtdp 34, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64( %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %sqrt ret <2 x double> %sqrt
} }
define <3 x float> @constrained_vector_sqrt_v3f32() nounwind { define <3 x float> @constrained_vector_sqrt_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v3f32: ; PC64LE-LABEL: constrained_vector_sqrt_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI27_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI27_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI27_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI27_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI27_2@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI27_2@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI27_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI27_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI27_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI27_0@toc@ha
; PC64LE-NEXT: xssqrtsp 0, 0 ; PC64LE-NEXT: xssqrtsp 0, 0
Show All 35 Lines
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: lxvx 35, 0, 3 ; PC64LE9-NEXT: lxvx 35, 0, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32( %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %sqrt ret <3 x float> %sqrt
} }
define <3 x double> @constrained_vector_sqrt_v3f64() nounwind { define <3 x double> @constrained_vector_sqrt_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v3f64: ; PC64LE-LABEL: constrained_vector_sqrt_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI28_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI28_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI28_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI28_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addis 3, 2, .LCPI28_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI28_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI28_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI28_0@toc@l(3)
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
Show All 16 Lines
; PC64LE9-NEXT: xxswapd 1, 2 ; PC64LE9-NEXT: xxswapd 1, 2
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64( %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %sqrt ret <3 x double> %sqrt
} }
define <4 x double> @constrained_vector_sqrt_v4f64() nounwind { define <4 x double> @constrained_vector_sqrt_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_sqrt_v4f64: ; PC64LE-LABEL: constrained_vector_sqrt_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI29_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI29_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI29_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI29_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI29_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI29_0@toc@l
; PC64LE-NEXT: addi 4, 4, .LCPI29_1@toc@l ; PC64LE-NEXT: addi 4, 4, .LCPI29_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: lxvd2x 1, 0, 4 ; PC64LE-NEXT: lxvd2x 1, 0, 4
Show All 14 Lines
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvsqrtdp 35, 0 ; PC64LE9-NEXT: xvsqrtdp 35, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %sqrt ret <4 x double> %sqrt
} }
define <1 x float> @constrained_vector_pow_v1f32() nounwind { define <1 x float> @constrained_vector_pow_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_pow_v1f32: ; PC64LE-LABEL: constrained_vector_pow_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI30_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI30_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI30_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI30_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI30_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI30_0@toc@l(3)
Show All 24 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32( %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
<1 x float> <float 3.0>, <1 x float> <float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %pow ret <1 x float> %pow
} }
define <2 x double> @constrained_vector_pow_v2f64() nounwind { define <2 x double> @constrained_vector_pow_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_pow_v2f64: ; PC64LE-LABEL: constrained_vector_pow_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: addis 4, 2, .LCPI31_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI31_1@toc@ha
; PC64LE-NEXT: addis 3, 2, .LCPI31_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI31_0@toc@ha
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64( %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
<2 x double> <double 3.0, double 3.0>, <2 x double> <double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %pow ret <2 x double> %pow
} }
define <3 x float> @constrained_vector_pow_v3f32() nounwind { define <3 x float> @constrained_vector_pow_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_pow_v3f32: ; PC64LE-LABEL: constrained_vector_pow_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
▲ Show 20 Lines • Show All 80 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32( %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
<3 x float> <float 3.0, float 3.0, float 3.0>, <3 x float> <float 3.0, float 3.0, float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %pow ret <3 x float> %pow
} }
define <3 x double> @constrained_vector_pow_v3f64() nounwind { define <3 x double> @constrained_vector_pow_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_pow_v3f64: ; PC64LE-LABEL: constrained_vector_pow_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -96(1) ; PC64LE-NEXT: stdu 1, -96(1)
; PC64LE-NEXT: addis 4, 2, .LCPI33_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI33_1@toc@ha
; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64( %pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
<3 x double> <double 3.0, double 3.0, double 3.0>, <3 x double> <double 3.0, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %pow ret <3 x double> %pow
} }
define <4 x double> @constrained_vector_pow_v4f64() nounwind { define <4 x double> @constrained_vector_pow_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_pow_v4f64: ; PC64LE-LABEL: constrained_vector_pow_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -96(1) ; PC64LE-NEXT: stdu 1, -96(1)
; PC64LE-NEXT: addis 4, 2, .LCPI34_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI34_1@toc@ha
; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, 88(1) # 8-byte Folded Spill
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
▲ Show 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64( %pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
<4 x double> <double 3.0, double 3.0, <4 x double> <double 3.0, double 3.0,
double 3.0, double 3.0>, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %pow ret <4 x double> %pow
} }
define <1 x float> @constrained_vector_powi_v1f32() nounwind { define <1 x float> @constrained_vector_powi_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_powi_v1f32: ; PC64LE-LABEL: constrained_vector_powi_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI35_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI35_0@toc@ha
; PC64LE-NEXT: li 4, 3 ; PC64LE-NEXT: li 4, 3
; PC64LE-NEXT: lfs 1, .LCPI35_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI35_0@toc@l(3)
Show All 22 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32( %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %powi ret <1 x float> %powi
} }
define <2 x double> @constrained_vector_powi_v2f64() nounwind { define <2 x double> @constrained_vector_powi_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_powi_v2f64: ; PC64LE-LABEL: constrained_vector_powi_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI36_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI36_0@toc@ha
; PC64LE-NEXT: li 4, 3 ; PC64LE-NEXT: li 4, 3
; PC64LE-NEXT: lfd 1, .LCPI36_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI36_0@toc@l(3)
Show All 40 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64( %powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %powi ret <2 x double> %powi
} }
define <3 x float> @constrained_vector_powi_v3f32() nounwind { define <3 x float> @constrained_vector_powi_v3f32() #0 {
; ;
; ;
; PC64LE-LABEL: constrained_vector_powi_v3f32: ; PC64LE-LABEL: constrained_vector_powi_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32( %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %powi ret <3 x float> %powi
} }
define <3 x double> @constrained_vector_powi_v3f64() nounwind { define <3 x double> @constrained_vector_powi_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_powi_v3f64: ; PC64LE-LABEL: constrained_vector_powi_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: li 4, 3 ; PC64LE-NEXT: li 4, 3
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64( %powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %powi ret <3 x double> %powi
} }
define <4 x double> @constrained_vector_powi_v4f64() nounwind { define <4 x double> @constrained_vector_powi_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_powi_v4f64: ; PC64LE-LABEL: constrained_vector_powi_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: li 4, 3 ; PC64LE-NEXT: li 4, 3
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64( %powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %powi ret <4 x double> %powi
} }
define <1 x float> @constrained_vector_sin_v1f32() nounwind { define <1 x float> @constrained_vector_sin_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_sin_v1f32: ; PC64LE-LABEL: constrained_vector_sin_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI40_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI40_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI40_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI40_0@toc@l(3)
; PC64LE-NEXT: bl sinf ; PC64LE-NEXT: bl sinf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32( %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %sin ret <1 x float> %sin
} }
define <2 x double> @constrained_vector_sin_v2f64() nounwind { define <2 x double> @constrained_vector_sin_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_sin_v2f64: ; PC64LE-LABEL: constrained_vector_sin_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI41_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI41_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI41_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI41_0@toc@l(3)
; PC64LE-NEXT: bl sin ; PC64LE-NEXT: bl sin
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64( %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %sin ret <2 x double> %sin
} }
define <3 x float> @constrained_vector_sin_v3f32() nounwind { define <3 x float> @constrained_vector_sin_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_sin_v3f32: ; PC64LE-LABEL: constrained_vector_sin_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI42_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI42_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32( %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %sin ret <3 x float> %sin
} }
define <3 x double> @constrained_vector_sin_v3f64() nounwind { define <3 x double> @constrained_vector_sin_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_sin_v3f64: ; PC64LE-LABEL: constrained_vector_sin_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI43_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI43_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64( %sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %sin ret <3 x double> %sin
} }
define <4 x double> @constrained_vector_sin_v4f64() nounwind { define <4 x double> @constrained_vector_sin_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_sin_v4f64: ; PC64LE-LABEL: constrained_vector_sin_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI44_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI44_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64( %sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %sin ret <4 x double> %sin
} }
define <1 x float> @constrained_vector_cos_v1f32() nounwind { define <1 x float> @constrained_vector_cos_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_cos_v1f32: ; PC64LE-LABEL: constrained_vector_cos_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI45_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI45_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI45_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI45_0@toc@l(3)
; PC64LE-NEXT: bl cosf ; PC64LE-NEXT: bl cosf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32( %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %cos ret <1 x float> %cos
} }
define <2 x double> @constrained_vector_cos_v2f64() nounwind { define <2 x double> @constrained_vector_cos_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_cos_v2f64: ; PC64LE-LABEL: constrained_vector_cos_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI46_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI46_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI46_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI46_0@toc@l(3)
; PC64LE-NEXT: bl cos ; PC64LE-NEXT: bl cos
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64( %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %cos ret <2 x double> %cos
} }
define <3 x float> @constrained_vector_cos_v3f32() nounwind { define <3 x float> @constrained_vector_cos_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_cos_v3f32: ; PC64LE-LABEL: constrained_vector_cos_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI47_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI47_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32( %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %cos ret <3 x float> %cos
} }
define <3 x double> @constrained_vector_cos_v3f64() nounwind { define <3 x double> @constrained_vector_cos_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_cos_v3f64: ; PC64LE-LABEL: constrained_vector_cos_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI48_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI48_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64( %cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %cos ret <3 x double> %cos
} }
define <4 x double> @constrained_vector_cos_v4f64() nounwind { define <4 x double> @constrained_vector_cos_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_cos_v4f64: ; PC64LE-LABEL: constrained_vector_cos_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI49_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI49_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64( %cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %cos ret <4 x double> %cos
} }
define <1 x float> @constrained_vector_exp_v1f32() nounwind { define <1 x float> @constrained_vector_exp_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_exp_v1f32: ; PC64LE-LABEL: constrained_vector_exp_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI50_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI50_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI50_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI50_0@toc@l(3)
; PC64LE-NEXT: bl expf ; PC64LE-NEXT: bl expf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32( %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %exp ret <1 x float> %exp
} }
define <2 x double> @constrained_vector_exp_v2f64() nounwind { define <2 x double> @constrained_vector_exp_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_exp_v2f64: ; PC64LE-LABEL: constrained_vector_exp_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI51_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI51_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI51_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI51_0@toc@l(3)
; PC64LE-NEXT: bl exp ; PC64LE-NEXT: bl exp
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64( %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %exp ret <2 x double> %exp
} }
define <3 x float> @constrained_vector_exp_v3f32() nounwind { define <3 x float> @constrained_vector_exp_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_exp_v3f32: ; PC64LE-LABEL: constrained_vector_exp_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI52_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI52_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32( %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %exp ret <3 x float> %exp
} }
define <3 x double> @constrained_vector_exp_v3f64() nounwind { define <3 x double> @constrained_vector_exp_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_exp_v3f64: ; PC64LE-LABEL: constrained_vector_exp_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI53_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI53_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64( %exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %exp ret <3 x double> %exp
} }
define <4 x double> @constrained_vector_exp_v4f64() nounwind { define <4 x double> @constrained_vector_exp_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_exp_v4f64: ; PC64LE-LABEL: constrained_vector_exp_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI54_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI54_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64( %exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %exp ret <4 x double> %exp
} }
define <1 x float> @constrained_vector_exp2_v1f32() nounwind { define <1 x float> @constrained_vector_exp2_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_exp2_v1f32: ; PC64LE-LABEL: constrained_vector_exp2_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI55_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI55_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI55_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI55_0@toc@l(3)
; PC64LE-NEXT: bl exp2f ; PC64LE-NEXT: bl exp2f
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32( %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %exp2 ret <1 x float> %exp2
} }
define <2 x double> @constrained_vector_exp2_v2f64() nounwind { define <2 x double> @constrained_vector_exp2_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_exp2_v2f64: ; PC64LE-LABEL: constrained_vector_exp2_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI56_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI56_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI56_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI56_0@toc@l(3)
; PC64LE-NEXT: bl exp2 ; PC64LE-NEXT: bl exp2
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64( %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %exp2 ret <2 x double> %exp2
} }
define <3 x float> @constrained_vector_exp2_v3f32() nounwind { define <3 x float> @constrained_vector_exp2_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_exp2_v3f32: ; PC64LE-LABEL: constrained_vector_exp2_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI57_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI57_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32( %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %exp2 ret <3 x float> %exp2
} }
define <3 x double> @constrained_vector_exp2_v3f64() nounwind { define <3 x double> @constrained_vector_exp2_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_exp2_v3f64: ; PC64LE-LABEL: constrained_vector_exp2_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI58_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI58_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64( %exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %exp2 ret <3 x double> %exp2
} }
define <4 x double> @constrained_vector_exp2_v4f64() nounwind { define <4 x double> @constrained_vector_exp2_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_exp2_v4f64: ; PC64LE-LABEL: constrained_vector_exp2_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI59_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI59_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64( %exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %exp2 ret <4 x double> %exp2
} }
define <1 x float> @constrained_vector_log_v1f32() nounwind { define <1 x float> @constrained_vector_log_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_log_v1f32: ; PC64LE-LABEL: constrained_vector_log_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI60_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI60_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI60_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI60_0@toc@l(3)
; PC64LE-NEXT: bl logf ; PC64LE-NEXT: bl logf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log = call <1 x float> @llvm.experimental.constrained.log.v1f32( %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %log ret <1 x float> %log
} }
define <2 x double> @constrained_vector_log_v2f64() nounwind { define <2 x double> @constrained_vector_log_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_log_v2f64: ; PC64LE-LABEL: constrained_vector_log_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI61_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI61_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI61_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI61_0@toc@l(3)
; PC64LE-NEXT: bl log ; PC64LE-NEXT: bl log
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log = call <2 x double> @llvm.experimental.constrained.log.v2f64( %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %log ret <2 x double> %log
} }
define <3 x float> @constrained_vector_log_v3f32() nounwind { define <3 x float> @constrained_vector_log_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_log_v3f32: ; PC64LE-LABEL: constrained_vector_log_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI62_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI62_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log = call <3 x float> @llvm.experimental.constrained.log.v3f32( %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %log ret <3 x float> %log
} }
define <3 x double> @constrained_vector_log_v3f64() nounwind { define <3 x double> @constrained_vector_log_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_log_v3f64: ; PC64LE-LABEL: constrained_vector_log_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI63_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI63_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log = call <3 x double> @llvm.experimental.constrained.log.v3f64( %log = call <3 x double> @llvm.experimental.constrained.log.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %log ret <3 x double> %log
} }
define <4 x double> @constrained_vector_log_v4f64() nounwind { define <4 x double> @constrained_vector_log_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_log_v4f64: ; PC64LE-LABEL: constrained_vector_log_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI64_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI64_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log = call <4 x double> @llvm.experimental.constrained.log.v4f64( %log = call <4 x double> @llvm.experimental.constrained.log.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %log ret <4 x double> %log
} }
define <1 x float> @constrained_vector_log10_v1f32() nounwind { define <1 x float> @constrained_vector_log10_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_log10_v1f32: ; PC64LE-LABEL: constrained_vector_log10_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI65_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI65_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI65_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI65_0@toc@l(3)
; PC64LE-NEXT: bl log10f ; PC64LE-NEXT: bl log10f
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32( %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %log10 ret <1 x float> %log10
} }
define <2 x double> @constrained_vector_log10_v2f64() nounwind { define <2 x double> @constrained_vector_log10_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_log10_v2f64: ; PC64LE-LABEL: constrained_vector_log10_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI66_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI66_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI66_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI66_0@toc@l(3)
; PC64LE-NEXT: bl log10 ; PC64LE-NEXT: bl log10
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64( %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %log10 ret <2 x double> %log10
} }
define <3 x float> @constrained_vector_log10_v3f32() nounwind { define <3 x float> @constrained_vector_log10_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_log10_v3f32: ; PC64LE-LABEL: constrained_vector_log10_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI67_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI67_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32( %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %log10 ret <3 x float> %log10
} }
define <3 x double> @constrained_vector_log10_v3f64() nounwind { define <3 x double> @constrained_vector_log10_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_log10_v3f64: ; PC64LE-LABEL: constrained_vector_log10_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI68_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI68_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64( %log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %log10 ret <3 x double> %log10
} }
define <4 x double> @constrained_vector_log10_v4f64() nounwind { define <4 x double> @constrained_vector_log10_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_log10_v4f64: ; PC64LE-LABEL: constrained_vector_log10_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI69_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI69_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64( %log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %log10 ret <4 x double> %log10
} }
define <1 x float> @constrained_vector_log2_v1f32() nounwind { define <1 x float> @constrained_vector_log2_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_log2_v1f32: ; PC64LE-LABEL: constrained_vector_log2_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI70_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI70_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI70_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI70_0@toc@l(3)
; PC64LE-NEXT: bl log2f ; PC64LE-NEXT: bl log2f
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32( %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %log2 ret <1 x float> %log2
} }
define <2 x double> @constrained_vector_log2_v2f64() nounwind { define <2 x double> @constrained_vector_log2_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_log2_v2f64: ; PC64LE-LABEL: constrained_vector_log2_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI71_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI71_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI71_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI71_0@toc@l(3)
; PC64LE-NEXT: bl log2 ; PC64LE-NEXT: bl log2
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64( %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %log2 ret <2 x double> %log2
} }
define <3 x float> @constrained_vector_log2_v3f32() nounwind { define <3 x float> @constrained_vector_log2_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_log2_v3f32: ; PC64LE-LABEL: constrained_vector_log2_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI72_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI72_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32( %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %log2 ret <3 x float> %log2
} }
define <3 x double> @constrained_vector_log2_v3f64() nounwind { define <3 x double> @constrained_vector_log2_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_log2_v3f64: ; PC64LE-LABEL: constrained_vector_log2_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI73_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI73_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64( %log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %log2 ret <3 x double> %log2
} }
define <4 x double> @constrained_vector_log2_v4f64() nounwind { define <4 x double> @constrained_vector_log2_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_log2_v4f64: ; PC64LE-LABEL: constrained_vector_log2_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI74_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI74_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64( %log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %log2 ret <4 x double> %log2
} }
define <1 x float> @constrained_vector_rint_v1f32() nounwind { define <1 x float> @constrained_vector_rint_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_rint_v1f32: ; PC64LE-LABEL: constrained_vector_rint_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI75_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI75_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI75_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI75_0@toc@l(3)
; PC64LE-NEXT: bl rintf ; PC64LE-NEXT: bl rintf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32( %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %rint ret <1 x float> %rint
} }
define <2 x double> @constrained_vector_rint_v2f64() nounwind { define <2 x double> @constrained_vector_rint_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_rint_v2f64: ; PC64LE-LABEL: constrained_vector_rint_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI76_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI76_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI76_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI76_0@toc@l(3)
; PC64LE-NEXT: bl rint ; PC64LE-NEXT: bl rint
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64( %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %rint ret <2 x double> %rint
} }
define <3 x float> @constrained_vector_rint_v3f32() nounwind { define <3 x float> @constrained_vector_rint_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_rint_v3f32: ; PC64LE-LABEL: constrained_vector_rint_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI77_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI77_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32( %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %rint ret <3 x float> %rint
} }
define <3 x double> @constrained_vector_rint_v3f64() nounwind { define <3 x double> @constrained_vector_rint_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_rint_v3f64: ; PC64LE-LABEL: constrained_vector_rint_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI78_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI78_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64( %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %rint ret <3 x double> %rint
} }
define <4 x double> @constrained_vector_rint_v4f64() nounwind { define <4 x double> @constrained_vector_rint_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_rint_v4f64: ; PC64LE-LABEL: constrained_vector_rint_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI79_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI79_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64( %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %rint ret <4 x double> %rint
} }
define <1 x float> @constrained_vector_nearbyint_v1f32() nounwind { define <1 x float> @constrained_vector_nearbyint_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_nearbyint_v1f32: ; PC64LE-LABEL: constrained_vector_nearbyint_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI80_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI80_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI80_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI80_0@toc@l(3)
; PC64LE-NEXT: bl nearbyintf ; PC64LE-NEXT: bl nearbyintf
Show All 19 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32( %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %nearby ret <1 x float> %nearby
} }
define <2 x double> @constrained_vector_nearbyint_v2f64() nounwind { define <2 x double> @constrained_vector_nearbyint_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_nearbyint_v2f64: ; PC64LE-LABEL: constrained_vector_nearbyint_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI81_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI81_0@toc@ha
; PC64LE-NEXT: lfd 1, .LCPI81_0@toc@l(3) ; PC64LE-NEXT: lfd 1, .LCPI81_0@toc@l(3)
; PC64LE-NEXT: bl nearbyint ; PC64LE-NEXT: bl nearbyint
Show All 35 Lines
; PC64LE9-NEXT: addi 1, 1, 48 ; PC64LE9-NEXT: addi 1, 1, 48
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64( %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %nearby ret <2 x double> %nearby
} }
define <3 x float> @constrained_vector_nearbyint_v3f32() nounwind { define <3 x float> @constrained_vector_nearbyint_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_nearbyint_v3f32: ; PC64LE-LABEL: constrained_vector_nearbyint_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -48(1) ; PC64LE-NEXT: stdu 1, -48(1)
; PC64LE-NEXT: addis 3, 2, .LCPI82_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI82_0@toc@ha
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 31, -8(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32( %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %nearby ret <3 x float> %nearby
} }
define <3 x double> @constrained_vector_nearby_v3f64() nounwind { define <3 x double> @constrained_vector_nearby_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_nearby_v3f64: ; PC64LE-LABEL: constrained_vector_nearby_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI83_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI83_0@toc@ha
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: addi 1, 1, 64 ; PC64LE9-NEXT: addi 1, 1, 64
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64( %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %nearby ret <3 x double> %nearby
} }
define <4 x double> @constrained_vector_nearbyint_v4f64() nounwind { define <4 x double> @constrained_vector_nearbyint_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_nearbyint_v4f64: ; PC64LE-LABEL: constrained_vector_nearbyint_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
; PC64LE-NEXT: addis 3, 2, .LCPI84_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI84_0@toc@ha
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64( %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %nearby ret <4 x double> %nearby
} }
define <1 x float> @constrained_vector_maxnum_v1f32() nounwind { define <1 x float> @constrained_vector_maxnum_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_maxnum_v1f32: ; PC64LE-LABEL: constrained_vector_maxnum_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI85_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI85_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI85_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI85_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI85_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI85_0@toc@l(3)
Show All 23 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32( %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %max ret <1 x float> %max
} }
define <2 x double> @constrained_vector_maxnum_v2f64() nounwind { define <2 x double> @constrained_vector_maxnum_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_maxnum_v2f64: ; PC64LE-LABEL: constrained_vector_maxnum_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI86_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI86_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI86_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI86_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI86_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI86_0@toc@l(3)
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64( %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %max ret <2 x double> %max
} }
define <3 x float> @constrained_vector_maxnum_v3f32() nounwind { define <3 x float> @constrained_vector_maxnum_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_maxnum_v3f32: ; PC64LE-LABEL: constrained_vector_maxnum_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32( %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %max ret <3 x float> %max
} }
define <3 x double> @constrained_vector_max_v3f64() nounwind { define <3 x double> @constrained_vector_max_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_max_v3f64: ; PC64LE-LABEL: constrained_vector_max_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: addis 4, 2, .LCPI88_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI88_1@toc@ha
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64( %max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64(
<3 x double> <double 43.0, double 44.0, double 45.0>, <3 x double> <double 43.0, double 44.0, double 45.0>,
<3 x double> <double 40.0, double 41.0, double 42.0>, <3 x double> <double 40.0, double 41.0, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %max ret <3 x double> %max
} }
define <4 x double> @constrained_vector_maxnum_v4f64() nounwind { define <4 x double> @constrained_vector_maxnum_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_maxnum_v4f64: ; PC64LE-LABEL: constrained_vector_maxnum_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: addis 4, 2, .LCPI89_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI89_1@toc@ha
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64( %max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %max ret <4 x double> %max
} }
define <1 x float> @constrained_vector_minnum_v1f32() nounwind { define <1 x float> @constrained_vector_minnum_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_minnum_v1f32: ; PC64LE-LABEL: constrained_vector_minnum_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -32(1) ; PC64LE-NEXT: stdu 1, -32(1)
; PC64LE-NEXT: addis 3, 2, .LCPI90_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI90_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI90_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI90_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI90_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI90_0@toc@l(3)
Show All 23 Lines
; PC64LE9-NEXT: addi 1, 1, 32 ; PC64LE9-NEXT: addi 1, 1, 32
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32( %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %min ret <1 x float> %min
} }
define <2 x double> @constrained_vector_minnum_v2f64() nounwind { define <2 x double> @constrained_vector_minnum_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_minnum_v2f64: ; PC64LE-LABEL: constrained_vector_minnum_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
; PC64LE-NEXT: addis 3, 2, .LCPI91_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI91_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI91_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI91_1@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI91_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI91_0@toc@l(3)
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64( %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %min ret <2 x double> %min
} }
define <3 x float> @constrained_vector_minnum_v3f32() nounwind { define <3 x float> @constrained_vector_minnum_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_minnum_v3f32: ; PC64LE-LABEL: constrained_vector_minnum_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 29, -24(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 30, -16(1) # 8-byte Folded Spill
; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill ; PC64LE-NEXT: stfd 31, -8(1) # 8-byte Folded Spill
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -64(1) ; PC64LE-NEXT: stdu 1, -64(1)
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 30, -16(1) # 8-byte Folded Reload
; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload ; PC64LE9-NEXT: lfd 29, -24(1) # 8-byte Folded Reload
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32( %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %min ret <3 x float> %min
} }
define <3 x double> @constrained_vector_min_v3f64() nounwind { define <3 x double> @constrained_vector_min_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_min_v3f64: ; PC64LE-LABEL: constrained_vector_min_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: addis 4, 2, .LCPI93_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI93_1@toc@ha
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: ld 0, 16(1) ; PC64LE9-NEXT: ld 0, 16(1)
; PC64LE9-NEXT: mtlr 0 ; PC64LE9-NEXT: mtlr 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64( %min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64(
<3 x double> <double 43.0, double 44.0, double 45.0>, <3 x double> <double 43.0, double 44.0, double 45.0>,
<3 x double> <double 40.0, double 41.0, double 42.0>, <3 x double> <double 40.0, double 41.0, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %min ret <3 x double> %min
} }
define <4 x double> @constrained_vector_minnum_v4f64() nounwind { define <4 x double> @constrained_vector_minnum_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_minnum_v4f64: ; PC64LE-LABEL: constrained_vector_minnum_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: mflr 0 ; PC64LE-NEXT: mflr 0
; PC64LE-NEXT: std 0, 16(1) ; PC64LE-NEXT: std 0, 16(1)
; PC64LE-NEXT: stdu 1, -80(1) ; PC64LE-NEXT: stdu 1, -80(1)
; PC64LE-NEXT: li 3, 64 ; PC64LE-NEXT: li 3, 64
; PC64LE-NEXT: addis 4, 2, .LCPI94_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI94_1@toc@ha
; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill ; PC64LE-NEXT: stxvd2x 63, 1, 3 # 16-byte Folded Spill
▲ Show 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64( %min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %min ret <4 x double> %min
} }
define <1 x float> @constrained_vector_fptrunc_v1f64() nounwind { define <1 x float> @constrained_vector_fptrunc_v1f64() #0 {
; PC64LE-LABEL: constrained_vector_fptrunc_v1f64: ; PC64LE-LABEL: constrained_vector_fptrunc_v1f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI95_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI95_0@toc@ha
; PC64LE-NEXT: lfd 0, .LCPI95_0@toc@l(3) ; PC64LE-NEXT: lfd 0, .LCPI95_0@toc@l(3)
; PC64LE-NEXT: frsp 0, 0 ; PC64LE-NEXT: frsp 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_fptrunc_v1f64: ; PC64LE9-LABEL: constrained_vector_fptrunc_v1f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI95_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI95_0@toc@ha
; PC64LE9-NEXT: lfd 0, .LCPI95_0@toc@l(3) ; PC64LE9-NEXT: lfd 0, .LCPI95_0@toc@l(3)
; PC64LE9-NEXT: frsp 0, 0 ; PC64LE9-NEXT: frsp 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64( %result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %result ret <1 x float> %result
} }
define <2 x float> @constrained_vector_fptrunc_v2f64() nounwind { define <2 x float> @constrained_vector_fptrunc_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_fptrunc_v2f64: ; PC64LE-LABEL: constrained_vector_fptrunc_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI96_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI96_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI96_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI96_1@toc@ha
; PC64LE-NEXT: lfd 0, .LCPI96_0@toc@l(3) ; PC64LE-NEXT: lfd 0, .LCPI96_0@toc@l(3)
; PC64LE-NEXT: lfd 1, .LCPI96_1@toc@l(4) ; PC64LE-NEXT: lfd 1, .LCPI96_1@toc@l(4)
; PC64LE-NEXT: frsp 0, 0 ; PC64LE-NEXT: frsp 0, 0
; PC64LE-NEXT: frsp 1, 1 ; PC64LE-NEXT: frsp 1, 1
Show All 17 Lines
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 35, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 35, 0, 0, 1
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64( %result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x float> %result ret <2 x float> %result
} }
define <3 x float> @constrained_vector_fptrunc_v3f64() nounwind { define <3 x float> @constrained_vector_fptrunc_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_fptrunc_v3f64: ; PC64LE-LABEL: constrained_vector_fptrunc_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI97_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI97_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI97_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI97_1@toc@ha
; PC64LE-NEXT: lfd 0, .LCPI97_0@toc@l(3) ; PC64LE-NEXT: lfd 0, .LCPI97_0@toc@l(3)
; PC64LE-NEXT: lfd 1, .LCPI97_1@toc@l(4) ; PC64LE-NEXT: lfd 1, .LCPI97_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI97_3@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI97_3@toc@ha
; PC64LE-NEXT: frsp 0, 0 ; PC64LE-NEXT: frsp 0, 0
Show All 36 Lines
; PC64LE9-NEXT: xxsldwi 36, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 36, 0, 0, 1
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64( %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %result ret <3 x float> %result
} }
define <4 x float> @constrained_vector_fptrunc_v4f64() nounwind { define <4 x float> @constrained_vector_fptrunc_v4f64() #0 {
; PC64LE-LABEL: constrained_vector_fptrunc_v4f64: ; PC64LE-LABEL: constrained_vector_fptrunc_v4f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI98_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI98_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI98_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI98_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI98_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI98_2@toc@ha
; PC64LE-NEXT: addis 6, 2, .LCPI98_3@toc@ha ; PC64LE-NEXT: addis 6, 2, .LCPI98_3@toc@ha
; PC64LE-NEXT: lfd 0, .LCPI98_0@toc@l(3) ; PC64LE-NEXT: lfd 0, .LCPI98_0@toc@l(3)
; PC64LE-NEXT: lfd 1, .LCPI98_1@toc@l(4) ; PC64LE-NEXT: lfd 1, .LCPI98_1@toc@l(4)
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; PC64LE9-NEXT: xvcvdpsp 35, 0 ; PC64LE9-NEXT: xvcvdpsp 35, 0
; PC64LE9-NEXT: vmrgew 2, 3, 2 ; PC64LE9-NEXT: vmrgew 2, 3, 2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( %result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x float> %result ret <4 x float> %result
} }
define <1 x double> @constrained_vector_fpext_v1f32() nounwind { define <1 x double> @constrained_vector_fpext_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_fpext_v1f32: ; PC64LE-LABEL: constrained_vector_fpext_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI99_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI99_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI99_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI99_0@toc@l(3)
; PC64LE-NEXT: xxspltd 34, 0, 0 ; PC64LE-NEXT: xxspltd 34, 0, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_fpext_v1f32: ; PC64LE9-LABEL: constrained_vector_fpext_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI99_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI99_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI99_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI99_0@toc@l(3)
; PC64LE9-NEXT: xxspltd 34, 0, 0 ; PC64LE9-NEXT: xxspltd 34, 0, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32( %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x double> %result ret <1 x double> %result
} }
define <2 x double> @constrained_vector_fpext_v2f32() nounwind { define <2 x double> @constrained_vector_fpext_v2f32() #0 {
; PC64LE-LABEL: constrained_vector_fpext_v2f32: ; PC64LE-LABEL: constrained_vector_fpext_v2f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI100_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI100_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI100_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI100_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI100_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI100_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI100_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI100_1@toc@l(4)
; PC64LE-NEXT: xxmrghd 34, 1, 0 ; PC64LE-NEXT: xxmrghd 34, 1, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_fpext_v2f32: ; PC64LE9-LABEL: constrained_vector_fpext_v2f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI100_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI100_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI100_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI100_0@toc@l(3)
; PC64LE9-NEXT: addis 3, 2, .LCPI100_1@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI100_1@toc@ha
; PC64LE9-NEXT: lfs 1, .LCPI100_1@toc@l(3) ; PC64LE9-NEXT: lfs 1, .LCPI100_1@toc@l(3)
; PC64LE9-NEXT: xxmrghd 34, 1, 0 ; PC64LE9-NEXT: xxmrghd 34, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32( %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %result ret <2 x double> %result
} }
define <3 x double> @constrained_vector_fpext_v3f32() nounwind { define <3 x double> @constrained_vector_fpext_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_fpext_v3f32: ; PC64LE-LABEL: constrained_vector_fpext_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI101_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI101_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI101_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI101_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI101_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI101_2@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI101_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI101_0@toc@l(3)
; PC64LE-NEXT: lfs 2, .LCPI101_1@toc@l(4) ; PC64LE-NEXT: lfs 2, .LCPI101_1@toc@l(4)
; PC64LE-NEXT: lfs 3, .LCPI101_2@toc@l(5) ; PC64LE-NEXT: lfs 3, .LCPI101_2@toc@l(5)
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_fpext_v3f32: ; PC64LE9-LABEL: constrained_vector_fpext_v3f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI101_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI101_0@toc@ha
; PC64LE9-NEXT: lfs 1, .LCPI101_0@toc@l(3) ; PC64LE9-NEXT: lfs 1, .LCPI101_0@toc@l(3)
; PC64LE9-NEXT: addis 3, 2, .LCPI101_1@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI101_1@toc@ha
; PC64LE9-NEXT: lfs 2, .LCPI101_1@toc@l(3) ; PC64LE9-NEXT: lfs 2, .LCPI101_1@toc@l(3)
; PC64LE9-NEXT: addis 3, 2, .LCPI101_2@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI101_2@toc@ha
; PC64LE9-NEXT: lfs 3, .LCPI101_2@toc@l(3) ; PC64LE9-NEXT: lfs 3, .LCPI101_2@toc@l(3)
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32( %result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %result ret <3 x double> %result
} }
define <4 x double> @constrained_vector_fpext_v4f32() nounwind { define <4 x double> @constrained_vector_fpext_v4f32() #0 {
; PC64LE-LABEL: constrained_vector_fpext_v4f32: ; PC64LE-LABEL: constrained_vector_fpext_v4f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI102_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI102_0@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI102_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI102_1@toc@ha
; PC64LE-NEXT: addis 5, 2, .LCPI102_2@toc@ha ; PC64LE-NEXT: addis 5, 2, .LCPI102_2@toc@ha
; PC64LE-NEXT: addis 6, 2, .LCPI102_3@toc@ha ; PC64LE-NEXT: addis 6, 2, .LCPI102_3@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI102_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI102_0@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI102_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI102_1@toc@l(4)
Show All 15 Lines
; PC64LE9-NEXT: addis 3, 2, .LCPI102_3@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI102_3@toc@ha
; PC64LE9-NEXT: lfs 1, .LCPI102_3@toc@l(3) ; PC64LE9-NEXT: lfs 1, .LCPI102_3@toc@l(3)
; PC64LE9-NEXT: xxmrghd 35, 1, 0 ; PC64LE9-NEXT: xxmrghd 35, 1, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <4 x double> %result ret <4 x double> %result
} }
define <1 x float> @constrained_vector_ceil_v1f32() nounwind { define <1 x float> @constrained_vector_ceil_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_ceil_v1f32: ; PC64LE-LABEL: constrained_vector_ceil_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI103_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI103_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI103_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI103_0@toc@l(3)
; PC64LE-NEXT: frip 0, 0 ; PC64LE-NEXT: frip 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_ceil_v1f32: ; PC64LE9-LABEL: constrained_vector_ceil_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI103_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI103_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI103_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI103_0@toc@l(3)
; PC64LE9-NEXT: frip 0, 0 ; PC64LE9-NEXT: frip 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32( %ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %ceil ret <1 x float> %ceil
} }
define <2 x double> @constrained_vector_ceil_v2f64() nounwind { define <2 x double> @constrained_vector_ceil_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_ceil_v2f64: ; PC64LE-LABEL: constrained_vector_ceil_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI104_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI104_0@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI104_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI104_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
; PC64LE-NEXT: xvrdpip 34, 0 ; PC64LE-NEXT: xvrdpip 34, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_ceil_v2f64: ; PC64LE9-LABEL: constrained_vector_ceil_v2f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI104_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI104_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI104_0@toc@l ; PC64LE9-NEXT: addi 3, 3, .LCPI104_0@toc@l
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvrdpip 34, 0 ; PC64LE9-NEXT: xvrdpip 34, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64( %ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %ceil ret <2 x double> %ceil
} }
define <3 x float> @constrained_vector_ceil_v3f32() nounwind { define <3 x float> @constrained_vector_ceil_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_ceil_v3f32: ; PC64LE-LABEL: constrained_vector_ceil_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI105_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI105_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI105_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI105_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI105_2@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI105_2@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI105_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI105_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI105_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI105_0@toc@ha
; PC64LE-NEXT: frip 0, 0 ; PC64LE-NEXT: frip 0, 0
Show All 35 Lines
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: lxvx 35, 0, 3 ; PC64LE9-NEXT: lxvx 35, 0, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32( %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %ceil ret <3 x float> %ceil
} }
define <3 x double> @constrained_vector_ceil_v3f64() nounwind { define <3 x double> @constrained_vector_ceil_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_ceil_v3f64: ; PC64LE-LABEL: constrained_vector_ceil_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI106_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI106_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI106_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI106_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addis 3, 2, .LCPI106_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI106_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI106_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI106_0@toc@l(3)
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
Show All 16 Lines
; PC64LE9-NEXT: xxswapd 1, 2 ; PC64LE9-NEXT: xxswapd 1, 2
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64( %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %ceil ret <3 x double> %ceil
} }
define <1 x float> @constrained_vector_floor_v1f32() nounwind { define <1 x float> @constrained_vector_floor_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_floor_v1f32: ; PC64LE-LABEL: constrained_vector_floor_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI107_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI107_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI107_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI107_0@toc@l(3)
; PC64LE-NEXT: frim 0, 0 ; PC64LE-NEXT: frim 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_floor_v1f32: ; PC64LE9-LABEL: constrained_vector_floor_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI107_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI107_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI107_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI107_0@toc@l(3)
; PC64LE9-NEXT: frim 0, 0 ; PC64LE9-NEXT: frim 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32( %floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %floor ret <1 x float> %floor
} }
define <2 x double> @constrained_vector_floor_v2f64() nounwind { define <2 x double> @constrained_vector_floor_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_floor_v2f64: ; PC64LE-LABEL: constrained_vector_floor_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI108_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI108_0@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI108_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI108_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
; PC64LE-NEXT: xvrdpim 34, 0 ; PC64LE-NEXT: xvrdpim 34, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_floor_v2f64: ; PC64LE9-LABEL: constrained_vector_floor_v2f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI108_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI108_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI108_0@toc@l ; PC64LE9-NEXT: addi 3, 3, .LCPI108_0@toc@l
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvrdpim 34, 0 ; PC64LE9-NEXT: xvrdpim 34, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64( %floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %floor ret <2 x double> %floor
} }
define <3 x float> @constrained_vector_floor_v3f32() nounwind { define <3 x float> @constrained_vector_floor_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_floor_v3f32: ; PC64LE-LABEL: constrained_vector_floor_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI109_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI109_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI109_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI109_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI109_2@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI109_2@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI109_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI109_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI109_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI109_0@toc@ha
; PC64LE-NEXT: frim 0, 0 ; PC64LE-NEXT: frim 0, 0
Show All 35 Lines
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: lxvx 35, 0, 3 ; PC64LE9-NEXT: lxvx 35, 0, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32( %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %floor ret <3 x float> %floor
} }
define <3 x double> @constrained_vector_floor_v3f64() nounwind { define <3 x double> @constrained_vector_floor_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_floor_v3f64: ; PC64LE-LABEL: constrained_vector_floor_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI110_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI110_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI110_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI110_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addis 3, 2, .LCPI110_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI110_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI110_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI110_0@toc@l(3)
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
Show All 16 Lines
; PC64LE9-NEXT: xxswapd 1, 2 ; PC64LE9-NEXT: xxswapd 1, 2
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64( %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %floor ret <3 x double> %floor
} }
define <1 x float> @constrained_vector_round_v1f32() nounwind { define <1 x float> @constrained_vector_round_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_round_v1f32: ; PC64LE-LABEL: constrained_vector_round_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI111_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI111_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI111_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI111_0@toc@l(3)
; PC64LE-NEXT: frin 0, 0 ; PC64LE-NEXT: frin 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_round_v1f32: ; PC64LE9-LABEL: constrained_vector_round_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI111_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI111_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI111_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI111_0@toc@l(3)
; PC64LE9-NEXT: frin 0, 0 ; PC64LE9-NEXT: frin 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%round = call <1 x float> @llvm.experimental.constrained.round.v1f32( %round = call <1 x float> @llvm.experimental.constrained.round.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %round ret <1 x float> %round
} }
define <2 x double> @constrained_vector_round_v2f64() nounwind { define <2 x double> @constrained_vector_round_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_round_v2f64: ; PC64LE-LABEL: constrained_vector_round_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI112_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI112_0@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI112_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI112_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
; PC64LE-NEXT: xvrdpi 34, 0 ; PC64LE-NEXT: xvrdpi 34, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_round_v2f64: ; PC64LE9-LABEL: constrained_vector_round_v2f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI112_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI112_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI112_0@toc@l ; PC64LE9-NEXT: addi 3, 3, .LCPI112_0@toc@l
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvrdpi 34, 0 ; PC64LE9-NEXT: xvrdpi 34, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%round = call <2 x double> @llvm.experimental.constrained.round.v2f64( %round = call <2 x double> @llvm.experimental.constrained.round.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %round ret <2 x double> %round
} }
define <3 x float> @constrained_vector_round_v3f32() nounwind { define <3 x float> @constrained_vector_round_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_round_v3f32: ; PC64LE-LABEL: constrained_vector_round_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI113_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI113_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI113_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI113_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI113_2@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI113_2@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI113_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI113_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI113_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI113_0@toc@ha
; PC64LE-NEXT: frin 0, 0 ; PC64LE-NEXT: frin 0, 0
Show All 35 Lines
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: lxvx 35, 0, 3 ; PC64LE9-NEXT: lxvx 35, 0, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%round = call <3 x float> @llvm.experimental.constrained.round.v3f32( %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %round ret <3 x float> %round
} }
define <3 x double> @constrained_vector_round_v3f64() nounwind { define <3 x double> @constrained_vector_round_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_round_v3f64: ; PC64LE-LABEL: constrained_vector_round_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI114_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI114_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI114_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI114_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addis 3, 2, .LCPI114_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI114_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI114_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI114_0@toc@l(3)
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
Show All 16 Lines
; PC64LE9-NEXT: xxswapd 1, 2 ; PC64LE9-NEXT: xxswapd 1, 2
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%round = call <3 x double> @llvm.experimental.constrained.round.v3f64( %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %round ret <3 x double> %round
} }
define <1 x float> @constrained_vector_trunc_v1f32() nounwind { define <1 x float> @constrained_vector_trunc_v1f32() #0 {
; PC64LE-LABEL: constrained_vector_trunc_v1f32: ; PC64LE-LABEL: constrained_vector_trunc_v1f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI115_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI115_0@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI115_0@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI115_0@toc@l(3)
; PC64LE-NEXT: friz 0, 0 ; PC64LE-NEXT: friz 0, 0
; PC64LE-NEXT: xscvdpspn 0, 0 ; PC64LE-NEXT: xscvdpspn 0, 0
; PC64LE-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_trunc_v1f32: ; PC64LE9-LABEL: constrained_vector_trunc_v1f32:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI115_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI115_0@toc@ha
; PC64LE9-NEXT: lfs 0, .LCPI115_0@toc@l(3) ; PC64LE9-NEXT: lfs 0, .LCPI115_0@toc@l(3)
; PC64LE9-NEXT: friz 0, 0 ; PC64LE9-NEXT: friz 0, 0
; PC64LE9-NEXT: xscvdpspn 0, 0 ; PC64LE9-NEXT: xscvdpspn 0, 0
; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1 ; PC64LE9-NEXT: xxsldwi 34, 0, 0, 1
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32( %trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <1 x float> %trunc ret <1 x float> %trunc
} }
define <2 x double> @constrained_vector_trunc_v2f64() nounwind { define <2 x double> @constrained_vector_trunc_v2f64() #0 {
; PC64LE-LABEL: constrained_vector_trunc_v2f64: ; PC64LE-LABEL: constrained_vector_trunc_v2f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI116_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI116_0@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI116_0@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI116_0@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
; PC64LE-NEXT: xvrdpiz 34, 0 ; PC64LE-NEXT: xvrdpiz 34, 0
; PC64LE-NEXT: blr ; PC64LE-NEXT: blr
; ;
; PC64LE9-LABEL: constrained_vector_trunc_v2f64: ; PC64LE9-LABEL: constrained_vector_trunc_v2f64:
; PC64LE9: # %bb.0: # %entry ; PC64LE9: # %bb.0: # %entry
; PC64LE9-NEXT: addis 3, 2, .LCPI116_0@toc@ha ; PC64LE9-NEXT: addis 3, 2, .LCPI116_0@toc@ha
; PC64LE9-NEXT: addi 3, 3, .LCPI116_0@toc@l ; PC64LE9-NEXT: addi 3, 3, .LCPI116_0@toc@l
; PC64LE9-NEXT: lxvx 0, 0, 3 ; PC64LE9-NEXT: lxvx 0, 0, 3
; PC64LE9-NEXT: xvrdpiz 34, 0 ; PC64LE9-NEXT: xvrdpiz 34, 0
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64( %trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <2 x double> %trunc ret <2 x double> %trunc
} }
define <3 x float> @constrained_vector_trunc_v3f32() nounwind { define <3 x float> @constrained_vector_trunc_v3f32() #0 {
; PC64LE-LABEL: constrained_vector_trunc_v3f32: ; PC64LE-LABEL: constrained_vector_trunc_v3f32:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI117_2@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI117_2@toc@ha
; PC64LE-NEXT: addis 4, 2, .LCPI117_1@toc@ha ; PC64LE-NEXT: addis 4, 2, .LCPI117_1@toc@ha
; PC64LE-NEXT: lfs 0, .LCPI117_2@toc@l(3) ; PC64LE-NEXT: lfs 0, .LCPI117_2@toc@l(3)
; PC64LE-NEXT: lfs 1, .LCPI117_1@toc@l(4) ; PC64LE-NEXT: lfs 1, .LCPI117_1@toc@l(4)
; PC64LE-NEXT: addis 3, 2, .LCPI117_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI117_0@toc@ha
; PC64LE-NEXT: friz 0, 0 ; PC64LE-NEXT: friz 0, 0
Show All 35 Lines
; PC64LE9-NEXT: vmrglw 2, 3, 2 ; PC64LE9-NEXT: vmrglw 2, 3, 2
; PC64LE9-NEXT: lxvx 35, 0, 3 ; PC64LE9-NEXT: lxvx 35, 0, 3
; PC64LE9-NEXT: vperm 2, 4, 2, 3 ; PC64LE9-NEXT: vperm 2, 4, 2, 3
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32( %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x float> %trunc ret <3 x float> %trunc
} }
define <3 x double> @constrained_vector_trunc_v3f64() nounwind { define <3 x double> @constrained_vector_trunc_v3f64() #0 {
; PC64LE-LABEL: constrained_vector_trunc_v3f64: ; PC64LE-LABEL: constrained_vector_trunc_v3f64:
; PC64LE: # %bb.0: # %entry ; PC64LE: # %bb.0: # %entry
; PC64LE-NEXT: addis 3, 2, .LCPI118_1@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI118_1@toc@ha
; PC64LE-NEXT: addi 3, 3, .LCPI118_1@toc@l ; PC64LE-NEXT: addi 3, 3, .LCPI118_1@toc@l
; PC64LE-NEXT: lxvd2x 0, 0, 3 ; PC64LE-NEXT: lxvd2x 0, 0, 3
; PC64LE-NEXT: addis 3, 2, .LCPI118_0@toc@ha ; PC64LE-NEXT: addis 3, 2, .LCPI118_0@toc@ha
; PC64LE-NEXT: lfs 1, .LCPI118_0@toc@l(3) ; PC64LE-NEXT: lfs 1, .LCPI118_0@toc@l(3)
; PC64LE-NEXT: xxswapd 0, 0 ; PC64LE-NEXT: xxswapd 0, 0
Show All 16 Lines
; PC64LE9-NEXT: xxswapd 1, 2 ; PC64LE9-NEXT: xxswapd 1, 2
; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1 ; PC64LE9-NEXT: # kill: def $f1 killed $f1 killed $vsl1
; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2 ; PC64LE9-NEXT: # kill: def $f2 killed $f2 killed $vsl2
; PC64LE9-NEXT: blr ; PC64LE9-NEXT: blr
entry: entry:
%trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64( %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #1
ret <3 x double> %trunc ret <3 x double> %trunc
} }
attributes #0 = { nounwind strictfp noimplicitfloat }
attributes #1 = { strictfp }
; Single width declarations ; Single width declarations
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
▲ Show 20 Lines • Show All 123 Lines • Show Last 20 Lines

llvm/test/CodeGen/SystemZ/fp-strict-add-01.ll

; Test 32-bit floating-point strict addition. ; Test 32-bit floating-point strict addition.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @foo() declare float @foo()
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
; Check register addition. ; Check register addition.
define float @f1(float %f1, float %f2) { define float @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: aebr %f0, %f2 ; CHECK: aebr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the low end of the AEB range. ; Check the low end of the AEB range.
define float @f2(float %f1, float *%ptr) { define float @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: aeb %f0, 0(%r2) ; CHECK: aeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the high end of the aligned AEB range. ; Check the high end of the aligned AEB range.
define float @f3(float %f1, float *%base) { define float @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: aeb %f0, 4092(%r2) ; CHECK: aeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define float @f4(float %f1, float *%base) { define float @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: aeb %f0, 0(%r2) ; CHECK: aeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define float @f5(float %f1, float *%base) { define float @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: aeb %f0, 0(%r2) ; CHECK: aeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that AEB allows indices. ; Check that AEB allows indices.
define float @f6(float %f1, float *%base, i64 %index) { define float @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: aeb %f0, 400(%r1,%r2) ; CHECK: aeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that additions of spilled values can use AEB rather than AEBR. ; Check that additions of spilled values can use AEB rather than AEBR.
define float @f7(float *%ptr0) { define float @f7(float *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: aeb %f0, 16{{[04]}}(%r15) ; CHECK-SCALAR: aeb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%ptr0, i64 2 %ptr1 = getelementptr float, float *%ptr0, i64 2
%ptr2 = getelementptr float, float *%ptr0, i64 4 %ptr2 = getelementptr float, float *%ptr0, i64 4
%ptr3 = getelementptr float, float *%ptr0, i64 6 %ptr3 = getelementptr float, float *%ptr0, i64 6
%ptr4 = getelementptr float, float *%ptr0, i64 8 %ptr4 = getelementptr float, float *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load float, float *%ptr4 %val4 = load float, float *%ptr4
%val5 = load float, float *%ptr5 %val5 = load float, float *%ptr5
%val6 = load float, float *%ptr6 %val6 = load float, float *%ptr6
%val7 = load float, float *%ptr7 %val7 = load float, float *%ptr7
%val8 = load float, float *%ptr8 %val8 = load float, float *%ptr8
%val9 = load float, float *%ptr9 %val9 = load float, float *%ptr9
%val10 = load float, float *%ptr10 %val10 = load float, float *%ptr10
%ret = call float @foo() %ret = call float @foo() #0
%add0 = call float @llvm.experimental.constrained.fadd.f32( %add0 = call float @llvm.experimental.constrained.fadd.f32(
float %ret, float %val0, float %ret, float %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add1 = call float @llvm.experimental.constrained.fadd.f32( %add1 = call float @llvm.experimental.constrained.fadd.f32(
float %add0, float %val1, float %add0, float %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add2 = call float @llvm.experimental.constrained.fadd.f32( %add2 = call float @llvm.experimental.constrained.fadd.f32(
float %add1, float %val2, float %add1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add3 = call float @llvm.experimental.constrained.fadd.f32( %add3 = call float @llvm.experimental.constrained.fadd.f32(
float %add2, float %val3, float %add2, float %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add4 = call float @llvm.experimental.constrained.fadd.f32( %add4 = call float @llvm.experimental.constrained.fadd.f32(
float %add3, float %val4, float %add3, float %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add5 = call float @llvm.experimental.constrained.fadd.f32( %add5 = call float @llvm.experimental.constrained.fadd.f32(
float %add4, float %val5, float %add4, float %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add6 = call float @llvm.experimental.constrained.fadd.f32( %add6 = call float @llvm.experimental.constrained.fadd.f32(
float %add5, float %val6, float %add5, float %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add7 = call float @llvm.experimental.constrained.fadd.f32( %add7 = call float @llvm.experimental.constrained.fadd.f32(
float %add6, float %val7, float %add6, float %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add8 = call float @llvm.experimental.constrained.fadd.f32( %add8 = call float @llvm.experimental.constrained.fadd.f32(
float %add7, float %val8, float %add7, float %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add9 = call float @llvm.experimental.constrained.fadd.f32( %add9 = call float @llvm.experimental.constrained.fadd.f32(
float %add8, float %val9, float %add8, float %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add10 = call float @llvm.experimental.constrained.fadd.f32( %add10 = call float @llvm.experimental.constrained.fadd.f32(
float %add9, float %val10, float %add9, float %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %add10 ret float %add10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-add-02.ll

; Test strict 64-bit floating-point addition. ; Test strict 64-bit floating-point addition.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 -verify-machineinstrs | FileCheck %s
declare double @foo() declare double @foo()
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
; Check register addition. ; Check register addition.
define double @f1(double %f1, double %f2) { define double @f1(double %f1, double %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: adbr %f0, %f2 ; CHECK: adbr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the ADB range. ; Check the low end of the ADB range.
define double @f2(double %f1, double *%ptr) { define double @f2(double %f1, double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: adb %f0, 0(%r2) ; CHECK: adb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned ADB range. ; Check the high end of the aligned ADB range.
define double @f3(double %f1, double *%base) { define double @f3(double %f1, double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: adb %f0, 4088(%r2) ; CHECK: adb %f0, 4088(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(double %f1, double *%base) { define double @f4(double %f1, double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: adb %f0, 0(%r2) ; CHECK: adb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(double %f1, double *%base) { define double @f5(double %f1, double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: adb %f0, 0(%r2) ; CHECK: adb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that ADB allows indices. ; Check that ADB allows indices.
define double @f6(double %f1, double *%base, i64 %index) { define double @f6(double %f1, double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: adb %f0, 800(%r1,%r2) ; CHECK: adb %f0, 800(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that additions of spilled values can use ADB rather than ADBR. ; Check that additions of spilled values can use ADB rather than ADBR.
define double @f7(double *%ptr0) { define double @f7(double *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: adb %f0, 160(%r15) ; CHECK-SCALAR: adb %f0, 160(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%ptr0, i64 2 %ptr1 = getelementptr double, double *%ptr0, i64 2
%ptr2 = getelementptr double, double *%ptr0, i64 4 %ptr2 = getelementptr double, double *%ptr0, i64 4
%ptr3 = getelementptr double, double *%ptr0, i64 6 %ptr3 = getelementptr double, double *%ptr0, i64 6
%ptr4 = getelementptr double, double *%ptr0, i64 8 %ptr4 = getelementptr double, double *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load double, double *%ptr4 %val4 = load double, double *%ptr4
%val5 = load double, double *%ptr5 %val5 = load double, double *%ptr5
%val6 = load double, double *%ptr6 %val6 = load double, double *%ptr6
%val7 = load double, double *%ptr7 %val7 = load double, double *%ptr7
%val8 = load double, double *%ptr8 %val8 = load double, double *%ptr8
%val9 = load double, double *%ptr9 %val9 = load double, double *%ptr9
%val10 = load double, double *%ptr10 %val10 = load double, double *%ptr10
%ret = call double @foo() %ret = call double @foo() #0
%add0 = call double @llvm.experimental.constrained.fadd.f64( %add0 = call double @llvm.experimental.constrained.fadd.f64(
double %ret, double %val0, double %ret, double %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add1 = call double @llvm.experimental.constrained.fadd.f64( %add1 = call double @llvm.experimental.constrained.fadd.f64(
double %add0, double %val1, double %add0, double %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add2 = call double @llvm.experimental.constrained.fadd.f64( %add2 = call double @llvm.experimental.constrained.fadd.f64(
double %add1, double %val2, double %add1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add3 = call double @llvm.experimental.constrained.fadd.f64( %add3 = call double @llvm.experimental.constrained.fadd.f64(
double %add2, double %val3, double %add2, double %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add4 = call double @llvm.experimental.constrained.fadd.f64( %add4 = call double @llvm.experimental.constrained.fadd.f64(
double %add3, double %val4, double %add3, double %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add5 = call double @llvm.experimental.constrained.fadd.f64( %add5 = call double @llvm.experimental.constrained.fadd.f64(
double %add4, double %val5, double %add4, double %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add6 = call double @llvm.experimental.constrained.fadd.f64( %add6 = call double @llvm.experimental.constrained.fadd.f64(
double %add5, double %val6, double %add5, double %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add7 = call double @llvm.experimental.constrained.fadd.f64( %add7 = call double @llvm.experimental.constrained.fadd.f64(
double %add6, double %val7, double %add6, double %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add8 = call double @llvm.experimental.constrained.fadd.f64( %add8 = call double @llvm.experimental.constrained.fadd.f64(
double %add7, double %val8, double %add7, double %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add9 = call double @llvm.experimental.constrained.fadd.f64( %add9 = call double @llvm.experimental.constrained.fadd.f64(
double %add8, double %val9, double %add8, double %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%add10 = call double @llvm.experimental.constrained.fadd.f64( %add10 = call double @llvm.experimental.constrained.fadd.f64(
double %add9, double %val10, double %add9, double %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %add10 ret double %add10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-add-03.ll

; Test strict 128-bit floating-point addition. ; Test strict 128-bit floating-point addition.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)
; There is no memory form of 128-bit addition. ; There is no memory form of 128-bit addition.
define void @f1(fp128 *%ptr, float %f2) { define void @f1(fp128 *%ptr, float %f2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: lxebr %f0, %f0 ; CHECK-DAG: lxebr %f0, %f0
; CHECK-DAG: ld %f1, 0(%r2) ; CHECK-DAG: ld %f1, 0(%r2)
; CHECK-DAG: ld %f3, 8(%r2) ; CHECK-DAG: ld %f3, 8(%r2)
; CHECK: axbr %f0, %f1 ; CHECK: axbr %f0, %f1
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr %f1 = load fp128, fp128 *%ptr
%f2x = fpext float %f2 to fp128 %f2x = fpext float %f2 to fp128
%sum = call fp128 @llvm.experimental.constrained.fadd.f128( %sum = call fp128 @llvm.experimental.constrained.fadd.f128(
fp128 %f1, fp128 %f2x, fp128 %f1, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr store fp128 %sum, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-add-04.ll

; Test strict 128-bit floating-point addition on z14. ; Test strict 128-bit floating-point addition on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fadd.f128(fp128, fp128, metadata, metadata)
define void @f1(fp128 *%ptr1, fp128 *%ptr2) { define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfaxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]] ; CHECK: wfaxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr1 %f1 = load fp128, fp128 *%ptr1
%f2 = load fp128, fp128 *%ptr2 %f2 = load fp128, fp128 *%ptr2
%sum = call fp128 @llvm.experimental.constrained.fadd.f128( %sum = call fp128 @llvm.experimental.constrained.fadd.f128(
fp128 %f1, fp128 %f2, fp128 %f1, fp128 %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr1 store fp128 %sum, fp128 *%ptr1
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-alias.ll

Show All 24 Lines; CHECK: br %r14
%sqrt2 = call float @llvm.sqrt.f32(float %f2) %sqrt2 = call float @llvm.sqrt.f32(float %f2)
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f2(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f2(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f3(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f3(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
Show All 13 Lines; CHECK: br %r14
%sqrt2 = call float @llvm.sqrt.f32(float %f2) %sqrt2 = call float @llvm.sqrt.f32(float %f2)
store volatile float %sqrt1, float *%ptr1 store volatile float %sqrt1, float *%ptr1
store volatile float %sqrt2, float *%ptr2 store volatile float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f5(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f5(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
store volatile float %sqrt1, float *%ptr1 store volatile float %sqrt1, float *%ptr1
store volatile float %sqrt2, float *%ptr2 store volatile float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f6(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f6(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store volatile float %sqrt1, float *%ptr1 store volatile float %sqrt1, float *%ptr1
store volatile float %sqrt2, float *%ptr2 store volatile float %sqrt2, float *%ptr2
ret void ret void
} }
Show All 13 Lines; CHECK: br %r14
call void @llvm.s390.sfpc(i32 0) call void @llvm.s390.sfpc(i32 0)
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f8(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f8(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.ignore") metadata !"fpexcept.ignore") #0
call void @llvm.s390.sfpc(i32 0) call void @llvm.s390.sfpc(i32 0) #0
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
define void @f9(float %f1, float %f2, float *%ptr1, float *%ptr2) { define void @f9(float %f1, float %f2, float *%ptr1, float *%ptr2) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: sqebr ; CHECK: sqebr
; CHECK: sqebr ; CHECK: sqebr
; CHECK: ste ; CHECK: ste
; CHECK: ste ; CHECK: ste
; CHECK: br %r14 ; CHECK: br %r14
%sqrt1 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt1 = call float @llvm.experimental.constrained.sqrt.f32(
float %f1, float %f1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sqrt2 = call float @llvm.experimental.constrained.sqrt.f32( %sqrt2 = call float @llvm.experimental.constrained.sqrt.f32(
float %f2, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
call void @llvm.s390.sfpc(i32 0) call void @llvm.s390.sfpc(i32 0) #0
store float %sqrt1, float *%ptr1 store float %sqrt1, float *%ptr1
store float %sqrt2, float *%ptr2 store float %sqrt2, float *%ptr2
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-01.ll

; Test strict floating-point truncations. ; Test strict floating-point truncations.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata)
declare float @llvm.experimental.constrained.fptrunc.f32.f128(fp128, metadata, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f128(fp128, metadata, metadata)
declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata) declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata)
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
; Test f64->f32. ; Test f64->f32.
define float @f1(double %d1, double %d2) { define float @f1(double %d1, double %d2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-SCALAR: ledbr %f0, %f2 ; CHECK-SCALAR: ledbr %f0, %f2
; CHECK-VECTOR: ledbra %f0, 0, %f2, 0 ; CHECK-VECTOR: ledbra %f0, 0, %f2, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fptrunc.f32.f64( %res = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double %d2, double %d2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test f128->f32. ; Test f128->f32.
define float @f2(fp128 *%ptr) { define float @f2(fp128 *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: lexbr %f0, %f0 ; CHECK: lexbr %f0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%res = call float @llvm.experimental.constrained.fptrunc.f32.f128( %res = call float @llvm.experimental.constrained.fptrunc.f32.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Make sure that we don't use %f0 as the destination of LEXBR when %f2 ; Make sure that we don't use %f0 as the destination of LEXBR when %f2
; is still live. ; is still live.
define void @f3(float *%dst, fp128 *%ptr, float %d1, float %d2) { define void @f3(float *%dst, fp128 *%ptr, float %d1, float %d2) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: lexbr %f1, %f1 ; CHECK: lexbr %f1, %f1
; CHECK: aebr %f1, %f2 ; CHECK: aebr %f1, %f2
; CHECK: ste %f1, 0(%r2) ; CHECK: ste %f1, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%conv = call float @llvm.experimental.constrained.fptrunc.f32.f128( %conv = call float @llvm.experimental.constrained.fptrunc.f32.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%res = call float @llvm.experimental.constrained.fadd.f32( %res = call float @llvm.experimental.constrained.fadd.f32(
float %conv, float %d2, float %conv, float %d2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store float %res, float *%dst store float %res, float *%dst
ret void ret void
} }
; Test f128->f64. ; Test f128->f64.
define double @f4(fp128 *%ptr) { define double @f4(fp128 *%ptr) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: ldxbr %f0, %f0 ; CHECK: ldxbr %f0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%res = call double @llvm.experimental.constrained.fptrunc.f64.f128( %res = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Like f3, but for f128->f64. ; Like f3, but for f128->f64.
define void @f5(double *%dst, fp128 *%ptr, double %d1, double %d2) { define void @f5(double *%dst, fp128 *%ptr, double %d1, double %d2) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: ldxbr %f1, %f1 ; CHECK: ldxbr %f1, %f1
; CHECK-SCALAR: adbr %f1, %f2 ; CHECK-SCALAR: adbr %f1, %f2
; CHECK-SCALAR: std %f1, 0(%r2) ; CHECK-SCALAR: std %f1, 0(%r2)
; CHECK-VECTOR: wfadb [[REG:%f[0-9]+]], %f1, %f2 ; CHECK-VECTOR: wfadb [[REG:%f[0-9]+]], %f1, %f2
; CHECK-VECTOR: std [[REG]], 0(%r2) ; CHECK-VECTOR: std [[REG]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%conv = call double @llvm.experimental.constrained.fptrunc.f64.f128( %conv = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%res = call double @llvm.experimental.constrained.fadd.f64( %res = call double @llvm.experimental.constrained.fadd.f64(
double %conv, double %d2, double %conv, double %d2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store double %res, double *%dst store double %res, double *%dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-02.ll

; Test strict extensions of f32 to f64. ; Test strict extensions of f32 to f64.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata) declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata)
; Check register extension. ; Check register extension.
define double @f1(float %val) { define double @f1(float %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: ldebr %f0, %f0 ; CHECK: ldebr %f0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the LDEB range. ; Check the low end of the LDEB range.
define double @f2(float *%ptr) { define double @f2(float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: ldeb %f0, 0(%r2) ; CHECK: ldeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned LDEB range. ; Check the high end of the aligned LDEB range.
define double @f3(float *%base) { define double @f3(float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: ldeb %f0, 4092(%r2) ; CHECK: ldeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(float *%base) { define double @f4(float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: ldeb %f0, 0(%r2) ; CHECK: ldeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(float *%base) { define double @f5(float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: ldeb %f0, 0(%r2) ; CHECK: ldeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that LDEB allows indices. ; Check that LDEB allows indices.
define double @f6(float *%base, i64 %index) { define double @f6(float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: ldeb %f0, 400(%r1,%r2) ; CHECK: ldeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%val = load float, float *%ptr2 %val = load float, float *%ptr2
%res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val, %res = call double @llvm.experimental.constrained.fpext.f64.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-03.ll

; Test strict extensions of f32 to f128. ; Test strict extensions of f32 to f128.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fpext.f128.f32(float, metadata) declare fp128 @llvm.experimental.constrained.fpext.f128.f32(float, metadata)
; Check register extension. ; Check register extension.
define void @f1(fp128 *%dst, float %val) { define void @f1(fp128 *%dst, float %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: lxebr %f0, %f0 ; CHECK: lxebr %f0, %f0
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the low end of the LXEB range. ; Check the low end of the LXEB range.
define void @f2(fp128 *%dst, float *%ptr) { define void @f2(fp128 *%dst, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: lxeb %f0, 0(%r3) ; CHECK: lxeb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the high end of the aligned LXEB range. ; Check the high end of the aligned LXEB range.
define void @f3(fp128 *%dst, float *%base) { define void @f3(fp128 *%dst, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: lxeb %f0, 4092(%r3) ; CHECK: lxeb %f0, 4092(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define void @f4(fp128 *%dst, float *%base) { define void @f4(fp128 *%dst, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r3, 4096 ; CHECK: aghi %r3, 4096
; CHECK: lxeb %f0, 0(%r3) ; CHECK: lxeb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define void @f5(fp128 *%dst, float *%base) { define void @f5(fp128 *%dst, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r3, -4 ; CHECK: aghi %r3, -4
; CHECK: lxeb %f0, 0(%r3) ; CHECK: lxeb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check that LXEB allows indices. ; Check that LXEB allows indices.
define void @f6(fp128 *%dst, float *%base, i64 %index) { define void @f6(fp128 *%dst, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r4, 2 ; CHECK: sllg %r1, %r4, 2
; CHECK: lxeb %f0, 400(%r1,%r3) ; CHECK: lxeb %f0, 400(%r1,%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%val = load float, float *%ptr2 %val = load float, float *%ptr2
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-04.ll

; Test strict extensions of f64 to f128. ; Test strict extensions of f64 to f128.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata) declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata)
; Check register extension. ; Check register extension.
define void @f1(fp128 *%dst, double %val) { define void @f1(fp128 *%dst, double %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: lxdbr %f0, %f0 ; CHECK: lxdbr %f0, %f0
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the low end of the LXDB range. ; Check the low end of the LXDB range.
define void @f2(fp128 *%dst, double *%ptr) { define void @f2(fp128 *%dst, double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: lxdb %f0, 0(%r3) ; CHECK: lxdb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the high end of the aligned LXDB range. ; Check the high end of the aligned LXDB range.
define void @f3(fp128 *%dst, double *%base) { define void @f3(fp128 *%dst, double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: lxdb %f0, 4088(%r3) ; CHECK: lxdb %f0, 4088(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define void @f4(fp128 *%dst, double *%base) { define void @f4(fp128 *%dst, double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r3, 4096 ; CHECK: aghi %r3, 4096
; CHECK: lxdb %f0, 0(%r3) ; CHECK: lxdb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define void @f5(fp128 *%dst, double *%base) { define void @f5(fp128 *%dst, double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r3, -8 ; CHECK: aghi %r3, -8
; CHECK: lxdb %f0, 0(%r3) ; CHECK: lxdb %f0, 0(%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check that LXDB allows indices. ; Check that LXDB allows indices.
define void @f6(fp128 *%dst, double *%base, i64 %index) { define void @f6(fp128 *%dst, double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r4, 3 ; CHECK: sllg %r1, %r4, 3
; CHECK: lxdb %f0, 800(%r1,%r3) ; CHECK: lxdb %f0, 800(%r1,%r3)
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%val = load double, double *%ptr2 %val = load double, double *%ptr2
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-09.ll

; Test strict conversion of floating-point values to signed i32s. ; Test strict conversion of floating-point values to signed i32s.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f32(float, metadata)
declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata)
declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata)
; Test f32->i32. ; Test f32->i32.
define i32 @f1(float %f) { define i32 @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: cfebr %r2, 5, %f0 ; CHECK: cfebr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %f, %conv = call i32 @llvm.experimental.constrained.fptosi.i32.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f64->i32. ; Test f64->i32.
define i32 @f2(double %f) { define i32 @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: cfdbr %r2, 5, %f0 ; CHECK: cfdbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double %f, %conv = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f128->i32. ; Test f128->i32.
define i32 @f3(fp128 *%src) { define i32 @f3(fp128 *%src) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: ld %f0, 0(%r2) ; CHECK: ld %f0, 0(%r2)
; CHECK: ld %f2, 8(%r2) ; CHECK: ld %f2, 8(%r2)
; CHECK: cfxbr %r2, 5, %f0 ; CHECK: cfxbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128 %f, %conv = call i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-10.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test strict conversion of floating-point values to unsigned i32s (z10 only). ; Test strict conversion of floating-point values to unsigned i32s (z10 only).
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; z10 doesn't have native support for unsigned fp-to-i32 conversions; ; z10 doesn't have native support for unsigned fp-to-i32 conversions;
; they were added in z196 as the Convert to Logical family of instructions. ; they were added in z196 as the Convert to Logical family of instructions.
; Promoting to i64 doesn't generate an inexact condition for values that are ; Promoting to i64 doesn't generate an inexact condition for values that are
; outside the i32 range but in the i64 range, so use the default expansion. ; outside the i32 range but in the i64 range, so use the default expansion.
; Note that the strict expansion sequence must be used. ; Note that the strict expansion sequence must be used.
declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata)
; Test f32->i32. ; Test f32->i32.
define i32 @f1(float %f) { define i32 @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: larl %r1, .LCPI0_0 ; CHECK-NEXT: larl %r1, .LCPI0_0
; CHECK-NEXT: le %f1, 0(%r1) ; CHECK-NEXT: le %f1, 0(%r1)
; CHECK-NEXT: cebr %f0, %f1 ; CHECK-NEXT: cebr %f0, %f1
; CHECK-NEXT: lhi %r0, 0 ; CHECK-NEXT: lhi %r0, 0
; CHECK-NEXT: jl .LBB0_2 ; CHECK-NEXT: jl .LBB0_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sebr %f0, %f1 ; CHECK-NEXT: sebr %f0, %f1
; CHECK-NEXT: llilh %r0, 32768 ; CHECK-NEXT: llilh %r0, 32768
; CHECK-NEXT: .LBB0_2: ; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: cfebr %r2, 5, %f0 ; CHECK-NEXT: cfebr %r2, 5, %f0
; CHECK-NEXT: xr %r2, %r0 ; CHECK-NEXT: xr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f64->i32. ; Test f64->i32.
define i32 @f2(double %f) { define i32 @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: larl %r1, .LCPI1_0 ; CHECK-NEXT: larl %r1, .LCPI1_0
; CHECK-NEXT: ldeb %f1, 0(%r1) ; CHECK-NEXT: ldeb %f1, 0(%r1)
; CHECK-NEXT: cdbr %f0, %f1 ; CHECK-NEXT: cdbr %f0, %f1
; CHECK-NEXT: lhi %r0, 0 ; CHECK-NEXT: lhi %r0, 0
; CHECK-NEXT: jl .LBB1_2 ; CHECK-NEXT: jl .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sdbr %f0, %f1 ; CHECK-NEXT: sdbr %f0, %f1
; CHECK-NEXT: llilh %r0, 32768 ; CHECK-NEXT: llilh %r0, 32768
; CHECK-NEXT: .LBB1_2: ; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: cfdbr %r2, 5, %f0 ; CHECK-NEXT: cfdbr %r2, 5, %f0
; CHECK-NEXT: xr %r2, %r0 ; CHECK-NEXT: xr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f128->i32. ; Test f128->i32.
define i32 @f3(fp128 *%src) { define i32 @f3(fp128 *%src) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: ld %f0, 0(%r2) ; CHECK-NEXT: ld %f0, 0(%r2)
; CHECK-NEXT: ld %f2, 8(%r2) ; CHECK-NEXT: ld %f2, 8(%r2)
; CHECK-NEXT: larl %r1, .LCPI2_0 ; CHECK-NEXT: larl %r1, .LCPI2_0
; CHECK-NEXT: lxeb %f1, 0(%r1) ; CHECK-NEXT: lxeb %f1, 0(%r1)
; CHECK-NEXT: cxbr %f0, %f1 ; CHECK-NEXT: cxbr %f0, %f1
; CHECK-NEXT: lhi %r0, 0 ; CHECK-NEXT: lhi %r0, 0
; CHECK-NEXT: jl .LBB2_2 ; CHECK-NEXT: jl .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sxbr %f0, %f1 ; CHECK-NEXT: sxbr %f0, %f1
; CHECK-NEXT: llilh %r0, 32768 ; CHECK-NEXT: llilh %r0, 32768
; CHECK-NEXT: .LBB2_2: ; CHECK-NEXT: .LBB2_2:
; CHECK-NEXT: cfxbr %r2, 5, %f0 ; CHECK-NEXT: cfxbr %r2, 5, %f0
; CHECK-NEXT: xr %r2, %r0 ; CHECK-NEXT: xr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-11.ll

; Test strict conversion of floating-point values to signed i64s. ; Test strict conversion of floating-point values to signed i64s.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare i64 @llvm.experimental.constrained.fptosi.i64.f32(float, metadata) declare i64 @llvm.experimental.constrained.fptosi.i64.f32(float, metadata)
declare i64 @llvm.experimental.constrained.fptosi.i64.f64(double, metadata) declare i64 @llvm.experimental.constrained.fptosi.i64.f64(double, metadata)
declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata)
; Test f32->i64. ; Test f32->i64.
define i64 @f1(float %f) { define i64 @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: cgebr %r2, 5, %f0 ; CHECK: cgebr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i64 @llvm.experimental.constrained.fptosi.i64.f32(float %f, %conv = call i64 @llvm.experimental.constrained.fptosi.i64.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f64->i64. ; Test f64->i64.
define i64 @f2(double %f) { define i64 @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: cgdbr %r2, 5, %f0 ; CHECK: cgdbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i64 @llvm.experimental.constrained.fptosi.i64.f64(double %f, %conv = call i64 @llvm.experimental.constrained.fptosi.i64.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f128->i64. ; Test f128->i64.
define i64 @f3(fp128 *%src) { define i64 @f3(fp128 *%src) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: ld %f0, 0(%r2) ; CHECK: ld %f0, 0(%r2)
; CHECK: ld %f2, 8(%r2) ; CHECK: ld %f2, 8(%r2)
; CHECK: cgxbr %r2, 5, %f0 ; CHECK: cgxbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128 %f, %conv = call i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-12.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; Test strict conversion of floating-point values to unsigned i64s (z10 only). ; Test strict conversion of floating-point values to unsigned i64s (z10 only).
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; z10 doesn't have native support for unsigned fp-to-i64 conversions; ; z10 doesn't have native support for unsigned fp-to-i64 conversions;
; they were added in z196 as the Convert to Logical family of instructions. ; they were added in z196 as the Convert to Logical family of instructions.
; Convert via signed i64s instead. ; Convert via signed i64s instead.
; Note that the strict expansion sequence must be used. ; Note that the strict expansion sequence must be used.
declare i64 @llvm.experimental.constrained.fptoui.i64.f32(float, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f32(float, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
; Test f32->i64. ; Test f32->i64.
define i64 @f1(float %f) { define i64 @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: larl %r1, .LCPI0_0 ; CHECK-NEXT: larl %r1, .LCPI0_0
; CHECK-NEXT: le %f1, 0(%r1) ; CHECK-NEXT: le %f1, 0(%r1)
; CHECK-NEXT: cebr %f0, %f1 ; CHECK-NEXT: cebr %f0, %f1
; CHECK-NEXT: lghi %r0, 0 ; CHECK-NEXT: lghi %r0, 0
; CHECK-NEXT: jl .LBB0_2 ; CHECK-NEXT: jl .LBB0_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sebr %f0, %f1 ; CHECK-NEXT: sebr %f0, %f1
; CHECK-NEXT: llihh %r0, 32768 ; CHECK-NEXT: llihh %r0, 32768
; CHECK-NEXT: .LBB0_2: ; CHECK-NEXT: .LBB0_2:
; CHECK-NEXT: cgebr %r2, 5, %f0 ; CHECK-NEXT: cgebr %r2, 5, %f0
; CHECK-NEXT: xgr %r2, %r0 ; CHECK-NEXT: xgr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f32(float %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f64->i64. ; Test f64->i64.
define i64 @f2(double %f) { define i64 @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: larl %r1, .LCPI1_0 ; CHECK-NEXT: larl %r1, .LCPI1_0
; CHECK-NEXT: ldeb %f1, 0(%r1) ; CHECK-NEXT: ldeb %f1, 0(%r1)
; CHECK-NEXT: cdbr %f0, %f1 ; CHECK-NEXT: cdbr %f0, %f1
; CHECK-NEXT: lghi %r0, 0 ; CHECK-NEXT: lghi %r0, 0
; CHECK-NEXT: jl .LBB1_2 ; CHECK-NEXT: jl .LBB1_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sdbr %f0, %f1 ; CHECK-NEXT: sdbr %f0, %f1
; CHECK-NEXT: llihh %r0, 32768 ; CHECK-NEXT: llihh %r0, 32768
; CHECK-NEXT: .LBB1_2: ; CHECK-NEXT: .LBB1_2:
; CHECK-NEXT: cgdbr %r2, 5, %f0 ; CHECK-NEXT: cgdbr %r2, 5, %f0
; CHECK-NEXT: xgr %r2, %r0 ; CHECK-NEXT: xgr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f128->i64. ; Test f128->i64.
define i64 @f3(fp128 *%src) { define i64 @f3(fp128 *%src) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: ld %f0, 0(%r2) ; CHECK-NEXT: ld %f0, 0(%r2)
; CHECK-NEXT: ld %f2, 8(%r2) ; CHECK-NEXT: ld %f2, 8(%r2)
; CHECK-NEXT: larl %r1, .LCPI2_0 ; CHECK-NEXT: larl %r1, .LCPI2_0
; CHECK-NEXT: lxeb %f1, 0(%r1) ; CHECK-NEXT: lxeb %f1, 0(%r1)
; CHECK-NEXT: cxbr %f0, %f1 ; CHECK-NEXT: cxbr %f0, %f1
; CHECK-NEXT: lghi %r0, 0 ; CHECK-NEXT: lghi %r0, 0
; CHECK-NEXT: jl .LBB2_2 ; CHECK-NEXT: jl .LBB2_2
; CHECK-NEXT: # %bb.1: ; CHECK-NEXT: # %bb.1:
; CHECK-NEXT: sxbr %f0, %f1 ; CHECK-NEXT: sxbr %f0, %f1
; CHECK-NEXT: llihh %r0, 32768 ; CHECK-NEXT: llihh %r0, 32768
; CHECK-NEXT: .LBB2_2: ; CHECK-NEXT: .LBB2_2:
; CHECK-NEXT: cgxbr %r2, 5, %f0 ; CHECK-NEXT: cgxbr %r2, 5, %f0
; CHECK-NEXT: xgr %r2, %r0 ; CHECK-NEXT: xgr %r2, %r0
; CHECK-NEXT: br %r14 ; CHECK-NEXT: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-14.ll

; Test strict conversion of floating-point values to unsigned integers. ; Test strict conversion of floating-point values to unsigned integers.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f32(float, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f32(float, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f32(float, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
; Test f32->i32. ; Test f32->i32.
define i32 @f1(float %f) { define i32 @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: clfebr %r2, 5, %f0, 0 ; CHECK: clfebr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f64->i32. ; Test f64->i32.
define i32 @f2(double %f) { define i32 @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: clfdbr %r2, 5, %f0, 0 ; CHECK: clfdbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f128->i32. ; Test f128->i32.
define i32 @f3(fp128 *%src) { define i32 @f3(fp128 *%src) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK-DAG: ld %f0, 0(%r2) ; CHECK-DAG: ld %f0, 0(%r2)
; CHECK-DAG: ld %f2, 8(%r2) ; CHECK-DAG: ld %f2, 8(%r2)
; CHECK: clfxbr %r2, 5, %f0, 0 ; CHECK: clfxbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test f32->i64. ; Test f32->i64.
define i64 @f4(float %f) { define i64 @f4(float %f) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: clgebr %r2, 5, %f0, 0 ; CHECK: clgebr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f32(float %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f32(float %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f64->i64. ; Test f64->i64.
define i64 @f5(double %f) { define i64 @f5(double %f) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: clgdbr %r2, 5, %f0, 0 ; CHECK: clgdbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test f128->i64. ; Test f128->i64.
define i64 @f6(fp128 *%src) { define i64 @f6(fp128 *%src) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK-DAG: ld %f0, 0(%r2) ; CHECK-DAG: ld %f0, 0(%r2)
; CHECK-DAG: ld %f2, 8(%r2) ; CHECK-DAG: ld %f2, 8(%r2)
; CHECK: clgxbr %r2, 5, %f0, 0 ; CHECK: clgxbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-15.ll

; Test f128 floating-point strict truncations/extensions on z14. ; Test f128 floating-point strict truncations/extensions on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.fptrunc.f32.f128(fp128, metadata, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f128(fp128, metadata, metadata)
declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata) declare double @llvm.experimental.constrained.fptrunc.f64.f128(fp128, metadata, metadata)
declare fp128 @llvm.experimental.constrained.fpext.f128.f32(float, metadata) declare fp128 @llvm.experimental.constrained.fpext.f128.f32(float, metadata)
declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata) declare fp128 @llvm.experimental.constrained.fpext.f128.f64(double, metadata)
; Test f128->f64. ; Test f128->f64.
define double @f1(fp128 *%ptr) { define double @f1(fp128 *%ptr) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wflrx %f0, [[REG]], 0, 0 ; CHECK: wflrx %f0, [[REG]], 0, 0
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%res = call double @llvm.experimental.constrained.fptrunc.f64.f128( %res = call double @llvm.experimental.constrained.fptrunc.f64.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test f128->f32. ; Test f128->f32.
define float @f2(fp128 *%ptr) { define float @f2(fp128 *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wflrx %f0, [[REG]], 0, 3 ; CHECK: wflrx %f0, [[REG]], 0, 3
; CHECK: ledbra %f0, 0, %f0, 0 ; CHECK: ledbra %f0, 0, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%val = load fp128, fp128 *%ptr %val = load fp128, fp128 *%ptr
%res = call float @llvm.experimental.constrained.fptrunc.f32.f128( %res = call float @llvm.experimental.constrained.fptrunc.f32.f128(
fp128 %val, fp128 %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test f64->f128. ; Test f64->f128.
define void @f3(fp128 *%dst, double %val) { define void @f3(fp128 *%dst, double %val) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: wflld [[RES:%v[0-9]+]], %f0 ; CHECK: wflld [[RES:%v[0-9]+]], %f0
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f64(double %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Test f32->f128. ; Test f32->f128.
define void @f4(fp128 *%dst, float %val) { define void @f4(fp128 *%dst, float %val) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: ldebr %f0, %f0 ; CHECK: ldebr %f0, %f0
; CHECK: wflld [[RES:%v[0-9]+]], %f0 ; CHECK: wflld [[RES:%v[0-9]+]], %f0
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val, %res = call fp128 @llvm.experimental.constrained.fpext.f128.f32(float %val,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-conv-16.ll

; Test f128 floating-point strict conversion to/from integers on z14. ; Test f128 floating-point strict conversion to/from integers on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist ; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist
declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128, metadata)
declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128, metadata)
declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128, metadata)
declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata) declare i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128, metadata)
; Test signed f128->i32. ; Test signed f128->i32.
define i32 @f5(fp128 *%src) { define i32 @f5(fp128 *%src) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vl %v0, 0(%r2) ; CHECK: vl %v0, 0(%r2)
; CHECK: vrepg %v2, %v0, 1 ; CHECK: vrepg %v2, %v0, 1
; CHECK: cfxbr %r2, 5, %f0 ; CHECK: cfxbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128 %f, %conv = call i32 @llvm.experimental.constrained.fptosi.i32.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test signed f128->i64. ; Test signed f128->i64.
define i64 @f6(fp128 *%src) { define i64 @f6(fp128 *%src) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vl %v0, 0(%r2) ; CHECK: vl %v0, 0(%r2)
; CHECK: vrepg %v2, %v0, 1 ; CHECK: vrepg %v2, %v0, 1
; CHECK: cgxbr %r2, 5, %f0 ; CHECK: cgxbr %r2, 5, %f0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128 %f, %conv = call i64 @llvm.experimental.constrained.fptosi.i64.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
; Test unsigned f128->i32. ; Test unsigned f128->i32.
define i32 @f7(fp128 *%src) { define i32 @f7(fp128 *%src) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: vl %v0, 0(%r2) ; CHECK: vl %v0, 0(%r2)
; CHECK: vrepg %v2, %v0, 1 ; CHECK: vrepg %v2, %v0, 1
; CHECK: clfxbr %r2, 5, %f0, 0 ; CHECK: clfxbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f, %conv = call i32 @llvm.experimental.constrained.fptoui.i32.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %conv ret i32 %conv
} }
; Test unsigned f128->i64. ; Test unsigned f128->i64.
define i64 @f8(fp128 *%src) { define i64 @f8(fp128 *%src) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: vl %v0, 0(%r2) ; CHECK: vl %v0, 0(%r2)
; CHECK: vrepg %v2, %v0, 1 ; CHECK: vrepg %v2, %v0, 1
; CHECK: clgxbr %r2, 5, %f0, 0 ; CHECK: clgxbr %r2, 5, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%src %f = load fp128, fp128 *%src
%conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f, %conv = call i64 @llvm.experimental.constrained.fptoui.i64.f128(fp128 %f,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i64 %conv ret i64 %conv
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-div-01.ll

; Test strict 32-bit floating-point division. ; Test strict 32-bit floating-point division.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @foo() declare float @foo()
declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
; Check register division. ; Check register division.
define float @f1(float %f1, float %f2) { define float @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: debr %f0, %f2 ; CHECK: debr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the low end of the DEB range. ; Check the low end of the DEB range.
define float @f2(float %f1, float *%ptr) { define float @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: deb %f0, 0(%r2) ; CHECK: deb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the high end of the aligned DEB range. ; Check the high end of the aligned DEB range.
define float @f3(float %f1, float *%base) { define float @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: deb %f0, 4092(%r2) ; CHECK: deb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define float @f4(float %f1, float *%base) { define float @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: deb %f0, 0(%r2) ; CHECK: deb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define float @f5(float %f1, float *%base) { define float @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: deb %f0, 0(%r2) ; CHECK: deb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that DEB allows indices. ; Check that DEB allows indices.
define float @f6(float %f1, float *%base, i64 %index) { define float @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: deb %f0, 400(%r1,%r2) ; CHECK: deb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.fdiv.f32( %res = call float @llvm.experimental.constrained.fdiv.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that divisions of spilled values can use DEB rather than DEBR. ; Check that divisions of spilled values can use DEB rather than DEBR.
define float @f7(float *%ptr0) { define float @f7(float *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: deb %f0, 16{{[04]}}(%r15) ; CHECK-SCALAR: deb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%ptr0, i64 2 %ptr1 = getelementptr float, float *%ptr0, i64 2
%ptr2 = getelementptr float, float *%ptr0, i64 4 %ptr2 = getelementptr float, float *%ptr0, i64 4
%ptr3 = getelementptr float, float *%ptr0, i64 6 %ptr3 = getelementptr float, float *%ptr0, i64 6
%ptr4 = getelementptr float, float *%ptr0, i64 8 %ptr4 = getelementptr float, float *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load float, float *%ptr4 %val4 = load float, float *%ptr4
%val5 = load float, float *%ptr5 %val5 = load float, float *%ptr5
%val6 = load float, float *%ptr6 %val6 = load float, float *%ptr6
%val7 = load float, float *%ptr7 %val7 = load float, float *%ptr7
%val8 = load float, float *%ptr8 %val8 = load float, float *%ptr8
%val9 = load float, float *%ptr9 %val9 = load float, float *%ptr9
%val10 = load float, float *%ptr10 %val10 = load float, float *%ptr10
%ret = call float @foo() %ret = call float @foo() #0
%div0 = call float @llvm.experimental.constrained.fdiv.f32( %div0 = call float @llvm.experimental.constrained.fdiv.f32(
float %ret, float %val0, float %ret, float %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div1 = call float @llvm.experimental.constrained.fdiv.f32( %div1 = call float @llvm.experimental.constrained.fdiv.f32(
float %div0, float %val1, float %div0, float %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div2 = call float @llvm.experimental.constrained.fdiv.f32( %div2 = call float @llvm.experimental.constrained.fdiv.f32(
float %div1, float %val2, float %div1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div3 = call float @llvm.experimental.constrained.fdiv.f32( %div3 = call float @llvm.experimental.constrained.fdiv.f32(
float %div2, float %val3, float %div2, float %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div4 = call float @llvm.experimental.constrained.fdiv.f32( %div4 = call float @llvm.experimental.constrained.fdiv.f32(
float %div3, float %val4, float %div3, float %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div5 = call float @llvm.experimental.constrained.fdiv.f32( %div5 = call float @llvm.experimental.constrained.fdiv.f32(
float %div4, float %val5, float %div4, float %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div6 = call float @llvm.experimental.constrained.fdiv.f32( %div6 = call float @llvm.experimental.constrained.fdiv.f32(
float %div5, float %val6, float %div5, float %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div7 = call float @llvm.experimental.constrained.fdiv.f32( %div7 = call float @llvm.experimental.constrained.fdiv.f32(
float %div6, float %val7, float %div6, float %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div8 = call float @llvm.experimental.constrained.fdiv.f32( %div8 = call float @llvm.experimental.constrained.fdiv.f32(
float %div7, float %val8, float %div7, float %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div9 = call float @llvm.experimental.constrained.fdiv.f32( %div9 = call float @llvm.experimental.constrained.fdiv.f32(
float %div8, float %val9, float %div8, float %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div10 = call float @llvm.experimental.constrained.fdiv.f32( %div10 = call float @llvm.experimental.constrained.fdiv.f32(
float %div9, float %val10, float %div9, float %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %div10 ret float %div10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-div-02.ll

; Test strict 64-bit floating-point division. ; Test strict 64-bit floating-point division.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @foo() declare double @foo()
declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
; Check register division. ; Check register division.
define double @f1(double %f1, double %f2) { define double @f1(double %f1, double %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: ddbr %f0, %f2 ; CHECK: ddbr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the DDB range. ; Check the low end of the DDB range.
define double @f2(double %f1, double *%ptr) { define double @f2(double %f1, double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: ddb %f0, 0(%r2) ; CHECK: ddb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned DDB range. ; Check the high end of the aligned DDB range.
define double @f3(double %f1, double *%base) { define double @f3(double %f1, double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: ddb %f0, 4088(%r2) ; CHECK: ddb %f0, 4088(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(double %f1, double *%base) { define double @f4(double %f1, double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: ddb %f0, 0(%r2) ; CHECK: ddb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(double %f1, double *%base) { define double @f5(double %f1, double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: ddb %f0, 0(%r2) ; CHECK: ddb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that DDB allows indices. ; Check that DDB allows indices.
define double @f6(double %f1, double *%base, i64 %index) { define double @f6(double %f1, double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: ddb %f0, 800(%r1,%r2) ; CHECK: ddb %f0, 800(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%res = call double @llvm.experimental.constrained.fdiv.f64( %res = call double @llvm.experimental.constrained.fdiv.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that divisions of spilled values can use DDB rather than DDBR. ; Check that divisions of spilled values can use DDB rather than DDBR.
define double @f7(double *%ptr0) { define double @f7(double *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: ddb %f0, 160(%r15) ; CHECK-SCALAR: ddb %f0, 160(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%ptr0, i64 2 %ptr1 = getelementptr double, double *%ptr0, i64 2
%ptr2 = getelementptr double, double *%ptr0, i64 4 %ptr2 = getelementptr double, double *%ptr0, i64 4
%ptr3 = getelementptr double, double *%ptr0, i64 6 %ptr3 = getelementptr double, double *%ptr0, i64 6
%ptr4 = getelementptr double, double *%ptr0, i64 8 %ptr4 = getelementptr double, double *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load double, double *%ptr4 %val4 = load double, double *%ptr4
%val5 = load double, double *%ptr5 %val5 = load double, double *%ptr5
%val6 = load double, double *%ptr6 %val6 = load double, double *%ptr6
%val7 = load double, double *%ptr7 %val7 = load double, double *%ptr7
%val8 = load double, double *%ptr8 %val8 = load double, double *%ptr8
%val9 = load double, double *%ptr9 %val9 = load double, double *%ptr9
%val10 = load double, double *%ptr10 %val10 = load double, double *%ptr10
%ret = call double @foo() %ret = call double @foo() #0
%div0 = call double @llvm.experimental.constrained.fdiv.f64( %div0 = call double @llvm.experimental.constrained.fdiv.f64(
double %ret, double %val0, double %ret, double %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div1 = call double @llvm.experimental.constrained.fdiv.f64( %div1 = call double @llvm.experimental.constrained.fdiv.f64(
double %div0, double %val1, double %div0, double %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div2 = call double @llvm.experimental.constrained.fdiv.f64( %div2 = call double @llvm.experimental.constrained.fdiv.f64(
double %div1, double %val2, double %div1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div3 = call double @llvm.experimental.constrained.fdiv.f64( %div3 = call double @llvm.experimental.constrained.fdiv.f64(
double %div2, double %val3, double %div2, double %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div4 = call double @llvm.experimental.constrained.fdiv.f64( %div4 = call double @llvm.experimental.constrained.fdiv.f64(
double %div3, double %val4, double %div3, double %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div5 = call double @llvm.experimental.constrained.fdiv.f64( %div5 = call double @llvm.experimental.constrained.fdiv.f64(
double %div4, double %val5, double %div4, double %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div6 = call double @llvm.experimental.constrained.fdiv.f64( %div6 = call double @llvm.experimental.constrained.fdiv.f64(
double %div5, double %val6, double %div5, double %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div7 = call double @llvm.experimental.constrained.fdiv.f64( %div7 = call double @llvm.experimental.constrained.fdiv.f64(
double %div6, double %val7, double %div6, double %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div8 = call double @llvm.experimental.constrained.fdiv.f64( %div8 = call double @llvm.experimental.constrained.fdiv.f64(
double %div7, double %val8, double %div7, double %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div9 = call double @llvm.experimental.constrained.fdiv.f64( %div9 = call double @llvm.experimental.constrained.fdiv.f64(
double %div8, double %val9, double %div8, double %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%div10 = call double @llvm.experimental.constrained.fdiv.f64( %div10 = call double @llvm.experimental.constrained.fdiv.f64(
double %div9, double %val10, double %div9, double %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %div10 ret double %div10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-div-03.ll

; Test strict 128-bit floating-point division. ; Test strict 128-bit floating-point division.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata)
; There is no memory form of 128-bit division. ; There is no memory form of 128-bit division.
define void @f1(fp128 *%ptr, float %f2) { define void @f1(fp128 *%ptr, float %f2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: lxebr %f0, %f0 ; CHECK-DAG: lxebr %f0, %f0
; CHECK-DAG: ld %f1, 0(%r2) ; CHECK-DAG: ld %f1, 0(%r2)
; CHECK-DAG: ld %f3, 8(%r2) ; CHECK-DAG: ld %f3, 8(%r2)
; CHECK: dxbr %f1, %f0 ; CHECK: dxbr %f1, %f0
; CHECK: std %f1, 0(%r2) ; CHECK: std %f1, 0(%r2)
; CHECK: std %f3, 8(%r2) ; CHECK: std %f3, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr %f1 = load fp128, fp128 *%ptr
%f2x = fpext float %f2 to fp128 %f2x = fpext float %f2 to fp128
%sum = call fp128 @llvm.experimental.constrained.fdiv.f128( %sum = call fp128 @llvm.experimental.constrained.fdiv.f128(
fp128 %f1, fp128 %f2x, fp128 %f1, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr store fp128 %sum, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-div-04.ll

; Test strict 128-bit floating-point division on z14. ; Test strict 128-bit floating-point division on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fdiv.f128(fp128, fp128, metadata, metadata)
define void @f1(fp128 *%ptr1, fp128 *%ptr2) { define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfdxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]] ; CHECK: wfdxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr1 %f1 = load fp128, fp128 *%ptr1
%f2 = load fp128, fp128 *%ptr2 %f2 = load fp128, fp128 *%ptr2
%sum = call fp128 @llvm.experimental.constrained.fdiv.f128( %sum = call fp128 @llvm.experimental.constrained.fdiv.f128(
fp128 %f1, fp128 %f2, fp128 %f1, fp128 %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr1 store fp128 %sum, fp128 *%ptr1
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-mul-01.ll

; Test strict multiplication of two f32s, producing an f32 result. ; Test strict multiplication of two f32s, producing an f32 result.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @foo() declare float @foo()
declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
; Check register multiplication. ; Check register multiplication.
define float @f1(float %f1, float %f2) { define float @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: meebr %f0, %f2 ; CHECK: meebr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the low end of the MEEB range. ; Check the low end of the MEEB range.
define float @f2(float %f1, float *%ptr) { define float @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: meeb %f0, 0(%r2) ; CHECK: meeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the high end of the aligned MEEB range. ; Check the high end of the aligned MEEB range.
define float @f3(float %f1, float *%base) { define float @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: meeb %f0, 4092(%r2) ; CHECK: meeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define float @f4(float %f1, float *%base) { define float @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: meeb %f0, 0(%r2) ; CHECK: meeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define float @f5(float %f1, float *%base) { define float @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: meeb %f0, 0(%r2) ; CHECK: meeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that MEEB allows indices. ; Check that MEEB allows indices.
define float @f6(float %f1, float *%base, i64 %index) { define float @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: meeb %f0, 400(%r1,%r2) ; CHECK: meeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.fmul.f32( %res = call float @llvm.experimental.constrained.fmul.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that multiplications of spilled values can use MEEB rather than MEEBR. ; Check that multiplications of spilled values can use MEEB rather than MEEBR.
define float @f7(float *%ptr0) { define float @f7(float *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: meeb %f0, 16{{[04]}}(%r15) ; CHECK-SCALAR: meeb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%ptr0, i64 2 %ptr1 = getelementptr float, float *%ptr0, i64 2
%ptr2 = getelementptr float, float *%ptr0, i64 4 %ptr2 = getelementptr float, float *%ptr0, i64 4
%ptr3 = getelementptr float, float *%ptr0, i64 6 %ptr3 = getelementptr float, float *%ptr0, i64 6
%ptr4 = getelementptr float, float *%ptr0, i64 8 %ptr4 = getelementptr float, float *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load float, float *%ptr4 %val4 = load float, float *%ptr4
%val5 = load float, float *%ptr5 %val5 = load float, float *%ptr5
%val6 = load float, float *%ptr6 %val6 = load float, float *%ptr6
%val7 = load float, float *%ptr7 %val7 = load float, float *%ptr7
%val8 = load float, float *%ptr8 %val8 = load float, float *%ptr8
%val9 = load float, float *%ptr9 %val9 = load float, float *%ptr9
%val10 = load float, float *%ptr10 %val10 = load float, float *%ptr10
%ret = call float @foo() %ret = call float @foo() #0
%mul0 = call float @llvm.experimental.constrained.fmul.f32( %mul0 = call float @llvm.experimental.constrained.fmul.f32(
float %ret, float %val0, float %ret, float %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul1 = call float @llvm.experimental.constrained.fmul.f32( %mul1 = call float @llvm.experimental.constrained.fmul.f32(
float %mul0, float %val1, float %mul0, float %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul2 = call float @llvm.experimental.constrained.fmul.f32( %mul2 = call float @llvm.experimental.constrained.fmul.f32(
float %mul1, float %val2, float %mul1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul3 = call float @llvm.experimental.constrained.fmul.f32( %mul3 = call float @llvm.experimental.constrained.fmul.f32(
float %mul2, float %val3, float %mul2, float %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul4 = call float @llvm.experimental.constrained.fmul.f32( %mul4 = call float @llvm.experimental.constrained.fmul.f32(
float %mul3, float %val4, float %mul3, float %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul5 = call float @llvm.experimental.constrained.fmul.f32( %mul5 = call float @llvm.experimental.constrained.fmul.f32(
float %mul4, float %val5, float %mul4, float %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul6 = call float @llvm.experimental.constrained.fmul.f32( %mul6 = call float @llvm.experimental.constrained.fmul.f32(
float %mul5, float %val6, float %mul5, float %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul7 = call float @llvm.experimental.constrained.fmul.f32( %mul7 = call float @llvm.experimental.constrained.fmul.f32(
float %mul6, float %val7, float %mul6, float %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul8 = call float @llvm.experimental.constrained.fmul.f32( %mul8 = call float @llvm.experimental.constrained.fmul.f32(
float %mul7, float %val8, float %mul7, float %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul9 = call float @llvm.experimental.constrained.fmul.f32( %mul9 = call float @llvm.experimental.constrained.fmul.f32(
float %mul8, float %val9, float %mul8, float %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul10 = call float @llvm.experimental.constrained.fmul.f32( %mul10 = call float @llvm.experimental.constrained.fmul.f32(
float %mul9, float %val10, float %mul9, float %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %mul10 ret float %mul10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-02.ll

; Test strict multiplication of two f32s, producing an f64 result. ; Test strict multiplication of two f32s, producing an f64 result.
; FIXME: we do not have a strict version of fpext yet ; FIXME: we do not have a strict version of fpext yet
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare float @foo() declare float @foo()
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
; Check register multiplication. ; Check register multiplication.
define double @f1(float %f1, float %f2) { define double @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: mdebr %f0, %f2 ; CHECK: mdebr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the MDEB range. ; Check the low end of the MDEB range.
define double @f2(float %f1, float *%ptr) { define double @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned MDEB range. ; Check the high end of the aligned MDEB range.
define double @f3(float %f1, float *%base) { define double @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mdeb %f0, 4092(%r2) ; CHECK: mdeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(float %f1, float *%base) { define double @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(float %f1, float *%base) { define double @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: mdeb %f0, 0(%r2) ; CHECK: mdeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that MDEB allows indices. ; Check that MDEB allows indices.
define double @f6(float %f1, float *%base, i64 %index) { define double @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: mdeb %f0, 400(%r1,%r2) ; CHECK: mdeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%f1x = fpext float %f1 to double %f1x = fpext float %f1 to double
%f2x = fpext float %f2 to double %f2x = fpext float %f2 to double
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1x, double %f2x, double %f1x, double %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that multiplications of spilled values can use MDEB rather than MDEBR. ; Check that multiplications of spilled values can use MDEB rather than MDEBR.
define float @f7(float *%ptr0) { define float @f7(float *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK: mdeb %f0, 16{{[04]}}(%r15) ; CHECK: mdeb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%ptr0, i64 2 %ptr1 = getelementptr float, float *%ptr0, i64 2
%ptr2 = getelementptr float, float *%ptr0, i64 4 %ptr2 = getelementptr float, float *%ptr0, i64 4
%ptr3 = getelementptr float, float *%ptr0, i64 6 %ptr3 = getelementptr float, float *%ptr0, i64 6
%ptr4 = getelementptr float, float *%ptr0, i64 8 %ptr4 = getelementptr float, float *%ptr0, i64 8
Show All 35 Lines; CHECK: br %r14
store float %frob4, float *%ptr4 store float %frob4, float *%ptr4
store float %frob5, float *%ptr5 store float %frob5, float *%ptr5
store float %frob6, float *%ptr6 store float %frob6, float *%ptr6
store float %frob7, float *%ptr7 store float %frob7, float *%ptr7
store float %frob8, float *%ptr8 store float %frob8, float *%ptr8
store float %frob9, float *%ptr9 store float %frob9, float *%ptr9
store float %frob10, float *%ptr10 store float %frob10, float *%ptr10
%ret = call float @foo() %ret = call float @foo() #0
%accext0 = fpext float %ret to double %accext0 = fpext float %ret to double
%ext0 = fpext float %frob0 to double %ext0 = fpext float %frob0 to double
%mul0 = call double @llvm.experimental.constrained.fmul.f64( %mul0 = call double @llvm.experimental.constrained.fmul.f64(
double %accext0, double %ext0, double %accext0, double %ext0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra0 = call double @llvm.experimental.constrained.fmul.f64( %extra0 = call double @llvm.experimental.constrained.fmul.f64(
double %mul0, double 1.01, double %mul0, double 1.01,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc0 = fptrunc double %extra0 to float %trunc0 = fptrunc double %extra0 to float
%accext1 = fpext float %trunc0 to double %accext1 = fpext float %trunc0 to double
%ext1 = fpext float %frob1 to double %ext1 = fpext float %frob1 to double
%mul1 = call double @llvm.experimental.constrained.fmul.f64( %mul1 = call double @llvm.experimental.constrained.fmul.f64(
double %accext1, double %ext1, double %accext1, double %ext1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra1 = call double @llvm.experimental.constrained.fmul.f64( %extra1 = call double @llvm.experimental.constrained.fmul.f64(
double %mul1, double 1.11, double %mul1, double 1.11,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc1 = fptrunc double %extra1 to float %trunc1 = fptrunc double %extra1 to float
%accext2 = fpext float %trunc1 to double %accext2 = fpext float %trunc1 to double
%ext2 = fpext float %frob2 to double %ext2 = fpext float %frob2 to double
%mul2 = call double @llvm.experimental.constrained.fmul.f64( %mul2 = call double @llvm.experimental.constrained.fmul.f64(
double %accext2, double %ext2, double %accext2, double %ext2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra2 = call double @llvm.experimental.constrained.fmul.f64( %extra2 = call double @llvm.experimental.constrained.fmul.f64(
double %mul2, double 1.21, double %mul2, double 1.21,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc2 = fptrunc double %extra2 to float %trunc2 = fptrunc double %extra2 to float
%accext3 = fpext float %trunc2 to double %accext3 = fpext float %trunc2 to double
%ext3 = fpext float %frob3 to double %ext3 = fpext float %frob3 to double
%mul3 = call double @llvm.experimental.constrained.fmul.f64( %mul3 = call double @llvm.experimental.constrained.fmul.f64(
double %accext3, double %ext3, double %accext3, double %ext3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra3 = call double @llvm.experimental.constrained.fmul.f64( %extra3 = call double @llvm.experimental.constrained.fmul.f64(
double %mul3, double 1.31, double %mul3, double 1.31,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc3 = fptrunc double %extra3 to float %trunc3 = fptrunc double %extra3 to float
%accext4 = fpext float %trunc3 to double %accext4 = fpext float %trunc3 to double
%ext4 = fpext float %frob4 to double %ext4 = fpext float %frob4 to double
%mul4 = call double @llvm.experimental.constrained.fmul.f64( %mul4 = call double @llvm.experimental.constrained.fmul.f64(
double %accext4, double %ext4, double %accext4, double %ext4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra4 = call double @llvm.experimental.constrained.fmul.f64( %extra4 = call double @llvm.experimental.constrained.fmul.f64(
double %mul4, double 1.41, double %mul4, double 1.41,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc4 = fptrunc double %extra4 to float %trunc4 = fptrunc double %extra4 to float
%accext5 = fpext float %trunc4 to double %accext5 = fpext float %trunc4 to double
%ext5 = fpext float %frob5 to double %ext5 = fpext float %frob5 to double
%mul5 = call double @llvm.experimental.constrained.fmul.f64( %mul5 = call double @llvm.experimental.constrained.fmul.f64(
double %accext5, double %ext5, double %accext5, double %ext5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra5 = call double @llvm.experimental.constrained.fmul.f64( %extra5 = call double @llvm.experimental.constrained.fmul.f64(
double %mul5, double 1.51, double %mul5, double 1.51,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc5 = fptrunc double %extra5 to float %trunc5 = fptrunc double %extra5 to float
%accext6 = fpext float %trunc5 to double %accext6 = fpext float %trunc5 to double
%ext6 = fpext float %frob6 to double %ext6 = fpext float %frob6 to double
%mul6 = call double @llvm.experimental.constrained.fmul.f64( %mul6 = call double @llvm.experimental.constrained.fmul.f64(
double %accext6, double %ext6, double %accext6, double %ext6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra6 = call double @llvm.experimental.constrained.fmul.f64( %extra6 = call double @llvm.experimental.constrained.fmul.f64(
double %mul6, double 1.61, double %mul6, double 1.61,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc6 = fptrunc double %extra6 to float %trunc6 = fptrunc double %extra6 to float
%accext7 = fpext float %trunc6 to double %accext7 = fpext float %trunc6 to double
%ext7 = fpext float %frob7 to double %ext7 = fpext float %frob7 to double
%mul7 = call double @llvm.experimental.constrained.fmul.f64( %mul7 = call double @llvm.experimental.constrained.fmul.f64(
double %accext7, double %ext7, double %accext7, double %ext7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra7 = call double @llvm.experimental.constrained.fmul.f64( %extra7 = call double @llvm.experimental.constrained.fmul.f64(
double %mul7, double 1.71, double %mul7, double 1.71,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc7 = fptrunc double %extra7 to float %trunc7 = fptrunc double %extra7 to float
%accext8 = fpext float %trunc7 to double %accext8 = fpext float %trunc7 to double
%ext8 = fpext float %frob8 to double %ext8 = fpext float %frob8 to double
%mul8 = call double @llvm.experimental.constrained.fmul.f64( %mul8 = call double @llvm.experimental.constrained.fmul.f64(
double %accext8, double %ext8, double %accext8, double %ext8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra8 = call double @llvm.experimental.constrained.fmul.f64( %extra8 = call double @llvm.experimental.constrained.fmul.f64(
double %mul8, double 1.81, double %mul8, double 1.81,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc8 = fptrunc double %extra8 to float %trunc8 = fptrunc double %extra8 to float
%accext9 = fpext float %trunc8 to double %accext9 = fpext float %trunc8 to double
%ext9 = fpext float %frob9 to double %ext9 = fpext float %frob9 to double
%mul9 = call double @llvm.experimental.constrained.fmul.f64( %mul9 = call double @llvm.experimental.constrained.fmul.f64(
double %accext9, double %ext9, double %accext9, double %ext9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%extra9 = call double @llvm.experimental.constrained.fmul.f64( %extra9 = call double @llvm.experimental.constrained.fmul.f64(
double %mul9, double 1.91, double %mul9, double 1.91,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc9 = fptrunc double %extra9 to float %trunc9 = fptrunc double %extra9 to float
ret float %trunc9 ret float %trunc9
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-03.ll

; Test strict multiplication of two f64s, producing an f64 result. ; Test strict multiplication of two f64s, producing an f64 result.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @foo() declare double @foo()
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
; Check register multiplication. ; Check register multiplication.
define double @f1(double %f1, double %f2) { define double @f1(double %f1, double %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: mdbr %f0, %f2 ; CHECK: mdbr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the MDB range. ; Check the low end of the MDB range.
define double @f2(double %f1, double *%ptr) { define double @f2(double %f1, double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mdb %f0, 0(%r2) ; CHECK: mdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned MDB range. ; Check the high end of the aligned MDB range.
define double @f3(double %f1, double *%base) { define double @f3(double %f1, double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mdb %f0, 4088(%r2) ; CHECK: mdb %f0, 4088(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(double %f1, double *%base) { define double @f4(double %f1, double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mdb %f0, 0(%r2) ; CHECK: mdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(double %f1, double *%base) { define double @f5(double %f1, double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: mdb %f0, 0(%r2) ; CHECK: mdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that MDB allows indices. ; Check that MDB allows indices.
define double @f6(double %f1, double *%base, i64 %index) { define double @f6(double %f1, double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: mdb %f0, 800(%r1,%r2) ; CHECK: mdb %f0, 800(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%res = call double @llvm.experimental.constrained.fmul.f64( %res = call double @llvm.experimental.constrained.fmul.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that multiplications of spilled values can use MDB rather than MDBR. ; Check that multiplications of spilled values can use MDB rather than MDBR.
define double @f7(double *%ptr0) { define double @f7(double *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: mdb %f0, 160(%r15) ; CHECK-SCALAR: mdb %f0, 160(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%ptr0, i64 2 %ptr1 = getelementptr double, double *%ptr0, i64 2
%ptr2 = getelementptr double, double *%ptr0, i64 4 %ptr2 = getelementptr double, double *%ptr0, i64 4
%ptr3 = getelementptr double, double *%ptr0, i64 6 %ptr3 = getelementptr double, double *%ptr0, i64 6
%ptr4 = getelementptr double, double *%ptr0, i64 8 %ptr4 = getelementptr double, double *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load double, double *%ptr4 %val4 = load double, double *%ptr4
%val5 = load double, double *%ptr5 %val5 = load double, double *%ptr5
%val6 = load double, double *%ptr6 %val6 = load double, double *%ptr6
%val7 = load double, double *%ptr7 %val7 = load double, double *%ptr7
%val8 = load double, double *%ptr8 %val8 = load double, double *%ptr8
%val9 = load double, double *%ptr9 %val9 = load double, double *%ptr9
%val10 = load double, double *%ptr10 %val10 = load double, double *%ptr10
%ret = call double @foo() %ret = call double @foo() #0
%mul0 = call double @llvm.experimental.constrained.fmul.f64( %mul0 = call double @llvm.experimental.constrained.fmul.f64(
double %ret, double %val0, double %ret, double %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul1 = call double @llvm.experimental.constrained.fmul.f64( %mul1 = call double @llvm.experimental.constrained.fmul.f64(
double %mul0, double %val1, double %mul0, double %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul2 = call double @llvm.experimental.constrained.fmul.f64( %mul2 = call double @llvm.experimental.constrained.fmul.f64(
double %mul1, double %val2, double %mul1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul3 = call double @llvm.experimental.constrained.fmul.f64( %mul3 = call double @llvm.experimental.constrained.fmul.f64(
double %mul2, double %val3, double %mul2, double %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul4 = call double @llvm.experimental.constrained.fmul.f64( %mul4 = call double @llvm.experimental.constrained.fmul.f64(
double %mul3, double %val4, double %mul3, double %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul5 = call double @llvm.experimental.constrained.fmul.f64( %mul5 = call double @llvm.experimental.constrained.fmul.f64(
double %mul4, double %val5, double %mul4, double %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul6 = call double @llvm.experimental.constrained.fmul.f64( %mul6 = call double @llvm.experimental.constrained.fmul.f64(
double %mul5, double %val6, double %mul5, double %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul7 = call double @llvm.experimental.constrained.fmul.f64( %mul7 = call double @llvm.experimental.constrained.fmul.f64(
double %mul6, double %val7, double %mul6, double %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul8 = call double @llvm.experimental.constrained.fmul.f64( %mul8 = call double @llvm.experimental.constrained.fmul.f64(
double %mul7, double %val8, double %mul7, double %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul9 = call double @llvm.experimental.constrained.fmul.f64( %mul9 = call double @llvm.experimental.constrained.fmul.f64(
double %mul8, double %val9, double %mul8, double %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul10 = call double @llvm.experimental.constrained.fmul.f64( %mul10 = call double @llvm.experimental.constrained.fmul.f64(
double %mul9, double %val10, double %mul9, double %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %mul10 ret double %mul10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-04.ll

; Test strict multiplication of two f64s, producing an f128 result. ; Test strict multiplication of two f64s, producing an f128 result.
; FIXME: we do not have a strict version of fpext yet ; FIXME: we do not have a strict version of fpext yet
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
declare double @foo() declare double @foo()
; Check register multiplication. "mxdbr %f0, %f2" is not valid from LLVM's ; Check register multiplication. "mxdbr %f0, %f2" is not valid from LLVM's
; point of view, because %f2 is the low register of the FP128 %f0. Pass the ; point of view, because %f2 is the low register of the FP128 %f0. Pass the
; multiplier in %f4 instead. ; multiplier in %f4 instead.
define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) { define void @f1(double %f1, double %dummy, double %f2, fp128 *%dst) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: mxdbr %f0, %f4 ; CHECK: mxdbr %f0, %f4
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the low end of the MXDB range. ; Check the low end of the MXDB range.
define void @f2(double %f1, double *%ptr, fp128 *%dst) { define void @f2(double %f1, double *%ptr, fp128 *%dst) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the high end of the aligned MXDB range. ; Check the high end of the aligned MXDB range.
define void @f3(double %f1, double *%base, fp128 *%dst) { define void @f3(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mxdb %f0, 4088(%r2) ; CHECK: mxdb %f0, 4088(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define void @f4(double %f1, double *%base, fp128 *%dst) { define void @f4(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define void @f5(double %f1, double *%base, fp128 *%dst) { define void @f5(double %f1, double *%base, fp128 *%dst) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: mxdb %f0, 0(%r2) ; CHECK: mxdb %f0, 0(%r2)
; CHECK: std %f0, 0(%r3) ; CHECK: std %f0, 0(%r3)
; CHECK: std %f2, 8(%r3) ; CHECK: std %f2, 8(%r3)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check that MXDB allows indices. ; Check that MXDB allows indices.
define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) { define void @f6(double %f1, double *%base, i64 %index, fp128 *%dst) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: mxdb %f0, 800(%r1,%r2) ; CHECK: mxdb %f0, 800(%r1,%r2)
; CHECK: std %f0, 0(%r4) ; CHECK: std %f0, 0(%r4)
; CHECK: std %f2, 8(%r4) ; CHECK: std %f2, 8(%r4)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
; Check that multiplications of spilled values can use MXDB rather than MXDBR. ; Check that multiplications of spilled values can use MXDB rather than MXDBR.
define double @f7(double *%ptr0) { define double @f7(double *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK: mxdb %f0, 160(%r15) ; CHECK: mxdb %f0, 160(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%ptr0, i64 2 %ptr1 = getelementptr double, double *%ptr0, i64 2
%ptr2 = getelementptr double, double *%ptr0, i64 4 %ptr2 = getelementptr double, double *%ptr0, i64 4
%ptr3 = getelementptr double, double *%ptr0, i64 6 %ptr3 = getelementptr double, double *%ptr0, i64 6
%ptr4 = getelementptr double, double *%ptr0, i64 8 %ptr4 = getelementptr double, double *%ptr0, i64 8
Show All 35 Lines; CHECK: br %r14
store double %frob4, double *%ptr4 store double %frob4, double *%ptr4
store double %frob5, double *%ptr5 store double %frob5, double *%ptr5
store double %frob6, double *%ptr6 store double %frob6, double *%ptr6
store double %frob7, double *%ptr7 store double %frob7, double *%ptr7
store double %frob8, double *%ptr8 store double %frob8, double *%ptr8
store double %frob9, double *%ptr9 store double %frob9, double *%ptr9
store double %frob10, double *%ptr10 store double %frob10, double *%ptr10
%ret = call double @foo() %ret = call double @foo() #0
%accext0 = fpext double %ret to fp128 %accext0 = fpext double %ret to fp128
%ext0 = fpext double %frob0 to fp128 %ext0 = fpext double %frob0 to fp128
%mul0 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul0 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext0, fp128 %ext0, fp128 %accext0, fp128 %ext0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const0 = fpext double 1.01 to fp128 %const0 = fpext double 1.01 to fp128
%extra0 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra0 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul0, fp128 %const0, fp128 %mul0, fp128 %const0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc0 = fptrunc fp128 %extra0 to double %trunc0 = fptrunc fp128 %extra0 to double
%accext1 = fpext double %trunc0 to fp128 %accext1 = fpext double %trunc0 to fp128
%ext1 = fpext double %frob1 to fp128 %ext1 = fpext double %frob1 to fp128
%mul1 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul1 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext1, fp128 %ext1, fp128 %accext1, fp128 %ext1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const1 = fpext double 1.11 to fp128 %const1 = fpext double 1.11 to fp128
%extra1 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra1 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul1, fp128 %const1, fp128 %mul1, fp128 %const1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc1 = fptrunc fp128 %extra1 to double %trunc1 = fptrunc fp128 %extra1 to double
%accext2 = fpext double %trunc1 to fp128 %accext2 = fpext double %trunc1 to fp128
%ext2 = fpext double %frob2 to fp128 %ext2 = fpext double %frob2 to fp128
%mul2 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul2 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext2, fp128 %ext2, fp128 %accext2, fp128 %ext2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const2 = fpext double 1.21 to fp128 %const2 = fpext double 1.21 to fp128
%extra2 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra2 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul2, fp128 %const2, fp128 %mul2, fp128 %const2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc2 = fptrunc fp128 %extra2 to double %trunc2 = fptrunc fp128 %extra2 to double
%accext3 = fpext double %trunc2 to fp128 %accext3 = fpext double %trunc2 to fp128
%ext3 = fpext double %frob3 to fp128 %ext3 = fpext double %frob3 to fp128
%mul3 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul3 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext3, fp128 %ext3, fp128 %accext3, fp128 %ext3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const3 = fpext double 1.31 to fp128 %const3 = fpext double 1.31 to fp128
%extra3 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra3 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul3, fp128 %const3, fp128 %mul3, fp128 %const3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc3 = fptrunc fp128 %extra3 to double %trunc3 = fptrunc fp128 %extra3 to double
%accext4 = fpext double %trunc3 to fp128 %accext4 = fpext double %trunc3 to fp128
%ext4 = fpext double %frob4 to fp128 %ext4 = fpext double %frob4 to fp128
%mul4 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul4 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext4, fp128 %ext4, fp128 %accext4, fp128 %ext4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const4 = fpext double 1.41 to fp128 %const4 = fpext double 1.41 to fp128
%extra4 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra4 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul4, fp128 %const4, fp128 %mul4, fp128 %const4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc4 = fptrunc fp128 %extra4 to double %trunc4 = fptrunc fp128 %extra4 to double
%accext5 = fpext double %trunc4 to fp128 %accext5 = fpext double %trunc4 to fp128
%ext5 = fpext double %frob5 to fp128 %ext5 = fpext double %frob5 to fp128
%mul5 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul5 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext5, fp128 %ext5, fp128 %accext5, fp128 %ext5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const5 = fpext double 1.51 to fp128 %const5 = fpext double 1.51 to fp128
%extra5 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra5 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul5, fp128 %const5, fp128 %mul5, fp128 %const5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc5 = fptrunc fp128 %extra5 to double %trunc5 = fptrunc fp128 %extra5 to double
%accext6 = fpext double %trunc5 to fp128 %accext6 = fpext double %trunc5 to fp128
%ext6 = fpext double %frob6 to fp128 %ext6 = fpext double %frob6 to fp128
%mul6 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul6 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext6, fp128 %ext6, fp128 %accext6, fp128 %ext6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const6 = fpext double 1.61 to fp128 %const6 = fpext double 1.61 to fp128
%extra6 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra6 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul6, fp128 %const6, fp128 %mul6, fp128 %const6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc6 = fptrunc fp128 %extra6 to double %trunc6 = fptrunc fp128 %extra6 to double
%accext7 = fpext double %trunc6 to fp128 %accext7 = fpext double %trunc6 to fp128
%ext7 = fpext double %frob7 to fp128 %ext7 = fpext double %frob7 to fp128
%mul7 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul7 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext7, fp128 %ext7, fp128 %accext7, fp128 %ext7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const7 = fpext double 1.71 to fp128 %const7 = fpext double 1.71 to fp128
%extra7 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra7 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul7, fp128 %const7, fp128 %mul7, fp128 %const7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc7 = fptrunc fp128 %extra7 to double %trunc7 = fptrunc fp128 %extra7 to double
%accext8 = fpext double %trunc7 to fp128 %accext8 = fpext double %trunc7 to fp128
%ext8 = fpext double %frob8 to fp128 %ext8 = fpext double %frob8 to fp128
%mul8 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul8 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext8, fp128 %ext8, fp128 %accext8, fp128 %ext8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const8 = fpext double 1.81 to fp128 %const8 = fpext double 1.81 to fp128
%extra8 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra8 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul8, fp128 %const8, fp128 %mul8, fp128 %const8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc8 = fptrunc fp128 %extra8 to double %trunc8 = fptrunc fp128 %extra8 to double
%accext9 = fpext double %trunc8 to fp128 %accext9 = fpext double %trunc8 to fp128
%ext9 = fpext double %frob9 to fp128 %ext9 = fpext double %frob9 to fp128
%mul9 = call fp128 @llvm.experimental.constrained.fmul.f128( %mul9 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %accext9, fp128 %ext9, fp128 %accext9, fp128 %ext9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%const9 = fpext double 1.91 to fp128 %const9 = fpext double 1.91 to fp128
%extra9 = call fp128 @llvm.experimental.constrained.fmul.f128( %extra9 = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %mul9, fp128 %const9, fp128 %mul9, fp128 %const9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%trunc9 = fptrunc fp128 %extra9 to double %trunc9 = fptrunc fp128 %extra9 to double
ret double %trunc9 ret double %trunc9
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-05.ll

; Test strict multiplication of two f128s. ; Test strict multiplication of two f128s.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
; There is no memory form of 128-bit multiplication. ; There is no memory form of 128-bit multiplication.
define void @f1(fp128 *%ptr, float %f2) { define void @f1(fp128 *%ptr, float %f2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: lxebr %f0, %f0 ; CHECK-DAG: lxebr %f0, %f0
; CHECK-DAG: ld %f1, 0(%r2) ; CHECK-DAG: ld %f1, 0(%r2)
; CHECK-DAG: ld %f3, 8(%r2) ; CHECK-DAG: ld %f3, 8(%r2)
; CHECK: mxbr %f0, %f1 ; CHECK: mxbr %f0, %f1
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr %f1 = load fp128, fp128 *%ptr
%f2x = fpext float %f2 to fp128 %f2x = fpext float %f2 to fp128
%diff = call fp128 @llvm.experimental.constrained.fmul.f128( %diff = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1, fp128 %f2x, fp128 %f1, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %diff, fp128 *%ptr store fp128 %diff, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-mul-06.ll

; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
declare float @llvm.experimental.constrained.fma.f32(float, float, float, metadata, metadata) declare float @llvm.experimental.constrained.fma.f32(float, float, float, metadata, metadata)
define float @f1(float %f1, float %f2, float %acc) { define float @f1(float %f1, float %f2, float %acc) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-SCALAR: maebr %f4, %f0, %f2 ; CHECK-SCALAR: maebr %f4, %f0, %f2
; CHECK-SCALAR: ler %f0, %f4 ; CHECK-SCALAR: ler %f0, %f4
; CHECK-VECTOR: wfmasb %f0, %f0, %f2, %f4 ; CHECK-VECTOR: wfmasb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f2(float %f1, float *%ptr, float %acc) { define float @f2(float %f1, float *%ptr, float %acc) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: maeb %f2, %f0, 0(%r2) ; CHECK: maeb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f3(float %f1, float *%base, float %acc) { define float @f3(float %f1, float *%base, float %acc) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: maeb %f2, %f0, 4092(%r2) ; CHECK: maeb %f2, %f0, 4092(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f4(float %f1, float *%base, float %acc) { define float @f4(float %f1, float *%base, float %acc) #0 {
; The important thing here is that we don't generate an out-of-range ; The important thing here is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: maeb %f2, %f0, 0(%r2) ; CHECK: maeb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f5(float %f1, float *%base, float %acc) { define float @f5(float %f1, float *%base, float %acc) #0 {
; Here too the important thing is that we don't generate an out-of-range ; Here too the important thing is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: maeb %f2, %f0, 0(%r2) ; CHECK: maeb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f6(float %f1, float *%base, i64 %index, float %acc) { define float @f6(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: maeb %f2, %f0, 0(%r1,%r2) ; CHECK: maeb %f2, %f0, 0(%r1,%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 %index %ptr = getelementptr float, float *%base, i64 %index
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f7(float %f1, float *%base, i64 %index, float %acc) { define float @f7(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: maeb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}}) ; CHECK: maeb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}})
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 1023 %index2 = add i64 %index, 1023
%ptr = getelementptr float, float *%base, i64 %index2 %ptr = getelementptr float, float *%base, i64 %index2
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f8(float %f1, float *%base, i64 %index, float %acc) { define float @f8(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}}) ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
; CHECK: maeb %f2, %f0, 0(%r1) ; CHECK: maeb %f2, %f0, 0(%r1)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 1024 %index2 = add i64 %index, 1024
%ptr = getelementptr float, float *%base, i64 %index2 %ptr = getelementptr float, float *%base, i64 %index2
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-07.ll

; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata) declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
define double @f1(double %f1, double %f2, double %acc) { define double @f1(double %f1, double %f2, double %acc) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-SCALAR: madbr %f4, %f0, %f2 ; CHECK-SCALAR: madbr %f4, %f0, %f2
; CHECK-SCALAR: ldr %f0, %f4 ; CHECK-SCALAR: ldr %f0, %f4
; CHECK-VECTOR: wfmadb %f0, %f0, %f2, %f4 ; CHECK-VECTOR: wfmadb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f2(double %f1, double *%ptr, double %acc) { define double @f2(double %f1, double *%ptr, double %acc) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: madb %f2, %f0, 0(%r2) ; CHECK: madb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f3(double %f1, double *%base, double %acc) { define double @f3(double %f1, double *%base, double %acc) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: madb %f2, %f0, 4088(%r2) ; CHECK: madb %f2, %f0, 4088(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f4(double %f1, double *%base, double %acc) { define double @f4(double %f1, double *%base, double %acc) #0 {
; The important thing here is that we don't generate an out-of-range ; The important thing here is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: madb %f2, %f0, 0(%r2) ; CHECK: madb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f5(double %f1, double *%base, double %acc) { define double @f5(double %f1, double *%base, double %acc) #0 {
; Here too the important thing is that we don't generate an out-of-range ; Here too the important thing is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: madb %f2, %f0, 0(%r2) ; CHECK: madb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f6(double %f1, double *%base, i64 %index, double %acc) { define double @f6(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: madb %f2, %f0, 0(%r1,%r2) ; CHECK: madb %f2, %f0, 0(%r1,%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 %index %ptr = getelementptr double, double *%base, i64 %index
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f7(double %f1, double *%base, i64 %index, double %acc) { define double @f7(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: madb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}}) ; CHECK: madb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}})
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 511 %index2 = add i64 %index, 511
%ptr = getelementptr double, double *%base, i64 %index2 %ptr = getelementptr double, double *%base, i64 %index2
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f8(double %f1, double *%base, i64 %index, double %acc) { define double @f8(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}}) ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
; CHECK: madb %f2, %f0, 0(%r1) ; CHECK: madb %f2, %f0, 0(%r1)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 512 %index2 = add i64 %index, 512
%ptr = getelementptr double, double *%base, i64 %index2 %ptr = getelementptr double, double *%base, i64 %index2
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-08.ll

; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata) declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata)
define float @f1(float %f1, float %f2, float %acc) { define float @f1(float %f1, float %f2, float %acc) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-SCALAR: msebr %f4, %f0, %f2 ; CHECK-SCALAR: msebr %f4, %f0, %f2
; CHECK-SCALAR: ler %f0, %f4 ; CHECK-SCALAR: ler %f0, %f4
; CHECK-VECTOR: wfmssb %f0, %f0, %f2, %f4 ; CHECK-VECTOR: wfmssb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f2(float %f1, float *%ptr, float %acc) { define float @f2(float %f1, float *%ptr, float %acc) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: mseb %f2, %f0, 0(%r2) ; CHECK: mseb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f3(float %f1, float *%base, float %acc) { define float @f3(float %f1, float *%base, float %acc) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: mseb %f2, %f0, 4092(%r2) ; CHECK: mseb %f2, %f0, 4092(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f4(float %f1, float *%base, float %acc) { define float @f4(float %f1, float *%base, float %acc) #0 {
; The important thing here is that we don't generate an out-of-range ; The important thing here is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: mseb %f2, %f0, 0(%r2) ; CHECK: mseb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f5(float %f1, float *%base, float %acc) { define float @f5(float %f1, float *%base, float %acc) #0 {
; Here too the important thing is that we don't generate an out-of-range ; Here too the important thing is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: mseb %f2, %f0, 0(%r2) ; CHECK: mseb %f2, %f0, 0(%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f6(float %f1, float *%base, i64 %index, float %acc) { define float @f6(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: mseb %f2, %f0, 0(%r1,%r2) ; CHECK: mseb %f2, %f0, 0(%r1,%r2)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 %index %ptr = getelementptr float, float *%base, i64 %index
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f7(float %f1, float *%base, i64 %index, float %acc) { define float @f7(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: mseb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}}) ; CHECK: mseb %f2, %f0, 4092({{%r1,%r2|%r2,%r1}})
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 1023 %index2 = add i64 %index, 1023
%ptr = getelementptr float, float *%base, i64 %index2 %ptr = getelementptr float, float *%base, i64 %index2
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f8(float %f1, float *%base, i64 %index, float %acc) { define float @f8(float %f1, float *%base, i64 %index, float %acc) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}}) ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
; CHECK: mseb %f2, %f0, 0(%r1) ; CHECK: mseb %f2, %f0, 0(%r1)
; CHECK-SCALAR: ler %f0, %f2 ; CHECK-SCALAR: ler %f0, %f2
; CHECK-VECTOR: ldr %f0, %f2 ; CHECK-VECTOR: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 1024 %index2 = add i64 %index, 1024
%ptr = getelementptr float, float *%base, i64 %index2 %ptr = getelementptr float, float *%base, i64 %index2
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-09.ll

; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata) declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
define double @f1(double %f1, double %f2, double %acc) { define double @f1(double %f1, double %f2, double %acc) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-SCALAR: msdbr %f4, %f0, %f2 ; CHECK-SCALAR: msdbr %f4, %f0, %f2
; CHECK-SCALAR: ldr %f0, %f4 ; CHECK-SCALAR: ldr %f0, %f4
; CHECK-VECTOR: wfmsdb %f0, %f0, %f2, %f4 ; CHECK-VECTOR: wfmsdb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f2(double %f1, double *%ptr, double %acc) { define double @f2(double %f1, double *%ptr, double %acc) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: msdb %f2, %f0, 0(%r2) ; CHECK: msdb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f3(double %f1, double *%base, double %acc) { define double @f3(double %f1, double *%base, double %acc) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: msdb %f2, %f0, 4088(%r2) ; CHECK: msdb %f2, %f0, 4088(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f4(double %f1, double *%base, double %acc) { define double @f4(double %f1, double *%base, double %acc) #0 {
; The important thing here is that we don't generate an out-of-range ; The important thing here is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: msdb %f2, %f0, 0(%r2) ; CHECK: msdb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f5(double %f1, double *%base, double %acc) { define double @f5(double %f1, double *%base, double %acc) #0 {
; Here too the important thing is that we don't generate an out-of-range ; Here too the important thing is that we don't generate an out-of-range
; displacement. Other sequences besides this one would be OK. ; displacement. Other sequences besides this one would be OK.
; ;
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: msdb %f2, %f0, 0(%r2) ; CHECK: msdb %f2, %f0, 0(%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f6(double %f1, double *%base, i64 %index, double %acc) { define double @f6(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: msdb %f2, %f0, 0(%r1,%r2) ; CHECK: msdb %f2, %f0, 0(%r1,%r2)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 %index %ptr = getelementptr double, double *%base, i64 %index
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f7(double %f1, double *%base, i64 %index, double %acc) { define double @f7(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: msdb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}}) ; CHECK: msdb %f2, %f0, 4088({{%r1,%r2|%r2,%r1}})
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 511 %index2 = add i64 %index, 511
%ptr = getelementptr double, double *%base, i64 %index2 %ptr = getelementptr double, double *%base, i64 %index2
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f8(double %f1, double *%base, i64 %index, double %acc) { define double @f8(double %f1, double *%base, i64 %index, double %acc) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}}) ; CHECK: lay %r1, 4096({{%r1,%r2|%r2,%r1}})
; CHECK: msdb %f2, %f0, 0(%r1) ; CHECK: msdb %f2, %f0, 0(%r1)
; CHECK: ldr %f0, %f2 ; CHECK: ldr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%index2 = add i64 %index, 512 %index2 = add i64 %index, 512
%ptr = getelementptr double, double *%base, i64 %index2 %ptr = getelementptr double, double *%base, i64 %index2
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-10.ll

; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata) declare double @llvm.experimental.constrained.fma.f64(double %f1, double %f2, double %f3, metadata, metadata)
declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata) declare float @llvm.experimental.constrained.fma.f32(float %f1, float %f2, float %f3, metadata, metadata)
define double @f1(double %f1, double %f2, double %acc) { define double @f1(double %f1, double %f2, double %acc) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: wfnmadb %f0, %f0, %f2, %f4 ; CHECK: wfnmadb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %acc, double %f1, double %f2, double %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negres = fsub double -0.0, %res %negres = fsub double -0.0, %res
ret double %negres ret double %negres
} }
define double @f2(double %f1, double %f2, double %acc) { define double @f2(double %f1, double %f2, double %acc) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfnmsdb %f0, %f0, %f2, %f4 ; CHECK: wfnmsdb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%negacc = fsub double -0.0, %acc %negacc = fsub double -0.0, %acc
%res = call double @llvm.experimental.constrained.fma.f64 ( %res = call double @llvm.experimental.constrained.fma.f64 (
double %f1, double %f2, double %negacc, double %f1, double %f2, double %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negres = fsub double -0.0, %res %negres = fsub double -0.0, %res
ret double %negres ret double %negres
} }
define float @f3(float %f1, float %f2, float %acc) { define float @f3(float %f1, float %f2, float %acc) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: wfnmasb %f0, %f0, %f2, %f4 ; CHECK: wfnmasb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %acc, float %f1, float %f2, float %acc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negres = fsub float -0.0, %res %negres = fsub float -0.0, %res
ret float %negres ret float %negres
} }
define float @f4(float %f1, float %f2, float %acc) { define float @f4(float %f1, float %f2, float %acc) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: wfnmssb %f0, %f0, %f2, %f4 ; CHECK: wfnmssb %f0, %f0, %f2, %f4
; CHECK: br %r14 ; CHECK: br %r14
%negacc = fsub float -0.0, %acc %negacc = fsub float -0.0, %acc
%res = call float @llvm.experimental.constrained.fma.f32 ( %res = call float @llvm.experimental.constrained.fma.f32 (
float %f1, float %f2, float %negacc, float %f1, float %f2, float %negacc,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negres = fsub float -0.0, %res %negres = fsub float -0.0, %res
ret float %negres ret float %negres
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-mul-11.ll

; Test strict 128-bit floating-point multiplication on z14. ; Test strict 128-bit floating-point multiplication on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fmul.f128(fp128, fp128, metadata, metadata)
define void @f1(fp128 *%ptr1, fp128 *%ptr2) { define void @f1(fp128 *%ptr1, fp128 *%ptr2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfmxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]] ; CHECK: wfmxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr1 %f1 = load fp128, fp128 *%ptr1
%f2 = load fp128, fp128 *%ptr2 %f2 = load fp128, fp128 *%ptr2
%sum = call fp128 @llvm.experimental.constrained.fmul.f128( %sum = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1, fp128 %f2, fp128 %f1, fp128 %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %sum, fp128 *%ptr1 store fp128 %sum, fp128 *%ptr1
ret void ret void
} }
define void @f2(double %f1, double %f2, fp128 *%dst) { define void @f2(double %f1, double %f2, fp128 *%dst) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK-DAG: wflld [[REG1:%v[0-9]+]], %f0 ; CHECK-DAG: wflld [[REG1:%v[0-9]+]], %f0
; CHECK-DAG: wflld [[REG2:%v[0-9]+]], %f2 ; CHECK-DAG: wflld [[REG2:%v[0-9]+]], %f2
; CHECK: wfmxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]] ; CHECK: wfmxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1x = fpext double %f1 to fp128 %f1x = fpext double %f1 to fp128
%f2x = fpext double %f2 to fp128 %f2x = fpext double %f2 to fp128
%res = call fp128 @llvm.experimental.constrained.fmul.f128( %res = call fp128 @llvm.experimental.constrained.fmul.f128(
fp128 %f1x, fp128 %f2x, fp128 %f1x, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%dst store fp128 %res, fp128 *%dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-round-01.ll

; Test strict rounding functions for z10. ; Test strict rounding functions for z10.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
; Test rint for f32. ; Test rint for f32.
declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
define float @f1(float %f) { define float @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: fiebr %f0, 0, %f0 ; CHECK: fiebr %f0, 0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.rint.f32( %res = call float @llvm.experimental.constrained.rint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test rint for f64. ; Test rint for f64.
declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
define double @f2(double %f) { define double @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: fidbr %f0, 0, %f0 ; CHECK: fidbr %f0, 0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.rint.f64( %res = call double @llvm.experimental.constrained.rint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test rint for f128. ; Test rint for f128.
declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
define void @f3(fp128 *%ptr) { define void @f3(fp128 *%ptr) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: fixbr %f0, 0, %f0 ; CHECK: fixbr %f0, 0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.rint.f128( %res = call fp128 @llvm.experimental.constrained.rint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test nearbyint for f32. ; Test nearbyint for f32.
declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
define float @f4(float %f) { define float @f4(float %f) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: brasl %r14, nearbyintf@PLT ; CHECK: brasl %r14, nearbyintf@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.nearbyint.f32( %res = call float @llvm.experimental.constrained.nearbyint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test nearbyint for f64. ; Test nearbyint for f64.
declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
define double @f5(double %f) { define double @f5(double %f) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: brasl %r14, nearbyint@PLT ; CHECK: brasl %r14, nearbyint@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.nearbyint.f64( %res = call double @llvm.experimental.constrained.nearbyint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test nearbyint for f128. ; Test nearbyint for f128.
declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
define void @f6(fp128 *%ptr) { define void @f6(fp128 *%ptr) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: brasl %r14, nearbyintl@PLT ; CHECK: brasl %r14, nearbyintl@PLT
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.nearbyint.f128( %res = call fp128 @llvm.experimental.constrained.nearbyint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test floor for f32. ; Test floor for f32.
declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
define float @f7(float %f) { define float @f7(float %f) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, floorf@PLT ; CHECK: brasl %r14, floorf@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.floor.f32( %res = call float @llvm.experimental.constrained.floor.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test floor for f64. ; Test floor for f64.
declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
define double @f8(double %f) { define double @f8(double %f) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: brasl %r14, floor@PLT ; CHECK: brasl %r14, floor@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.floor.f64( %res = call double @llvm.experimental.constrained.floor.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test floor for f128. ; Test floor for f128.
declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
define void @f9(fp128 *%ptr) { define void @f9(fp128 *%ptr) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: brasl %r14, floorl@PLT ; CHECK: brasl %r14, floorl@PLT
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.floor.f128( %res = call fp128 @llvm.experimental.constrained.floor.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test ceil for f32. ; Test ceil for f32.
declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
define float @f10(float %f) { define float @f10(float %f) #0 {
; CHECK-LABEL: f10: ; CHECK-LABEL: f10:
; CHECK: brasl %r14, ceilf@PLT ; CHECK: brasl %r14, ceilf@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.ceil.f32( %res = call float @llvm.experimental.constrained.ceil.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test ceil for f64. ; Test ceil for f64.
declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
define double @f11(double %f) { define double @f11(double %f) #0 {
; CHECK-LABEL: f11: ; CHECK-LABEL: f11:
; CHECK: brasl %r14, ceil@PLT ; CHECK: brasl %r14, ceil@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.ceil.f64( %res = call double @llvm.experimental.constrained.ceil.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test ceil for f128. ; Test ceil for f128.
declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
define void @f12(fp128 *%ptr) { define void @f12(fp128 *%ptr) #0 {
; CHECK-LABEL: f12: ; CHECK-LABEL: f12:
; CHECK: brasl %r14, ceill@PLT ; CHECK: brasl %r14, ceill@PLT
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.ceil.f128( %res = call fp128 @llvm.experimental.constrained.ceil.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test trunc for f32. ; Test trunc for f32.
declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
define float @f13(float %f) { define float @f13(float %f) #0 {
; CHECK-LABEL: f13: ; CHECK-LABEL: f13:
; CHECK: brasl %r14, truncf@PLT ; CHECK: brasl %r14, truncf@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.trunc.f32( %res = call float @llvm.experimental.constrained.trunc.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test trunc for f64. ; Test trunc for f64.
declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
define double @f14(double %f) { define double @f14(double %f) #0 {
; CHECK-LABEL: f14: ; CHECK-LABEL: f14:
; CHECK: brasl %r14, trunc@PLT ; CHECK: brasl %r14, trunc@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.trunc.f64( %res = call double @llvm.experimental.constrained.trunc.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test trunc for f128. ; Test trunc for f128.
declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
define void @f15(fp128 *%ptr) { define void @f15(fp128 *%ptr) #0 {
; CHECK-LABEL: f15: ; CHECK-LABEL: f15:
; CHECK: brasl %r14, truncl@PLT ; CHECK: brasl %r14, truncl@PLT
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.trunc.f128( %res = call fp128 @llvm.experimental.constrained.trunc.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test round for f32. ; Test round for f32.
declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
define float @f16(float %f) { define float @f16(float %f) #0 {
; CHECK-LABEL: f16: ; CHECK-LABEL: f16:
; CHECK: brasl %r14, roundf@PLT ; CHECK: brasl %r14, roundf@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.round.f32( %res = call float @llvm.experimental.constrained.round.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test round for f64. ; Test round for f64.
declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
define double @f17(double %f) { define double @f17(double %f) #0 {
; CHECK-LABEL: f17: ; CHECK-LABEL: f17:
; CHECK: brasl %r14, round@PLT ; CHECK: brasl %r14, round@PLT
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.round.f64( %res = call double @llvm.experimental.constrained.round.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test round for f128. ; Test round for f128.
declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
define void @f18(fp128 *%ptr) { define void @f18(fp128 *%ptr) #0 {
; CHECK-LABEL: f18: ; CHECK-LABEL: f18:
; CHECK: brasl %r14, roundl@PLT ; CHECK: brasl %r14, roundl@PLT
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.round.f128( %res = call fp128 @llvm.experimental.constrained.round.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-round-02.ll

; Test strict rounding functions for z196 and above. ; Test strict rounding functions for z196 and above.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-VECTOR %s
; Test rint for f32. ; Test rint for f32.
declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
define float @f1(float %f) { define float @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: fiebr %f0, 0, %f0 ; CHECK: fiebr %f0, 0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.rint.f32( %res = call float @llvm.experimental.constrained.rint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test rint for f64. ; Test rint for f64.
declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
define double @f2(double %f) { define double @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK-SCALAR: fidbr %f0, 0, %f0 ; CHECK-SCALAR: fidbr %f0, 0, %f0
; CHECK-VECTOR: fidbra %f0, 0, %f0, 0 ; CHECK-VECTOR: fidbra %f0, 0, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.rint.f64( %res = call double @llvm.experimental.constrained.rint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test rint for f128. ; Test rint for f128.
declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
define void @f3(fp128 *%ptr) { define void @f3(fp128 *%ptr) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: fixbr %f0, 0, %f0 ; CHECK: fixbr %f0, 0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.rint.f128( %res = call fp128 @llvm.experimental.constrained.rint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test nearbyint for f32. ; Test nearbyint for f32.
declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
define float @f4(float %f) { define float @f4(float %f) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: fiebra %f0, 0, %f0, 4 ; CHECK: fiebra %f0, 0, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.nearbyint.f32( %res = call float @llvm.experimental.constrained.nearbyint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test nearbyint for f64. ; Test nearbyint for f64.
declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
define double @f5(double %f) { define double @f5(double %f) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: fidbra %f0, 0, %f0, 4 ; CHECK: fidbra %f0, 0, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.nearbyint.f64( %res = call double @llvm.experimental.constrained.nearbyint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test nearbyint for f128. ; Test nearbyint for f128.
declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
define void @f6(fp128 *%ptr) { define void @f6(fp128 *%ptr) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: fixbra %f0, 0, %f0, 4 ; CHECK: fixbra %f0, 0, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.nearbyint.f128( %res = call fp128 @llvm.experimental.constrained.nearbyint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test floor for f32. ; Test floor for f32.
declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
define float @f7(float %f) { define float @f7(float %f) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: fiebra %f0, 7, %f0, 4 ; CHECK: fiebra %f0, 7, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.floor.f32( %res = call float @llvm.experimental.constrained.floor.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test floor for f64. ; Test floor for f64.
declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
define double @f8(double %f) { define double @f8(double %f) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: fidbra %f0, 7, %f0, 4 ; CHECK: fidbra %f0, 7, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.floor.f64( %res = call double @llvm.experimental.constrained.floor.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test floor for f128. ; Test floor for f128.
declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
define void @f9(fp128 *%ptr) { define void @f9(fp128 *%ptr) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: fixbra %f0, 7, %f0, 4 ; CHECK: fixbra %f0, 7, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.floor.f128( %res = call fp128 @llvm.experimental.constrained.floor.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test ceil for f32. ; Test ceil for f32.
declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
define float @f10(float %f) { define float @f10(float %f) #0 {
; CHECK-LABEL: f10: ; CHECK-LABEL: f10:
; CHECK: fiebra %f0, 6, %f0, 4 ; CHECK: fiebra %f0, 6, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.ceil.f32( %res = call float @llvm.experimental.constrained.ceil.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test ceil for f64. ; Test ceil for f64.
declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
define double @f11(double %f) { define double @f11(double %f) #0 {
; CHECK-LABEL: f11: ; CHECK-LABEL: f11:
; CHECK: fidbra %f0, 6, %f0, 4 ; CHECK: fidbra %f0, 6, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.ceil.f64( %res = call double @llvm.experimental.constrained.ceil.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test ceil for f128. ; Test ceil for f128.
declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
define void @f12(fp128 *%ptr) { define void @f12(fp128 *%ptr) #0 {
; CHECK-LABEL: f12: ; CHECK-LABEL: f12:
; CHECK: fixbra %f0, 6, %f0, 4 ; CHECK: fixbra %f0, 6, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.ceil.f128( %res = call fp128 @llvm.experimental.constrained.ceil.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test trunc for f32. ; Test trunc for f32.
declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
define float @f13(float %f) { define float @f13(float %f) #0 {
; CHECK-LABEL: f13: ; CHECK-LABEL: f13:
; CHECK: fiebra %f0, 5, %f0, 4 ; CHECK: fiebra %f0, 5, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.trunc.f32( %res = call float @llvm.experimental.constrained.trunc.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test trunc for f64. ; Test trunc for f64.
declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
define double @f14(double %f) { define double @f14(double %f) #0 {
; CHECK-LABEL: f14: ; CHECK-LABEL: f14:
; CHECK: fidbra %f0, 5, %f0, 4 ; CHECK: fidbra %f0, 5, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.trunc.f64( %res = call double @llvm.experimental.constrained.trunc.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test trunc for f128. ; Test trunc for f128.
declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
define void @f15(fp128 *%ptr) { define void @f15(fp128 *%ptr) #0 {
; CHECK-LABEL: f15: ; CHECK-LABEL: f15:
; CHECK: fixbra %f0, 5, %f0, 4 ; CHECK: fixbra %f0, 5, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.trunc.f128( %res = call fp128 @llvm.experimental.constrained.trunc.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test round for f32. ; Test round for f32.
declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
define float @f16(float %f) { define float @f16(float %f) #0 {
; CHECK-LABEL: f16: ; CHECK-LABEL: f16:
; CHECK: fiebra %f0, 1, %f0, 4 ; CHECK: fiebra %f0, 1, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.round.f32( %res = call float @llvm.experimental.constrained.round.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test round for f64. ; Test round for f64.
declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
define double @f17(double %f) { define double @f17(double %f) #0 {
; CHECK-LABEL: f17: ; CHECK-LABEL: f17:
; CHECK: fidbra %f0, 1, %f0, 4 ; CHECK: fidbra %f0, 1, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.round.f64( %res = call double @llvm.experimental.constrained.round.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test round for f128. ; Test round for f128.
declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
define void @f18(fp128 *%ptr) { define void @f18(fp128 *%ptr) #0 {
; CHECK-LABEL: f18: ; CHECK-LABEL: f18:
; CHECK: fixbra %f0, 1, %f0, 4 ; CHECK: fixbra %f0, 1, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.round.f128( %res = call fp128 @llvm.experimental.constrained.round.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-round-03.ll

; Test strict rounding functions for z14 and above. ; Test strict rounding functions for z14 and above.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
; Test rint for f32. ; Test rint for f32.
declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.rint.f32(float, metadata, metadata)
define float @f1(float %f) { define float @f1(float %f) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: fiebra %f0, 0, %f0, 0 ; CHECK: fiebra %f0, 0, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.rint.f32( %res = call float @llvm.experimental.constrained.rint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test rint for f64. ; Test rint for f64.
declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata)
define double @f2(double %f) { define double @f2(double %f) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: fidbra %f0, 0, %f0, 0 ; CHECK: fidbra %f0, 0, %f0, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.rint.f64( %res = call double @llvm.experimental.constrained.rint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test rint for f128. ; Test rint for f128.
declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.rint.f128(fp128, metadata, metadata)
define void @f3(fp128 *%ptr) { define void @f3(fp128 *%ptr) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 0, 0 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 0, 0
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.rint.f128( %res = call fp128 @llvm.experimental.constrained.rint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test nearbyint for f32. ; Test nearbyint for f32.
declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.nearbyint.f32(float, metadata, metadata)
define float @f4(float %f) { define float @f4(float %f) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: fiebra %f0, 0, %f0, 4 ; CHECK: fiebra %f0, 0, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.nearbyint.f32( %res = call float @llvm.experimental.constrained.nearbyint.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test nearbyint for f64. ; Test nearbyint for f64.
declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata)
define double @f5(double %f) { define double @f5(double %f) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: fidbra %f0, 0, %f0, 4 ; CHECK: fidbra %f0, 0, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.nearbyint.f64( %res = call double @llvm.experimental.constrained.nearbyint.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test nearbyint for f128. ; Test nearbyint for f128.
declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.nearbyint.f128(fp128, metadata, metadata)
define void @f6(fp128 *%ptr) { define void @f6(fp128 *%ptr) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 0 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 0
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.nearbyint.f128( %res = call fp128 @llvm.experimental.constrained.nearbyint.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test floor for f32. ; Test floor for f32.
declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.floor.f32(float, metadata, metadata)
define float @f7(float %f) { define float @f7(float %f) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: fiebra %f0, 7, %f0, 4 ; CHECK: fiebra %f0, 7, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.floor.f32( %res = call float @llvm.experimental.constrained.floor.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test floor for f64. ; Test floor for f64.
declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.floor.f64(double, metadata, metadata)
define double @f8(double %f) { define double @f8(double %f) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: fidbra %f0, 7, %f0, 4 ; CHECK: fidbra %f0, 7, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.floor.f64( %res = call double @llvm.experimental.constrained.floor.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test floor for f128. ; Test floor for f128.
declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.floor.f128(fp128, metadata, metadata)
define void @f9(fp128 *%ptr) { define void @f9(fp128 *%ptr) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 7 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 7
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.floor.f128( %res = call fp128 @llvm.experimental.constrained.floor.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test ceil for f32. ; Test ceil for f32.
declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.ceil.f32(float, metadata, metadata)
define float @f10(float %f) { define float @f10(float %f) #0 {
; CHECK-LABEL: f10: ; CHECK-LABEL: f10:
; CHECK: fiebra %f0, 6, %f0, 4 ; CHECK: fiebra %f0, 6, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.ceil.f32( %res = call float @llvm.experimental.constrained.ceil.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test ceil for f64. ; Test ceil for f64.
declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.ceil.f64(double, metadata, metadata)
define double @f11(double %f) { define double @f11(double %f) #0 {
; CHECK-LABEL: f11: ; CHECK-LABEL: f11:
; CHECK: fidbra %f0, 6, %f0, 4 ; CHECK: fidbra %f0, 6, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.ceil.f64( %res = call double @llvm.experimental.constrained.ceil.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test ceil for f128. ; Test ceil for f128.
declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.ceil.f128(fp128, metadata, metadata)
define void @f12(fp128 *%ptr) { define void @f12(fp128 *%ptr) #0 {
; CHECK-LABEL: f12: ; CHECK-LABEL: f12:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 6 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 6
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.ceil.f128( %res = call fp128 @llvm.experimental.constrained.ceil.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test trunc for f32. ; Test trunc for f32.
declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.trunc.f32(float, metadata, metadata)
define float @f13(float %f) { define float @f13(float %f) #0 {
; CHECK-LABEL: f13: ; CHECK-LABEL: f13:
; CHECK: fiebra %f0, 5, %f0, 4 ; CHECK: fiebra %f0, 5, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.trunc.f32( %res = call float @llvm.experimental.constrained.trunc.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test trunc for f64. ; Test trunc for f64.
declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.trunc.f64(double, metadata, metadata)
define double @f14(double %f) { define double @f14(double %f) #0 {
; CHECK-LABEL: f14: ; CHECK-LABEL: f14:
; CHECK: fidbra %f0, 5, %f0, 4 ; CHECK: fidbra %f0, 5, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.trunc.f64( %res = call double @llvm.experimental.constrained.trunc.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test trunc for f128. ; Test trunc for f128.
declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.trunc.f128(fp128, metadata, metadata)
define void @f15(fp128 *%ptr) { define void @f15(fp128 *%ptr) #0 {
; CHECK-LABEL: f15: ; CHECK-LABEL: f15:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 5 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 5
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.trunc.f128( %res = call fp128 @llvm.experimental.constrained.trunc.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
; Test round for f32. ; Test round for f32.
declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
define float @f16(float %f) { define float @f16(float %f) #0 {
; CHECK-LABEL: f16: ; CHECK-LABEL: f16:
; CHECK: fiebra %f0, 1, %f0, 4 ; CHECK: fiebra %f0, 1, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.round.f32( %res = call float @llvm.experimental.constrained.round.f32(
float %f, float %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Test round for f64. ; Test round for f64.
declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
define double @f17(double %f) { define double @f17(double %f) #0 {
; CHECK-LABEL: f17: ; CHECK-LABEL: f17:
; CHECK: fidbra %f0, 1, %f0, 4 ; CHECK: fidbra %f0, 1, %f0, 4
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.round.f64( %res = call double @llvm.experimental.constrained.round.f64(
double %f, double %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Test round for f128. ; Test round for f128.
declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.round.f128(fp128, metadata, metadata)
define void @f18(fp128 *%ptr) { define void @f18(fp128 *%ptr) #0 {
; CHECK-LABEL: f18: ; CHECK-LABEL: f18:
; CHECK: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 1 ; CHECK: wfixb [[RES:%v[0-9]+]], [[REG]], 4, 1
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%src = load fp128, fp128 *%ptr %src = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.round.f128( %res = call fp128 @llvm.experimental.constrained.round.f128(
fp128 %src, fp128 %src,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-sqrt-01.ll

; Test strict 32-bit square root. ; Test strict 32-bit square root.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
; Check register square root. ; Check register square root.
define float @f1(float %val) { define float @f1(float %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: sqebr %f0, %f0 ; CHECK: sqebr %f0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the low end of the SQEB range. ; Check the low end of the SQEB range.
define float @f2(float *%ptr) { define float @f2(float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: sqeb %f0, 0(%r2) ; CHECK: sqeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the high end of the aligned SQEB range. ; Check the high end of the aligned SQEB range.
define float @f3(float *%base) { define float @f3(float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: sqeb %f0, 4092(%r2) ; CHECK: sqeb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define float @f4(float *%base) { define float @f4(float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: sqeb %f0, 0(%r2) ; CHECK: sqeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define float @f5(float *%base) { define float @f5(float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: sqeb %f0, 0(%r2) ; CHECK: sqeb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%val = load float, float *%ptr %val = load float, float *%ptr
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that SQEB allows indices. ; Check that SQEB allows indices.
define float @f6(float *%base, i64 %index) { define float @f6(float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: sqeb %f0, 400(%r1,%r2) ; CHECK: sqeb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%val = load float, float *%ptr2 %val = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.sqrt.f32( %res = call float @llvm.experimental.constrained.sqrt.f32(
float %val, float %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-sqrt-02.ll

; Test strict 64-bit square root. ; Test strict 64-bit square root.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
; Check register square root. ; Check register square root.
define double @f1(double %val) { define double @f1(double %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: sqdbr %f0, %f0 ; CHECK: sqdbr %f0, %f0
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the SQDB range. ; Check the low end of the SQDB range.
define double @f2(double *%ptr) { define double @f2(double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: sqdb %f0, 0(%r2) ; CHECK: sqdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned SQDB range. ; Check the high end of the aligned SQDB range.
define double @f3(double *%base) { define double @f3(double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: sqdb %f0, 4088(%r2) ; CHECK: sqdb %f0, 4088(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(double *%base) { define double @f4(double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: sqdb %f0, 0(%r2) ; CHECK: sqdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(double *%base) { define double @f5(double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: sqdb %f0, 0(%r2) ; CHECK: sqdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%val = load double, double *%ptr %val = load double, double *%ptr
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that SQDB allows indices. ; Check that SQDB allows indices.
define double @f6(double *%base, i64 %index) { define double @f6(double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: sqdb %f0, 800(%r1,%r2) ; CHECK: sqdb %f0, 800(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%val = load double, double *%ptr2 %val = load double, double *%ptr2
%res = call double @llvm.experimental.constrained.sqrt.f64( %res = call double @llvm.experimental.constrained.sqrt.f64(
double %val, double %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-sqrt-03.ll

; Test strict 128-bit square root. ; Test strict 128-bit square root.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata)
; There's no memory form of SQXBR. ; There's no memory form of SQXBR.
define void @f1(fp128 *%ptr) { define void @f1(fp128 *%ptr) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: ld %f0, 0(%r2) ; CHECK: ld %f0, 0(%r2)
; CHECK: ld %f2, 8(%r2) ; CHECK: ld %f2, 8(%r2)
; CHECK: sqxbr %f0, %f0 ; CHECK: sqxbr %f0, %f0
; CHECK: std %f0, 0(%r2) ; CHECK: std %f0, 0(%r2)
; CHECK: std %f2, 8(%r2) ; CHECK: std %f2, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%orig = load fp128, fp128 *%ptr %orig = load fp128, fp128 *%ptr
%sqrt = call fp128 @llvm.experimental.constrained.sqrt.f128( %sqrt = call fp128 @llvm.experimental.constrained.sqrt.f128(
fp128 %orig, fp128 %orig,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sqrt, fp128 *%ptr store fp128 %sqrt, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-sqrt-04.ll

; Test strict 128-bit floating-point square root on z14. ; Test strict 128-bit floating-point square root on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.sqrt.f128(fp128, metadata, metadata)
define void @f1(fp128 *%ptr) { define void @f1(fp128 *%ptr) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: vl [[REG:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG:%v[0-9]+]], 0(%r2)
; CHECK: wfsqxb [[RES:%v[0-9]+]], [[REG]] ; CHECK: wfsqxb [[RES:%v[0-9]+]], [[REG]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f = load fp128, fp128 *%ptr %f = load fp128, fp128 *%ptr
%res = call fp128 @llvm.experimental.constrained.sqrt.f128( %res = call fp128 @llvm.experimental.constrained.sqrt.f128(
fp128 %f, fp128 %f,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %res, fp128 *%ptr store fp128 %res, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-sub-01.ll

; Test 32-bit floating-point strict subtraction. ; Test 32-bit floating-point strict subtraction.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @foo() declare float @foo()
declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
; Check register subtraction. ; Check register subtraction.
define float @f1(float %f1, float %f2) { define float @f1(float %f1, float %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: sebr %f0, %f2 ; CHECK: sebr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the low end of the SEB range. ; Check the low end of the SEB range.
define float @f2(float %f1, float *%ptr) { define float @f2(float %f1, float *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: seb %f0, 0(%r2) ; CHECK: seb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the high end of the aligned SEB range. ; Check the high end of the aligned SEB range.
define float @f3(float %f1, float *%base) { define float @f3(float %f1, float *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: seb %f0, 4092(%r2) ; CHECK: seb %f0, 4092(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1023 %ptr = getelementptr float, float *%base, i64 1023
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check the next word up, which needs separate address logic. ; Check the next word up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define float @f4(float %f1, float *%base) { define float @f4(float %f1, float *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: seb %f0, 0(%r2) ; CHECK: seb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 1024 %ptr = getelementptr float, float *%base, i64 1024
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define float @f5(float %f1, float *%base) { define float @f5(float %f1, float *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -4 ; CHECK: aghi %r2, -4
; CHECK: seb %f0, 0(%r2) ; CHECK: seb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr float, float *%base, i64 -1 %ptr = getelementptr float, float *%base, i64 -1
%f2 = load float, float *%ptr %f2 = load float, float *%ptr
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that SEB allows indices. ; Check that SEB allows indices.
define float @f6(float %f1, float *%base, i64 %index) { define float @f6(float %f1, float *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 2 ; CHECK: sllg %r1, %r3, 2
; CHECK: seb %f0, 400(%r1,%r2) ; CHECK: seb %f0, 400(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%base, i64 %index %ptr1 = getelementptr float, float *%base, i64 %index
%ptr2 = getelementptr float, float *%ptr1, i64 100 %ptr2 = getelementptr float, float *%ptr1, i64 100
%f2 = load float, float *%ptr2 %f2 = load float, float *%ptr2
%res = call float @llvm.experimental.constrained.fsub.f32( %res = call float @llvm.experimental.constrained.fsub.f32(
float %f1, float %f2, float %f1, float %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
; Check that subtractions of spilled values can use SEB rather than SEBR. ; Check that subtractions of spilled values can use SEB rather than SEBR.
define float @f7(float *%ptr0) { define float @f7(float *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: seb %f0, 16{{[04]}}(%r15) ; CHECK-SCALAR: seb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr float, float *%ptr0, i64 2 %ptr1 = getelementptr float, float *%ptr0, i64 2
%ptr2 = getelementptr float, float *%ptr0, i64 4 %ptr2 = getelementptr float, float *%ptr0, i64 4
%ptr3 = getelementptr float, float *%ptr0, i64 6 %ptr3 = getelementptr float, float *%ptr0, i64 6
%ptr4 = getelementptr float, float *%ptr0, i64 8 %ptr4 = getelementptr float, float *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load float, float *%ptr4 %val4 = load float, float *%ptr4
%val5 = load float, float *%ptr5 %val5 = load float, float *%ptr5
%val6 = load float, float *%ptr6 %val6 = load float, float *%ptr6
%val7 = load float, float *%ptr7 %val7 = load float, float *%ptr7
%val8 = load float, float *%ptr8 %val8 = load float, float *%ptr8
%val9 = load float, float *%ptr9 %val9 = load float, float *%ptr9
%val10 = load float, float *%ptr10 %val10 = load float, float *%ptr10
%ret = call float @foo() %ret = call float @foo() #0
%sub0 = call float @llvm.experimental.constrained.fsub.f32( %sub0 = call float @llvm.experimental.constrained.fsub.f32(
float %ret, float %val0, float %ret, float %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub1 = call float @llvm.experimental.constrained.fsub.f32( %sub1 = call float @llvm.experimental.constrained.fsub.f32(
float %sub0, float %val1, float %sub0, float %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub2 = call float @llvm.experimental.constrained.fsub.f32( %sub2 = call float @llvm.experimental.constrained.fsub.f32(
float %sub1, float %val2, float %sub1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub3 = call float @llvm.experimental.constrained.fsub.f32( %sub3 = call float @llvm.experimental.constrained.fsub.f32(
float %sub2, float %val3, float %sub2, float %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub4 = call float @llvm.experimental.constrained.fsub.f32( %sub4 = call float @llvm.experimental.constrained.fsub.f32(
float %sub3, float %val4, float %sub3, float %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub5 = call float @llvm.experimental.constrained.fsub.f32( %sub5 = call float @llvm.experimental.constrained.fsub.f32(
float %sub4, float %val5, float %sub4, float %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub6 = call float @llvm.experimental.constrained.fsub.f32( %sub6 = call float @llvm.experimental.constrained.fsub.f32(
float %sub5, float %val6, float %sub5, float %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub7 = call float @llvm.experimental.constrained.fsub.f32( %sub7 = call float @llvm.experimental.constrained.fsub.f32(
float %sub6, float %val7, float %sub6, float %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub8 = call float @llvm.experimental.constrained.fsub.f32( %sub8 = call float @llvm.experimental.constrained.fsub.f32(
float %sub7, float %val8, float %sub7, float %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub9 = call float @llvm.experimental.constrained.fsub.f32( %sub9 = call float @llvm.experimental.constrained.fsub.f32(
float %sub8, float %val9, float %sub8, float %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub10 = call float @llvm.experimental.constrained.fsub.f32( %sub10 = call float @llvm.experimental.constrained.fsub.f32(
float %sub9, float %val10, float %sub9, float %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %sub10 ret float %sub10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-sub-02.ll

; Test strict 64-bit floating-point subtraction. ; Test strict 64-bit floating-point subtraction.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \ ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 \
; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s ; RUN: | FileCheck -check-prefix=CHECK -check-prefix=CHECK-SCALAR %s
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @foo() declare double @foo()
declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
; Check register subtraction. ; Check register subtraction.
define double @f1(double %f1, double %f2) { define double @f1(double %f1, double %f2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: sdbr %f0, %f2 ; CHECK: sdbr %f0, %f2
; CHECK: br %r14 ; CHECK: br %r14
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the low end of the SDB range. ; Check the low end of the SDB range.
define double @f2(double %f1, double *%ptr) { define double @f2(double %f1, double *%ptr) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: sdb %f0, 0(%r2) ; CHECK: sdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the high end of the aligned SDB range. ; Check the high end of the aligned SDB range.
define double @f3(double %f1, double *%base) { define double @f3(double %f1, double *%base) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: sdb %f0, 4088(%r2) ; CHECK: sdb %f0, 4088(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 511 %ptr = getelementptr double, double *%base, i64 511
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check the next doubleword up, which needs separate address logic. ; Check the next doubleword up, which needs separate address logic.
; Other sequences besides this one would be OK. ; Other sequences besides this one would be OK.
define double @f4(double %f1, double *%base) { define double @f4(double %f1, double *%base) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: aghi %r2, 4096 ; CHECK: aghi %r2, 4096
; CHECK: sdb %f0, 0(%r2) ; CHECK: sdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 512 %ptr = getelementptr double, double *%base, i64 512
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check negative displacements, which also need separate address logic. ; Check negative displacements, which also need separate address logic.
define double @f5(double %f1, double *%base) { define double @f5(double %f1, double *%base) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: aghi %r2, -8 ; CHECK: aghi %r2, -8
; CHECK: sdb %f0, 0(%r2) ; CHECK: sdb %f0, 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr = getelementptr double, double *%base, i64 -1 %ptr = getelementptr double, double *%base, i64 -1
%f2 = load double, double *%ptr %f2 = load double, double *%ptr
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that SDB allows indices. ; Check that SDB allows indices.
define double @f6(double %f1, double *%base, i64 %index) { define double @f6(double %f1, double *%base, i64 %index) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: sllg %r1, %r3, 3 ; CHECK: sllg %r1, %r3, 3
; CHECK: sdb %f0, 800(%r1,%r2) ; CHECK: sdb %f0, 800(%r1,%r2)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%base, i64 %index %ptr1 = getelementptr double, double *%base, i64 %index
%ptr2 = getelementptr double, double *%ptr1, i64 100 %ptr2 = getelementptr double, double *%ptr1, i64 100
%f2 = load double, double *%ptr2 %f2 = load double, double *%ptr2
%res = call double @llvm.experimental.constrained.fsub.f64( %res = call double @llvm.experimental.constrained.fsub.f64(
double %f1, double %f2, double %f1, double %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
; Check that subtractions of spilled values can use SDB rather than SDBR. ; Check that subtractions of spilled values can use SDB rather than SDBR.
define double @f7(double *%ptr0) { define double @f7(double *%ptr0) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT ; CHECK: brasl %r14, foo@PLT
; CHECK-SCALAR: sdb %f0, 16{{[04]}}(%r15) ; CHECK-SCALAR: sdb %f0, 16{{[04]}}(%r15)
; CHECK: br %r14 ; CHECK: br %r14
%ptr1 = getelementptr double, double *%ptr0, i64 2 %ptr1 = getelementptr double, double *%ptr0, i64 2
%ptr2 = getelementptr double, double *%ptr0, i64 4 %ptr2 = getelementptr double, double *%ptr0, i64 4
%ptr3 = getelementptr double, double *%ptr0, i64 6 %ptr3 = getelementptr double, double *%ptr0, i64 6
%ptr4 = getelementptr double, double *%ptr0, i64 8 %ptr4 = getelementptr double, double *%ptr0, i64 8
Show All 11 Lines; CHECK: br %r14
%val4 = load double, double *%ptr4 %val4 = load double, double *%ptr4
%val5 = load double, double *%ptr5 %val5 = load double, double *%ptr5
%val6 = load double, double *%ptr6 %val6 = load double, double *%ptr6
%val7 = load double, double *%ptr7 %val7 = load double, double *%ptr7
%val8 = load double, double *%ptr8 %val8 = load double, double *%ptr8
%val9 = load double, double *%ptr9 %val9 = load double, double *%ptr9
%val10 = load double, double *%ptr10 %val10 = load double, double *%ptr10
%ret = call double @foo() %ret = call double @foo() #0
%sub0 = call double @llvm.experimental.constrained.fsub.f64( %sub0 = call double @llvm.experimental.constrained.fsub.f64(
double %ret, double %val0, double %ret, double %val0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub1 = call double @llvm.experimental.constrained.fsub.f64( %sub1 = call double @llvm.experimental.constrained.fsub.f64(
double %sub0, double %val1, double %sub0, double %val1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub2 = call double @llvm.experimental.constrained.fsub.f64( %sub2 = call double @llvm.experimental.constrained.fsub.f64(
double %sub1, double %val2, double %sub1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub3 = call double @llvm.experimental.constrained.fsub.f64( %sub3 = call double @llvm.experimental.constrained.fsub.f64(
double %sub2, double %val3, double %sub2, double %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub4 = call double @llvm.experimental.constrained.fsub.f64( %sub4 = call double @llvm.experimental.constrained.fsub.f64(
double %sub3, double %val4, double %sub3, double %val4,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub5 = call double @llvm.experimental.constrained.fsub.f64( %sub5 = call double @llvm.experimental.constrained.fsub.f64(
double %sub4, double %val5, double %sub4, double %val5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub6 = call double @llvm.experimental.constrained.fsub.f64( %sub6 = call double @llvm.experimental.constrained.fsub.f64(
double %sub5, double %val6, double %sub5, double %val6,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub7 = call double @llvm.experimental.constrained.fsub.f64( %sub7 = call double @llvm.experimental.constrained.fsub.f64(
double %sub6, double %val7, double %sub6, double %val7,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub8 = call double @llvm.experimental.constrained.fsub.f64( %sub8 = call double @llvm.experimental.constrained.fsub.f64(
double %sub7, double %val8, double %sub7, double %val8,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub9 = call double @llvm.experimental.constrained.fsub.f64( %sub9 = call double @llvm.experimental.constrained.fsub.f64(
double %sub8, double %val9, double %sub8, double %val9,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%sub10 = call double @llvm.experimental.constrained.fsub.f64( %sub10 = call double @llvm.experimental.constrained.fsub.f64(
double %sub9, double %val10, double %sub9, double %val10,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %sub10 ret double %sub10
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/fp-strict-sub-03.ll

; Test strict 128-bit floating-point subtraction. ; Test strict 128-bit floating-point subtraction.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata)
; There is no memory form of 128-bit subtraction. ; There is no memory form of 128-bit subtraction.
define void @f1(fp128 *%ptr, float %f2) { define void @f1(fp128 *%ptr, float %f2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: lxebr %f0, %f0 ; CHECK-DAG: lxebr %f0, %f0
; CHECK-DAG: ld %f1, 0(%r2) ; CHECK-DAG: ld %f1, 0(%r2)
; CHECK-DAG: ld %f3, 8(%r2) ; CHECK-DAG: ld %f3, 8(%r2)
; CHECK: sxbr %f1, %f0 ; CHECK: sxbr %f1, %f0
; CHECK: std %f1, 0(%r2) ; CHECK: std %f1, 0(%r2)
; CHECK: std %f3, 8(%r2) ; CHECK: std %f3, 8(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr %f1 = load fp128, fp128 *%ptr
%f2x = fpext float %f2 to fp128 %f2x = fpext float %f2 to fp128
%sum = call fp128 @llvm.experimental.constrained.fsub.f128( %sum = call fp128 @llvm.experimental.constrained.fsub.f128(
fp128 %f1, fp128 %f2x, fp128 %f1, fp128 %f2x,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr store fp128 %sum, fp128 *%ptr
ret void ret void
} }

llvm/test/CodeGen/SystemZ/fp-strict-sub-04.ll

; Test strict 128-bit floating-point subtraction on z14. ; Test strict 128-bit floating-point subtraction on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.fsub.f128(fp128, fp128, metadata, metadata)
define void @f1(fp128 *%ptr1, fp128 *%ptr2) { define void @f1(fp128 *%ptr1, fp128 *%ptr2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfsxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]] ; CHECK: wfsxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]]
; CHECK: vst [[RES]], 0(%r2) ; CHECK: vst [[RES]], 0(%r2)
; CHECK: br %r14 ; CHECK: br %r14
%f1 = load fp128, fp128 *%ptr1 %f1 = load fp128, fp128 *%ptr1
%f2 = load fp128, fp128 *%ptr2 %f2 = load fp128, fp128 *%ptr2
%sum = call fp128 @llvm.experimental.constrained.fsub.f128( %sum = call fp128 @llvm.experimental.constrained.fsub.f128(
fp128 %f1, fp128 %f2, fp128 %f1, fp128 %f2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
store fp128 %sum, fp128 *%ptr1 store fp128 %sum, fp128 *%ptr1
ret void ret void
} }

llvm/test/CodeGen/SystemZ/vec-strict-add-01.ll

; Test strict vector addition. ; Test strict vector addition.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
; Test a v2f64 addition. ; Test a v2f64 addition.
define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) strictfp {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfadb %v24, %v26, %v28 ; CHECK: vfadb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test an f64 addition that uses vector registers. ; Test an f64 addition that uses vector registers.
define double @f6(<2 x double> %val1, <2 x double> %val2) { define double @f6(<2 x double> %val1, <2 x double> %val2) strictfp {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: wfadb %f0, %v24, %v26 ; CHECK: wfadb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <2 x double> %val1, i32 0 %scalar1 = extractelement <2 x double> %val1, i32 0
%scalar2 = extractelement <2 x double> %val2, i32 0 %scalar2 = extractelement <2 x double> %val2, i32 0
%ret = call double @llvm.experimental.constrained.fadd.f64( %ret = call double @llvm.experimental.constrained.fadd.f64(
double %scalar1, double %scalar2, double %scalar1, double %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
ret double %ret ret double %ret
} }

llvm/test/CodeGen/SystemZ/vec-strict-add-02.ll

; Test strict vector addition on z14. ; Test strict vector addition on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fadd.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fadd.v4f32(<4 x float>, <4 x float>, metadata, metadata)
; Test a v4f32 addition. ; Test a v4f32 addition.
define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) strictfp {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfasb %v24, %v26, %v28 ; CHECK: vfasb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fadd.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.fadd.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test an f32 addition that uses vector registers. ; Test an f32 addition that uses vector registers.
define float @f2(<4 x float> %val1, <4 x float> %val2) { define float @f2(<4 x float> %val1, <4 x float> %val2) strictfp {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfasb %f0, %v24, %v26 ; CHECK: wfasb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <4 x float> %val1, i32 0 %scalar1 = extractelement <4 x float> %val1, i32 0
%scalar2 = extractelement <4 x float> %val2, i32 0 %scalar2 = extractelement <4 x float> %val2, i32 0
%ret = call float @llvm.experimental.constrained.fadd.f32( %ret = call float @llvm.experimental.constrained.fadd.f32(
float %scalar1, float %scalar2, float %scalar1, float %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") strictfp
ret float %ret ret float %ret
} }

llvm/test/CodeGen/SystemZ/vec-strict-conv-01.ll

; Test strict conversions between integer and float elements. ; Test strict conversions between integer and float elements.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist ; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist
declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double>, metadata) declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double>, metadata)
declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double>, metadata) declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double>, metadata)
declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double>, metadata) declare <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double>, metadata)
declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double>, metadata) declare <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double>, metadata)
declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float>, metadata) declare <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float>, metadata)
declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float>, metadata) declare <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float>, metadata)
; Test conversion of f64s to signed i64s. ; Test conversion of f64s to signed i64s.
define <2 x i64> @f1(<2 x double> %doubles) { define <2 x i64> @f1(<2 x double> %doubles) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vcgdb %v24, %v24, 0, 5 ; CHECK: vcgdb %v24, %v24, 0, 5
; CHECK: br %r14 ; CHECK: br %r14
%dwords = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double> %doubles, %dwords = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(<2 x double> %doubles,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %dwords ret <2 x i64> %dwords
} }
; Test conversion of f64s to unsigned i64s. ; Test conversion of f64s to unsigned i64s.
define <2 x i64> @f2(<2 x double> %doubles) { define <2 x i64> @f2(<2 x double> %doubles) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vclgdb %v24, %v24, 0, 5 ; CHECK: vclgdb %v24, %v24, 0, 5
; CHECK: br %r14 ; CHECK: br %r14
%dwords = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double> %doubles, %dwords = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(<2 x double> %doubles,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %dwords ret <2 x i64> %dwords
} }
; Test conversion of f64s to signed i32s, which must compile. ; Test conversion of f64s to signed i32s, which must compile.
define void @f5(<2 x double> %doubles, <2 x i32> *%ptr) { define void @f5(<2 x double> %doubles, <2 x i32> *%ptr) #0 {
%words = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double> %doubles, %words = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(<2 x double> %doubles,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <2 x i32> %words, <2 x i32> *%ptr store <2 x i32> %words, <2 x i32> *%ptr
ret void ret void
} }
; Test conversion of f64s to unsigned i32s, which must compile. ; Test conversion of f64s to unsigned i32s, which must compile.
define void @f6(<2 x double> %doubles, <2 x i32> *%ptr) { define void @f6(<2 x double> %doubles, <2 x i32> *%ptr) #0 {
%words = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double> %doubles, %words = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(<2 x double> %doubles,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <2 x i32> %words, <2 x i32> *%ptr store <2 x i32> %words, <2 x i32> *%ptr
ret void ret void
} }
; Test conversion of f32s to signed i64s, which must compile. ; Test conversion of f32s to signed i64s, which must compile.
define <2 x i64> @f9(<2 x float> *%ptr) { define <2 x i64> @f9(<2 x float> *%ptr) #0 {
%floats = load <2 x float>, <2 x float> *%ptr %floats = load <2 x float>, <2 x float> *%ptr
%dwords = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float> %floats, %dwords = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(<2 x float> %floats,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %dwords ret <2 x i64> %dwords
} }
; Test conversion of f32s to unsigned i64s, which must compile. ; Test conversion of f32s to unsigned i64s, which must compile.
define <2 x i64> @f10(<2 x float> *%ptr) { define <2 x i64> @f10(<2 x float> *%ptr) #0 {
%floats = load <2 x float>, <2 x float> *%ptr %floats = load <2 x float>, <2 x float> *%ptr
%dwords = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float> %floats, %dwords = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(<2 x float> %floats,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %dwords ret <2 x i64> %dwords
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-conv-03.ll

; Test strict conversions between integer and float elements on z15. ; Test strict conversions between integer and float elements on z15.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z15 | FileCheck %s
; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist ; FIXME: llvm.experimental.constrained.[su]itofp does not yet exist
declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float>, metadata) declare <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float>, metadata)
declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float>, metadata) declare <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float>, metadata)
; Test conversion of f32s to signed i32s. ; Test conversion of f32s to signed i32s.
define <4 x i32> @f1(<4 x float> %floats) { define <4 x i32> @f1(<4 x float> %floats) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vcfeb %v24, %v24, 0, 5 ; CHECK: vcfeb %v24, %v24, 0, 5
; CHECK: br %r14 ; CHECK: br %r14
%words = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float> %floats, %words = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(<4 x float> %floats,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %words ret <4 x i32> %words
} }
; Test conversion of f32s to unsigned i32s. ; Test conversion of f32s to unsigned i32s.
define <4 x i32> @f2(<4 x float> %floats) { define <4 x i32> @f2(<4 x float> %floats) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vclfeb %v24, %v24, 0, 5 ; CHECK: vclfeb %v24, %v24, 0, 5
; CHECK: br %r14 ; CHECK: br %r14
%words = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float> %floats, %words = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(<4 x float> %floats,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %words ret <4 x i32> %words
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-div-01.ll

; Test strict vector division. ; Test strict vector division.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
; Test a v2f64 division. ; Test a v2f64 division.
define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfddb %v24, %v26, %v28 ; CHECK: vfddb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test an f64 division that uses vector registers. ; Test an f64 division that uses vector registers.
define double @f6(<2 x double> %val1, <2 x double> %val2) { define double @f6(<2 x double> %val1, <2 x double> %val2) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: wfddb %f0, %v24, %v26 ; CHECK: wfddb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <2 x double> %val1, i32 0 %scalar1 = extractelement <2 x double> %val1, i32 0
%scalar2 = extractelement <2 x double> %val2, i32 0 %scalar2 = extractelement <2 x double> %val2, i32 0
%ret = call double @llvm.experimental.constrained.fdiv.f64( %ret = call double @llvm.experimental.constrained.fdiv.f64(
double %scalar1, double %scalar2, double %scalar1, double %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-div-02.ll

; Test strict vector division on z14. ; Test strict vector division on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fdiv.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fdiv.v4f32(<4 x float>, <4 x float>, metadata, metadata)
; Test a v4f32 division. ; Test a v4f32 division.
define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfdsb %v24, %v26, %v28 ; CHECK: vfdsb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.fdiv.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test an f32 division that uses vector registers. ; Test an f32 division that uses vector registers.
define float @f2(<4 x float> %val1, <4 x float> %val2) { define float @f2(<4 x float> %val1, <4 x float> %val2) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfdsb %f0, %v24, %v26 ; CHECK: wfdsb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <4 x float> %val1, i32 0 %scalar1 = extractelement <4 x float> %val1, i32 0
%scalar2 = extractelement <4 x float> %val2, i32 0 %scalar2 = extractelement <4 x float> %val2, i32 0
%ret = call float @llvm.experimental.constrained.fdiv.f32( %ret = call float @llvm.experimental.constrained.fdiv.f32(
float %scalar1, float %scalar2, float %scalar1, float %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-max-01.ll

; Test strict vector maximum on z14. ; Test strict vector maximum on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare double @llvm.experimental.constrained.maxnum.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.maxnum.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.maxnum.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.maxnum.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare float @llvm.experimental.constrained.maxnum.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.maxnum.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.maxnum.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.maxnum.v4f32(<4 x float>, <4 x float>, metadata, metadata)
declare fp128 @llvm.experimental.constrained.maxnum.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.maxnum.f128(fp128, fp128, metadata, metadata)
; Test the f64 maxnum intrinsic. ; Test the f64 maxnum intrinsic.
define double @f1(double %dummy, double %val1, double %val2) { define double @f1(double %dummy, double %val1, double %val2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: wfmaxdb %f0, %f2, %f4, 4 ; CHECK: wfmaxdb %f0, %f2, %f4, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call double @llvm.experimental.constrained.maxnum.f64( %ret = call double @llvm.experimental.constrained.maxnum.f64(
double %val1, double %val2, double %val1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
; Test the v2f64 maxnum intrinsic. ; Test the v2f64 maxnum intrinsic.
define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfmaxdb %v24, %v26, %v28, 4 ; CHECK: vfmaxdb %v24, %v26, %v28, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test the f32 maxnum intrinsic. ; Test the f32 maxnum intrinsic.
define float @f3(float %dummy, float %val1, float %val2) { define float @f3(float %dummy, float %val1, float %val2) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: wfmaxsb %f0, %f2, %f4, 4 ; CHECK: wfmaxsb %f0, %f2, %f4, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call float @llvm.experimental.constrained.maxnum.f32( %ret = call float @llvm.experimental.constrained.maxnum.f32(
float %val1, float %val2, float %val1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
; Test the v4f32 maxnum intrinsic. ; Test the v4f32 maxnum intrinsic.
define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfmaxsb %v24, %v26, %v28, 4 ; CHECK: vfmaxsb %v24, %v26, %v28, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.maxnum.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.maxnum.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test the f128 maxnum intrinsic. ; Test the f128 maxnum intrinsic.
define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) { define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4 ; CHECK: wfmaxxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4
; CHECK: vst [[RES]], 0(%r4) ; CHECK: vst [[RES]], 0(%r4)
; CHECK: br %r14 ; CHECK: br %r14
%val1 = load fp128, fp128* %ptr1 %val1 = load fp128, fp128* %ptr1
%val2 = load fp128, fp128* %ptr2 %val2 = load fp128, fp128* %ptr2
%res = call fp128 @llvm.experimental.constrained.maxnum.f128( %res = call fp128 @llvm.experimental.constrained.maxnum.f128(
fp128 %val1, fp128 %val2, fp128 %val1, fp128 %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128* %dst store fp128 %res, fp128* %dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-min-01.ll

; Test strict vector minimum on z14. ; Test strict vector minimum on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare double @llvm.experimental.constrained.minnum.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.minnum.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.minnum.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.minnum.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare float @llvm.experimental.constrained.minnum.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.minnum.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.minnum.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.minnum.v4f32(<4 x float>, <4 x float>, metadata, metadata)
declare fp128 @llvm.experimental.constrained.minnum.f128(fp128, fp128, metadata, metadata) declare fp128 @llvm.experimental.constrained.minnum.f128(fp128, fp128, metadata, metadata)
; Test the f64 minnum intrinsic. ; Test the f64 minnum intrinsic.
define double @f1(double %dummy, double %val1, double %val2) { define double @f1(double %dummy, double %val1, double %val2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: wfmindb %f0, %f2, %f4, 4 ; CHECK: wfmindb %f0, %f2, %f4, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call double @llvm.experimental.constrained.minnum.f64( %ret = call double @llvm.experimental.constrained.minnum.f64(
double %val1, double %val2, double %val1, double %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
; Test the v2f64 minnum intrinsic. ; Test the v2f64 minnum intrinsic.
define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfmindb %v24, %v26, %v28, 4 ; CHECK: vfmindb %v24, %v26, %v28, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.minnum.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test the f32 minnum intrinsic. ; Test the f32 minnum intrinsic.
define float @f3(float %dummy, float %val1, float %val2) { define float @f3(float %dummy, float %val1, float %val2) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: wfminsb %f0, %f2, %f4, 4 ; CHECK: wfminsb %f0, %f2, %f4, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call float @llvm.experimental.constrained.minnum.f32( %ret = call float @llvm.experimental.constrained.minnum.f32(
float %val1, float %val2, float %val1, float %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
; Test the v4f32 minnum intrinsic. ; Test the v4f32 minnum intrinsic.
define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfminsb %v24, %v26, %v28, 4 ; CHECK: vfminsb %v24, %v26, %v28, 4
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.minnum.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.minnum.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test the f128 minnum intrinsic. ; Test the f128 minnum intrinsic.
define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) { define void @f5(fp128 *%ptr1, fp128 *%ptr2, fp128 *%dst) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2) ; CHECK-DAG: vl [[REG1:%v[0-9]+]], 0(%r2)
; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3) ; CHECK-DAG: vl [[REG2:%v[0-9]+]], 0(%r3)
; CHECK: wfminxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4 ; CHECK: wfminxb [[RES:%v[0-9]+]], [[REG1]], [[REG2]], 4
; CHECK: vst [[RES]], 0(%r4) ; CHECK: vst [[RES]], 0(%r4)
; CHECK: br %r14 ; CHECK: br %r14
%val1 = load fp128, fp128* %ptr1 %val1 = load fp128, fp128* %ptr1
%val2 = load fp128, fp128* %ptr2 %val2 = load fp128, fp128* %ptr2
%res = call fp128 @llvm.experimental.constrained.minnum.f128( %res = call fp128 @llvm.experimental.constrained.minnum.f128(
fp128 %val1, fp128 %val2, fp128 %val1, fp128 %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store fp128 %res, fp128* %dst store fp128 %res, fp128* %dst
ret void ret void
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-mul-01.ll

; Test strict vector multiplication. ; Test strict vector multiplication.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
; Test a v2f64 multiplication. ; Test a v2f64 multiplication.
define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfmdb %v24, %v26, %v28 ; CHECK: vfmdb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test an f64 multiplication that uses vector registers. ; Test an f64 multiplication that uses vector registers.
define double @f6(<2 x double> %val1, <2 x double> %val2) { define double @f6(<2 x double> %val1, <2 x double> %val2) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: wfmdb %f0, %v24, %v26 ; CHECK: wfmdb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <2 x double> %val1, i32 0 %scalar1 = extractelement <2 x double> %val1, i32 0
%scalar2 = extractelement <2 x double> %val2, i32 0 %scalar2 = extractelement <2 x double> %val2, i32 0
%ret = call double @llvm.experimental.constrained.fmul.f64( %ret = call double @llvm.experimental.constrained.fmul.f64(
double %scalar1, double %scalar2, double %scalar1, double %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-mul-02.ll

; Test strict vector multiply-and-add. ; Test strict vector multiply-and-add.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
; Test a v2f64 multiply-and-add. ; Test a v2f64 multiply-and-add.
define <2 x double> @f4(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f4(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val3) { <2 x double> %val2, <2 x double> %val3) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfmadb %v24, %v26, %v28, %v30 ; CHECK: vfmadb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 ( %ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 (
<2 x double> %val1, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val2,
<2 x double> %val3, <2 x double> %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test a v2f64 multiply-and-subtract. ; Test a v2f64 multiply-and-subtract.
define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f5(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val3) { <2 x double> %val2, <2 x double> %val3) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfmsdb %v24, %v26, %v28, %v30 ; CHECK: vfmsdb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%negval3 = fsub <2 x double> <double -0.0, double -0.0>, %val3 %negval3 = fsub <2 x double> <double -0.0, double -0.0>, %val3
%ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 ( %ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 (
<2 x double> %val1, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val2,
<2 x double> %negval3, <2 x double> %negval3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-mul-03.ll

; Test strict vector multiplication on z14. ; Test strict vector multiplication on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fmul.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fmul.v4f32(<4 x float>, <4 x float>, metadata, metadata)
; Test a v4f32 multiplication. ; Test a v4f32 multiplication.
define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfmsb %v24, %v26, %v28 ; CHECK: vfmsb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fmul.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.fmul.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test an f32 multiplication that uses vector registers. ; Test an f32 multiplication that uses vector registers.
define float @f2(<4 x float> %val1, <4 x float> %val2) { define float @f2(<4 x float> %val1, <4 x float> %val2) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfmsb %f0, %v24, %v26 ; CHECK: wfmsb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <4 x float> %val1, i32 0 %scalar1 = extractelement <4 x float> %val1, i32 0
%scalar2 = extractelement <4 x float> %val2, i32 0 %scalar2 = extractelement <4 x float> %val2, i32 0
%ret = call float @llvm.experimental.constrained.fmul.f32( %ret = call float @llvm.experimental.constrained.fmul.f32(
float %scalar1, float %scalar2, float %scalar1, float %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-mul-04.ll

; Test strict vector multiply-and-add on z14. ; Test strict vector multiply-and-add on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
; Test a v4f32 multiply-and-add. ; Test a v4f32 multiply-and-add.
define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f1(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val3) { <4 x float> %val2, <4 x float> %val3) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfmasb %v24, %v26, %v28, %v30 ; CHECK: vfmasb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 ( %ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 (
<4 x float> %val1, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val2,
<4 x float> %val3, <4 x float> %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test a v4f32 multiply-and-subtract. ; Test a v4f32 multiply-and-subtract.
define <4 x float> @f2(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f2(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val3) { <4 x float> %val2, <4 x float> %val3) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfmssb %v24, %v26, %v28, %v30 ; CHECK: vfmssb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%negval3 = fsub <4 x float> <float -0.0, float -0.0, %negval3 = fsub <4 x float> <float -0.0, float -0.0,
float -0.0, float -0.0>, %val3 float -0.0, float -0.0>, %val3
%ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 ( %ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 (
<4 x float> %val1, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val2,
<4 x float> %negval3, <4 x float> %negval3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-mul-05.ll

; Test vector negative multiply-and-add on z14. ; Test vector negative multiply-and-add on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
; Test a v2f64 negative multiply-and-add. ; Test a v2f64 negative multiply-and-add.
define <2 x double> @f1(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f1(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val3) { <2 x double> %val2, <2 x double> %val3) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfnmadb %v24, %v26, %v28, %v30 ; CHECK: vfnmadb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 ( %ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 (
<2 x double> %val1, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val2,
<2 x double> %val3, <2 x double> %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negret = fsub <2 x double> <double -0.0, double -0.0>, %ret %negret = fsub <2 x double> <double -0.0, double -0.0>, %ret
ret <2 x double> %negret ret <2 x double> %negret
} }
; Test a v2f64 negative multiply-and-subtract. ; Test a v2f64 negative multiply-and-subtract.
define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f2(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val3) { <2 x double> %val2, <2 x double> %val3) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfnmsdb %v24, %v26, %v28, %v30 ; CHECK: vfnmsdb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%negval3 = fsub <2 x double> <double -0.0, double -0.0>, %val3 %negval3 = fsub <2 x double> <double -0.0, double -0.0>, %val3
%ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 ( %ret = call <2 x double> @llvm.experimental.constrained.fma.v2f64 (
<2 x double> %val1, <2 x double> %val1,
<2 x double> %val2, <2 x double> %val2,
<2 x double> %negval3, <2 x double> %negval3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negret = fsub <2 x double> <double -0.0, double -0.0>, %ret %negret = fsub <2 x double> <double -0.0, double -0.0>, %ret
ret <2 x double> %negret ret <2 x double> %negret
} }
; Test a v4f32 negative multiply-and-add. ; Test a v4f32 negative multiply-and-add.
define <4 x float> @f3(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f3(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val3) { <4 x float> %val2, <4 x float> %val3) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: vfnmasb %v24, %v26, %v28, %v30 ; CHECK: vfnmasb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 ( %ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 (
<4 x float> %val1, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val2,
<4 x float> %val3, <4 x float> %val3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negret = fsub <4 x float> <float -0.0, float -0.0, %negret = fsub <4 x float> <float -0.0, float -0.0,
float -0.0, float -0.0>, %ret float -0.0, float -0.0>, %ret
ret <4 x float> %negret ret <4 x float> %negret
} }
; Test a v4f32 negative multiply-and-subtract. ; Test a v4f32 negative multiply-and-subtract.
define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f4(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val3) { <4 x float> %val2, <4 x float> %val3) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfnmssb %v24, %v26, %v28, %v30 ; CHECK: vfnmssb %v24, %v26, %v28, %v30
; CHECK: br %r14 ; CHECK: br %r14
%negval3 = fsub <4 x float> <float -0.0, float -0.0, %negval3 = fsub <4 x float> <float -0.0, float -0.0,
float -0.0, float -0.0>, %val3 float -0.0, float -0.0>, %val3
%ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 ( %ret = call <4 x float> @llvm.experimental.constrained.fma.v4f32 (
<4 x float> %val1, <4 x float> %val1,
<4 x float> %val2, <4 x float> %val2,
<4 x float> %negval3, <4 x float> %negval3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%negret = fsub <4 x float> <float -0.0, float -0.0, %negret = fsub <4 x float> <float -0.0, float -0.0,
float -0.0, float -0.0>, %ret float -0.0, float -0.0>, %ret
ret <4 x float> %negret ret <4 x float> %negret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-round-01.ll

Show All 9 Lines
declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.round.f64(double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.rint.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.floor.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.ceil.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.trunc.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.round.v2f64(<2 x double>, metadata, metadata)
define <2 x double> @f1(<2 x double> %val) { define <2 x double> @f1(<2 x double> %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfidb %v24, %v24, 0, 0 ; CHECK: vfidb %v24, %v24, 0, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.rint.v2f64( %res = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define <2 x double> @f2(<2 x double> %val) { define <2 x double> @f2(<2 x double> %val) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfidb %v24, %v24, 4, 0 ; CHECK: vfidb %v24, %v24, 4, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64( %res = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define <2 x double> @f3(<2 x double> %val) { define <2 x double> @f3(<2 x double> %val) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: vfidb %v24, %v24, 4, 7 ; CHECK: vfidb %v24, %v24, 4, 7
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.floor.v2f64( %res = call <2 x double> @llvm.experimental.constrained.floor.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define <2 x double> @f4(<2 x double> %val) { define <2 x double> @f4(<2 x double> %val) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfidb %v24, %v24, 4, 6 ; CHECK: vfidb %v24, %v24, 4, 6
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.ceil.v2f64( %res = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define <2 x double> @f5(<2 x double> %val) { define <2 x double> @f5(<2 x double> %val) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfidb %v24, %v24, 4, 5 ; CHECK: vfidb %v24, %v24, 4, 5
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.trunc.v2f64( %res = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define <2 x double> @f6(<2 x double> %val) { define <2 x double> @f6(<2 x double> %val) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vfidb %v24, %v24, 4, 1 ; CHECK: vfidb %v24, %v24, 4, 1
; CHECK: br %r14 ; CHECK: br %r14
%res = call <2 x double> @llvm.experimental.constrained.round.v2f64( %res = call <2 x double> @llvm.experimental.constrained.round.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %res ret <2 x double> %res
} }
define double @f7(<2 x double> %val) { define double @f7(<2 x double> %val) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: wfidb %f0, %v24, 0, 0 ; CHECK: wfidb %f0, %v24, 0, 0
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.rint.f64( %res = call double @llvm.experimental.constrained.rint.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f8(<2 x double> %val) { define double @f8(<2 x double> %val) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: wfidb %f0, %v24, 4, 0 ; CHECK: wfidb %f0, %v24, 4, 0
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.nearbyint.f64( %res = call double @llvm.experimental.constrained.nearbyint.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f9(<2 x double> %val) { define double @f9(<2 x double> %val) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: wfidb %f0, %v24, 4, 7 ; CHECK: wfidb %f0, %v24, 4, 7
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.floor.f64( %res = call double @llvm.experimental.constrained.floor.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f10(<2 x double> %val) { define double @f10(<2 x double> %val) #0 {
; CHECK-LABEL: f10: ; CHECK-LABEL: f10:
; CHECK: wfidb %f0, %v24, 4, 6 ; CHECK: wfidb %f0, %v24, 4, 6
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.ceil.f64( %res = call double @llvm.experimental.constrained.ceil.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f11(<2 x double> %val) { define double @f11(<2 x double> %val) #0 {
; CHECK-LABEL: f11: ; CHECK-LABEL: f11:
; CHECK: wfidb %f0, %v24, 4, 5 ; CHECK: wfidb %f0, %v24, 4, 5
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.trunc.f64( %res = call double @llvm.experimental.constrained.trunc.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
define double @f12(<2 x double> %val) { define double @f12(<2 x double> %val) #0 {
; CHECK-LABEL: f12: ; CHECK-LABEL: f12:
; CHECK: wfidb %f0, %v24, 4, 1 ; CHECK: wfidb %f0, %v24, 4, 1
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%res = call double @llvm.experimental.constrained.round.f64( %res = call double @llvm.experimental.constrained.round.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %res ret double %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-round-02.ll

Show All 9 Lines
declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.round.f32(float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.rint.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.rint.v4f32(<4 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(<4 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.floor.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.floor.v4f32(<4 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.ceil.v4f32(<4 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.trunc.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.trunc.v4f32(<4 x float>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.round.v4f32(<4 x float>, metadata, metadata)
define <4 x float> @f1(<4 x float> %val) { define <4 x float> @f1(<4 x float> %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfisb %v24, %v24, 0, 0 ; CHECK: vfisb %v24, %v24, 0, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.rint.v4f32( %res = call <4 x float> @llvm.experimental.constrained.rint.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define <4 x float> @f2(<4 x float> %val) { define <4 x float> @f2(<4 x float> %val) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: vfisb %v24, %v24, 4, 0 ; CHECK: vfisb %v24, %v24, 4, 0
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32( %res = call <4 x float> @llvm.experimental.constrained.nearbyint.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define <4 x float> @f3(<4 x float> %val) { define <4 x float> @f3(<4 x float> %val) #0 {
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; CHECK: vfisb %v24, %v24, 4, 7 ; CHECK: vfisb %v24, %v24, 4, 7
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.floor.v4f32( %res = call <4 x float> @llvm.experimental.constrained.floor.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define <4 x float> @f4(<4 x float> %val) { define <4 x float> @f4(<4 x float> %val) #0 {
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; CHECK: vfisb %v24, %v24, 4, 6 ; CHECK: vfisb %v24, %v24, 4, 6
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.ceil.v4f32( %res = call <4 x float> @llvm.experimental.constrained.ceil.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define <4 x float> @f5(<4 x float> %val) { define <4 x float> @f5(<4 x float> %val) #0 {
; CHECK-LABEL: f5: ; CHECK-LABEL: f5:
; CHECK: vfisb %v24, %v24, 4, 5 ; CHECK: vfisb %v24, %v24, 4, 5
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.trunc.v4f32( %res = call <4 x float> @llvm.experimental.constrained.trunc.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define <4 x float> @f6(<4 x float> %val) { define <4 x float> @f6(<4 x float> %val) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vfisb %v24, %v24, 4, 1 ; CHECK: vfisb %v24, %v24, 4, 1
; CHECK: br %r14 ; CHECK: br %r14
%res = call <4 x float> @llvm.experimental.constrained.round.v4f32( %res = call <4 x float> @llvm.experimental.constrained.round.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %res ret <4 x float> %res
} }
define float @f7(<4 x float> %val) { define float @f7(<4 x float> %val) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: wfisb %f0, %v24, 0, 0 ; CHECK: wfisb %f0, %v24, 0, 0
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.rint.f32( %res = call float @llvm.experimental.constrained.rint.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f8(<4 x float> %val) { define float @f8(<4 x float> %val) #0 {
; CHECK-LABEL: f8: ; CHECK-LABEL: f8:
; CHECK: wfisb %f0, %v24, 4, 0 ; CHECK: wfisb %f0, %v24, 4, 0
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.nearbyint.f32( %res = call float @llvm.experimental.constrained.nearbyint.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f9(<4 x float> %val) { define float @f9(<4 x float> %val) #0 {
; CHECK-LABEL: f9: ; CHECK-LABEL: f9:
; CHECK: wfisb %f0, %v24, 4, 7 ; CHECK: wfisb %f0, %v24, 4, 7
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.floor.f32( %res = call float @llvm.experimental.constrained.floor.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f10(<4 x float> %val) { define float @f10(<4 x float> %val) #0 {
; CHECK-LABEL: f10: ; CHECK-LABEL: f10:
; CHECK: wfisb %f0, %v24, 4, 6 ; CHECK: wfisb %f0, %v24, 4, 6
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.ceil.f32( %res = call float @llvm.experimental.constrained.ceil.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f11(<4 x float> %val) { define float @f11(<4 x float> %val) #0 {
; CHECK-LABEL: f11: ; CHECK-LABEL: f11:
; CHECK: wfisb %f0, %v24, 4, 5 ; CHECK: wfisb %f0, %v24, 4, 5
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.trunc.f32( %res = call float @llvm.experimental.constrained.trunc.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
define float @f12(<4 x float> %val) { define float @f12(<4 x float> %val) #0 {
; CHECK-LABEL: f12: ; CHECK-LABEL: f12:
; CHECK: wfisb %f0, %v24, 4, 1 ; CHECK: wfisb %f0, %v24, 4, 1
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%res = call float @llvm.experimental.constrained.round.f32( %res = call float @llvm.experimental.constrained.round.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %res ret float %res
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-sqrt-01.ll

; Test f64 and v2f64 square root. ; Test f64 and v2f64 square root.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
define <2 x double> @f1(<2 x double> %val) { define <2 x double> @f1(<2 x double> %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfsqdb %v24, %v24 ; CHECK: vfsqdb %v24, %v24
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
<2 x double> %val, <2 x double> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
define double @f2(<2 x double> %val) { define double @f2(<2 x double> %val) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfsqdb %f0, %v24 ; CHECK: wfsqdb %f0, %v24
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <2 x double> %val, i32 0 %scalar = extractelement <2 x double> %val, i32 0
%ret = call double @llvm.experimental.constrained.sqrt.f64( %ret = call double @llvm.experimental.constrained.sqrt.f64(
double %scalar, double %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-sqrt-02.ll

; Test strict f32 and v4f32 square root on z14. ; Test strict f32 and v4f32 square root on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata) declare float @llvm.experimental.constrained.sqrt.f32(float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.sqrt.v4f32(<4 x float>, metadata, metadata)
define <4 x float> @f1(<4 x float> %val) { define <4 x float> @f1(<4 x float> %val) #0 {
; CHECK-LABEL: f1: ; CHECK-LABEL: f1:
; CHECK: vfsqsb %v24, %v24 ; CHECK: vfsqsb %v24, %v24
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.sqrt.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.sqrt.v4f32(
<4 x float> %val, <4 x float> %val,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
define float @f2(<4 x float> %val) { define float @f2(<4 x float> %val) #0 {
; CHECK-LABEL: f2: ; CHECK-LABEL: f2:
; CHECK: wfsqsb %f0, %v24 ; CHECK: wfsqsb %f0, %v24
; CHECK: br %r14 ; CHECK: br %r14
%scalar = extractelement <4 x float> %val, i32 0 %scalar = extractelement <4 x float> %val, i32 0
%ret = call float @llvm.experimental.constrained.sqrt.f32( %ret = call float @llvm.experimental.constrained.sqrt.f32(
float %scalar, float %scalar,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-sub-01.ll

; Test strict vector subtraction. ; Test strict vector subtraction.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z13 | FileCheck %s
declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
; Test a v2f64 subtraction. ; Test a v2f64 subtraction.
define <2 x double> @f6(<2 x double> %dummy, <2 x double> %val1, define <2 x double> @f6(<2 x double> %dummy, <2 x double> %val1,
<2 x double> %val2) { <2 x double> %val2) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vfsdb %v24, %v26, %v28 ; CHECK: vfsdb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %ret = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> %val1, <2 x double> %val2, <2 x double> %val1, <2 x double> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ret ret <2 x double> %ret
} }
; Test an f64 subtraction that uses vector registers. ; Test an f64 subtraction that uses vector registers.
define double @f7(<2 x double> %val1, <2 x double> %val2) { define double @f7(<2 x double> %val1, <2 x double> %val2) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: wfsdb %f0, %v24, %v26 ; CHECK: wfsdb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <2 x double> %val1, i32 0 %scalar1 = extractelement <2 x double> %val1, i32 0
%scalar2 = extractelement <2 x double> %val2, i32 0 %scalar2 = extractelement <2 x double> %val2, i32 0
%ret = call double @llvm.experimental.constrained.fsub.f64( %ret = call double @llvm.experimental.constrained.fsub.f64(
double %scalar1, double %scalar2, double %scalar1, double %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vec-strict-sub-02.ll

; Test strict vector subtraction on z14. ; Test strict vector subtraction on z14.
; ;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s ; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z14 | FileCheck %s
declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata) declare float @llvm.experimental.constrained.fsub.f32(float, float, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fsub.v4f32(<4 x float>, <4 x float>, metadata, metadata)
; Test a v4f32 subtraction. ; Test a v4f32 subtraction.
define <4 x float> @f6(<4 x float> %dummy, <4 x float> %val1, define <4 x float> @f6(<4 x float> %dummy, <4 x float> %val1,
<4 x float> %val2) { <4 x float> %val2) #0 {
; CHECK-LABEL: f6: ; CHECK-LABEL: f6:
; CHECK: vfssb %v24, %v26, %v28 ; CHECK: vfssb %v24, %v26, %v28
; CHECK: br %r14 ; CHECK: br %r14
%ret = call <4 x float> @llvm.experimental.constrained.fsub.v4f32( %ret = call <4 x float> @llvm.experimental.constrained.fsub.v4f32(
<4 x float> %val1, <4 x float> %val2, <4 x float> %val1, <4 x float> %val2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %ret ret <4 x float> %ret
} }
; Test an f32 subtraction that uses vector registers. ; Test an f32 subtraction that uses vector registers.
define float @f7(<4 x float> %val1, <4 x float> %val2) { define float @f7(<4 x float> %val1, <4 x float> %val2) #0 {
; CHECK-LABEL: f7: ; CHECK-LABEL: f7:
; CHECK: wfssb %f0, %v24, %v26 ; CHECK: wfssb %f0, %v24, %v26
; CHECK: br %r14 ; CHECK: br %r14
%scalar1 = extractelement <4 x float> %val1, i32 0 %scalar1 = extractelement <4 x float> %val1, i32 0
%scalar2 = extractelement <4 x float> %val2, i32 0 %scalar2 = extractelement <4 x float> %val2, i32 0
%ret = call float @llvm.experimental.constrained.fsub.f32( %ret = call float @llvm.experimental.constrained.fsub.f32(
float %scalar1, float %scalar2, float %scalar1, float %scalar2,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %ret ret float %ret
} }
attributes #0 = { strictfp }

llvm/test/CodeGen/SystemZ/vector-constrained-fp-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=s390x-linux-gnu < %s | FileCheck --check-prefix=S390X %s ; RUN: llc -O3 -mtriple=s390x-linux-gnu < %s | FileCheck --check-prefix=S390X %s
; RUN: llc -O3 -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck --check-prefix=SZ13 %s ; RUN: llc -O3 -mtriple=s390x-linux-gnu -mcpu=z13 < %s | FileCheck --check-prefix=SZ13 %s
define <1 x float> @constrained_vector_fdiv_v1f32() { define <1 x float> @constrained_vector_fdiv_v1f32() #0 {
; S390X-LABEL: constrained_vector_fdiv_v1f32: ; S390X-LABEL: constrained_vector_fdiv_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI0_0 ; S390X-NEXT: larl %r1, .LCPI0_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI0_1 ; S390X-NEXT: larl %r1, .LCPI0_1
; S390X-NEXT: deb %f0, 0(%r1) ; S390X-NEXT: deb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fdiv_v1f32: ; SZ13-LABEL: constrained_vector_fdiv_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI0_0 ; SZ13-NEXT: larl %r1, .LCPI0_0
; SZ13-NEXT: vgmf %v0, 2, 8 ; SZ13-NEXT: vgmf %v0, 2, 8
; SZ13-NEXT: deb %f0, 0(%r1) ; SZ13-NEXT: deb %f0, 0(%r1)
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32( %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %div ret <1 x float> %div
} }
define <2 x double> @constrained_vector_fdiv_v2f64() { define <2 x double> @constrained_vector_fdiv_v2f64() #0 {
; S390X-LABEL: constrained_vector_fdiv_v2f64: ; S390X-LABEL: constrained_vector_fdiv_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI1_0 ; S390X-NEXT: larl %r1, .LCPI1_0
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI1_1 ; S390X-NEXT: larl %r1, .LCPI1_1
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI1_2 ; S390X-NEXT: larl %r1, .LCPI1_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
Show All 9 Lines
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfddb %v24, %v1, %v0 ; SZ13-NEXT: vfddb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64( %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %div ret <2 x double> %div
} }
define <3 x float> @constrained_vector_fdiv_v3f32() { define <3 x float> @constrained_vector_fdiv_v3f32() #0 {
; S390X-LABEL: constrained_vector_fdiv_v3f32: ; S390X-LABEL: constrained_vector_fdiv_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI2_0 ; S390X-NEXT: larl %r1, .LCPI2_0
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI2_1 ; S390X-NEXT: larl %r1, .LCPI2_1
; S390X-NEXT: le %f4, 0(%r1) ; S390X-NEXT: le %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI2_2 ; S390X-NEXT: larl %r1, .LCPI2_2
; S390X-NEXT: le %f2, 0(%r1) ; S390X-NEXT: le %f2, 0(%r1)
Show All 19 Lines
; SZ13-NEXT: vmrhf %v0, %v2, %v3 ; SZ13-NEXT: vmrhf %v0, %v2, %v3
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32( %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %div ret <3 x float> %div
} }
define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) { define void @constrained_vector_fdiv_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fdiv_v3f64: ; S390X-LABEL: constrained_vector_fdiv_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 16(%r2) ; S390X-NEXT: ld %f0, 16(%r2)
; S390X-NEXT: ld %f1, 8(%r2) ; S390X-NEXT: ld %f1, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI3_0 ; S390X-NEXT: larl %r1, .LCPI3_0
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI3_1 ; S390X-NEXT: larl %r1, .LCPI3_1
; S390X-NEXT: ldeb %f3, 0(%r1) ; S390X-NEXT: ldeb %f3, 0(%r1)
Show All 20 Lines
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64( %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %div, <3 x double>* %a store <3 x double> %div, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fdiv_v4f64() { define <4 x double> @constrained_vector_fdiv_v4f64() #0 {
; S390X-LABEL: constrained_vector_fdiv_v4f64: ; S390X-LABEL: constrained_vector_fdiv_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI4_0 ; S390X-NEXT: larl %r1, .LCPI4_0
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_1 ; S390X-NEXT: larl %r1, .LCPI4_1
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI4_2 ; S390X-NEXT: larl %r1, .LCPI4_2
; S390X-NEXT: ldeb %f4, 0(%r1) ; S390X-NEXT: ldeb %f4, 0(%r1)
Show All 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64( %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %div ret <4 x double> %div
} }
define <1 x float> @constrained_vector_frem_v1f32() { define <1 x float> @constrained_vector_frem_v1f32() #0 {
; S390X-LABEL: constrained_vector_frem_v1f32: ; S390X-LABEL: constrained_vector_frem_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI5_0 ; S390X-NEXT: larl %r1, .LCPI5_0
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; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32( %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %rem ret <1 x float> %rem
} }
define <2 x double> @constrained_vector_frem_v2f64() { define <2 x double> @constrained_vector_frem_v2f64() #0 {
; S390X-LABEL: constrained_vector_frem_v2f64: ; S390X-LABEL: constrained_vector_frem_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
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; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 296(%r15) ; SZ13-NEXT: lmg %r14, %r15, 296(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64( %rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %rem ret <2 x double> %rem
} }
define <3 x float> @constrained_vector_frem_v3f32() { define <3 x float> @constrained_vector_frem_v3f32() #0 {
; S390X-LABEL: constrained_vector_frem_v3f32: ; S390X-LABEL: constrained_vector_frem_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
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; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 312(%r15) ; SZ13-NEXT: lmg %r14, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32( %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %rem ret <3 x float> %rem
} }
define void @constrained_vector_frem_v3f64(<3 x double>* %a) { define void @constrained_vector_frem_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_frem_v3f64: ; S390X-LABEL: constrained_vector_frem_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
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; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64( %rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %rem, <3 x double>* %a store <3 x double> %rem, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_frem_v4f64() { define <4 x double> @constrained_vector_frem_v4f64() #0 {
; S390X-LABEL: constrained_vector_frem_v4f64: ; S390X-LABEL: constrained_vector_frem_v4f64:
; S390X: # %bb.0: ; S390X: # %bb.0:
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -192 ; S390X-NEXT: aghi %r15, -192
; S390X-NEXT: .cfi_def_cfa_offset 352 ; S390X-NEXT: .cfi_def_cfa_offset 352
; S390X-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill
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; SZ13-NEXT: lmg %r14, %r15, 312(%r15) ; SZ13-NEXT: lmg %r14, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
%rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64( %rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %rem ret <4 x double> %rem
} }
define <1 x float> @constrained_vector_fmul_v1f32() { define <1 x float> @constrained_vector_fmul_v1f32() #0 {
; S390X-LABEL: constrained_vector_fmul_v1f32: ; S390X-LABEL: constrained_vector_fmul_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI10_0 ; S390X-NEXT: larl %r1, .LCPI10_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI10_1 ; S390X-NEXT: larl %r1, .LCPI10_1
; S390X-NEXT: meeb %f0, 0(%r1) ; S390X-NEXT: meeb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fmul_v1f32: ; SZ13-LABEL: constrained_vector_fmul_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 1, 1 ; SZ13-NEXT: vgmf %v0, 1, 1
; SZ13-NEXT: vgmf %v1, 1, 8 ; SZ13-NEXT: vgmf %v1, 1, 8
; SZ13-NEXT: meebr %f1, %f0 ; SZ13-NEXT: meebr %f1, %f0
; SZ13-NEXT: vlr %v24, %v1 ; SZ13-NEXT: vlr %v24, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32( %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 2.000000e+00>, <1 x float> <float 2.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %mul ret <1 x float> %mul
} }
define <2 x double> @constrained_vector_fmul_v2f64() { define <2 x double> @constrained_vector_fmul_v2f64() #0 {
; S390X-LABEL: constrained_vector_fmul_v2f64: ; S390X-LABEL: constrained_vector_fmul_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI11_0 ; S390X-NEXT: larl %r1, .LCPI11_0
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI11_1 ; S390X-NEXT: larl %r1, .LCPI11_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI11_2 ; S390X-NEXT: larl %r1, .LCPI11_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
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; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfmdb %v24, %v1, %v0 ; SZ13-NEXT: vfmdb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 2.000000e+00, double 3.000000e+00>, <2 x double> <double 2.000000e+00, double 3.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %mul ret <2 x double> %mul
} }
define <3 x float> @constrained_vector_fmul_v3f32() { define <3 x float> @constrained_vector_fmul_v3f32() #0 {
; S390X-LABEL: constrained_vector_fmul_v3f32: ; S390X-LABEL: constrained_vector_fmul_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI12_0 ; S390X-NEXT: larl %r1, .LCPI12_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI12_1 ; S390X-NEXT: larl %r1, .LCPI12_1
; S390X-NEXT: ler %f4, %f0 ; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: meeb %f4, 0(%r1) ; S390X-NEXT: meeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI12_2 ; S390X-NEXT: larl %r1, .LCPI12_2
Show All 18 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32( %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
<3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000, <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,
float 0x7FF0000000000000>, float 0x7FF0000000000000>,
<3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>, <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %mul ret <3 x float> %mul
} }
define void @constrained_vector_fmul_v3f64(<3 x double>* %a) { define void @constrained_vector_fmul_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fmul_v3f64: ; S390X-LABEL: constrained_vector_fmul_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2) ; S390X-NEXT: ld %f0, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI13_0 ; S390X-NEXT: larl %r1, .LCPI13_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ld %f2, 16(%r2)
; S390X-NEXT: mdbr %f0, %f1 ; S390X-NEXT: mdbr %f0, %f1
; S390X-NEXT: ldr %f3, %f1 ; S390X-NEXT: ldr %f3, %f1
Show All 18 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64( %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %mul, <3 x double>* %a store <3 x double> %mul, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fmul_v4f64() { define <4 x double> @constrained_vector_fmul_v4f64() #0 {
; S390X-LABEL: constrained_vector_fmul_v4f64: ; S390X-LABEL: constrained_vector_fmul_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI14_0 ; S390X-NEXT: larl %r1, .LCPI14_0
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_1 ; S390X-NEXT: larl %r1, .LCPI14_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI14_2 ; S390X-NEXT: larl %r1, .LCPI14_2
; S390X-NEXT: ldeb %f4, 0(%r1) ; S390X-NEXT: ldeb %f4, 0(%r1)
Show All 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64( %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 2.000000e+00, double 3.000000e+00, <4 x double> <double 2.000000e+00, double 3.000000e+00,
double 4.000000e+00, double 5.000000e+00>, double 4.000000e+00, double 5.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %mul ret <4 x double> %mul
} }
define <1 x float> @constrained_vector_fadd_v1f32() { define <1 x float> @constrained_vector_fadd_v1f32() #0 {
; S390X-LABEL: constrained_vector_fadd_v1f32: ; S390X-LABEL: constrained_vector_fadd_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI15_0 ; S390X-NEXT: larl %r1, .LCPI15_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI15_1 ; S390X-NEXT: larl %r1, .LCPI15_1
; S390X-NEXT: aeb %f0, 0(%r1) ; S390X-NEXT: aeb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fadd_v1f32: ; SZ13-LABEL: constrained_vector_fadd_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 8 ; SZ13-NEXT: vgmf %v0, 2, 8
; SZ13-NEXT: vgmf %v1, 1, 8 ; SZ13-NEXT: vgmf %v1, 1, 8
; SZ13-NEXT: aebr %f1, %f0 ; SZ13-NEXT: aebr %f1, %f0
; SZ13-NEXT: vlr %v24, %v1 ; SZ13-NEXT: vlr %v24, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32( %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.0>, <1 x float> <float 1.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %add ret <1 x float> %add
} }
define <2 x double> @constrained_vector_fadd_v2f64() { define <2 x double> @constrained_vector_fadd_v2f64() #0 {
; S390X-LABEL: constrained_vector_fadd_v2f64: ; S390X-LABEL: constrained_vector_fadd_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI16_0 ; S390X-NEXT: larl %r1, .LCPI16_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI16_2 ; S390X-NEXT: larl %r1, .LCPI16_2
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI16_1 ; S390X-NEXT: larl %r1, .LCPI16_1
; S390X-NEXT: ldr %f2, %f1 ; S390X-NEXT: ldr %f2, %f1
Show All 9 Lines
; SZ13-NEXT: vl %v1, 0(%r1), 3 ; SZ13-NEXT: vl %v1, 0(%r1), 3
; SZ13-NEXT: vfadb %v24, %v1, %v0 ; SZ13-NEXT: vfadb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %add ret <2 x double> %add
} }
define <3 x float> @constrained_vector_fadd_v3f32() { define <3 x float> @constrained_vector_fadd_v3f32() #0 {
; S390X-LABEL: constrained_vector_fadd_v3f32: ; S390X-LABEL: constrained_vector_fadd_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI17_0 ; S390X-NEXT: larl %r1, .LCPI17_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: lzer %f4 ; S390X-NEXT: lzer %f4
; S390X-NEXT: aebr %f4, %f0 ; S390X-NEXT: aebr %f4, %f0
; S390X-NEXT: larl %r1, .LCPI17_1 ; S390X-NEXT: larl %r1, .LCPI17_1
; S390X-NEXT: ler %f2, %f0 ; S390X-NEXT: ler %f2, %f0
Show All 16 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32( %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %add ret <3 x float> %add
} }
define void @constrained_vector_fadd_v3f64(<3 x double>* %a) { define void @constrained_vector_fadd_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fadd_v3f64: ; S390X-LABEL: constrained_vector_fadd_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2) ; S390X-NEXT: ld %f0, 8(%r2)
; S390X-NEXT: larl %r1, .LCPI18_0 ; S390X-NEXT: larl %r1, .LCPI18_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ld %f2, 16(%r2)
; S390X-NEXT: adbr %f0, %f1 ; S390X-NEXT: adbr %f0, %f1
; S390X-NEXT: ldr %f3, %f1 ; S390X-NEXT: ldr %f3, %f1
Show All 18 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64( %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %add, <3 x double>* %a store <3 x double> %add, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fadd_v4f64() { define <4 x double> @constrained_vector_fadd_v4f64() #0 {
; S390X-LABEL: constrained_vector_fadd_v4f64: ; S390X-LABEL: constrained_vector_fadd_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI19_0 ; S390X-NEXT: larl %r1, .LCPI19_0
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI19_1 ; S390X-NEXT: larl %r1, .LCPI19_1
; S390X-NEXT: ldr %f2, %f1 ; S390X-NEXT: ldr %f2, %f1
; S390X-NEXT: ldr %f6, %f1 ; S390X-NEXT: ldr %f6, %f1
; S390X-NEXT: adb %f6, 0(%r1) ; S390X-NEXT: adb %f6, 0(%r1)
Show All 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64( %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %add ret <4 x double> %add
} }
define <1 x float> @constrained_vector_fsub_v1f32() { define <1 x float> @constrained_vector_fsub_v1f32() #0 {
; S390X-LABEL: constrained_vector_fsub_v1f32: ; S390X-LABEL: constrained_vector_fsub_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI20_0 ; S390X-NEXT: larl %r1, .LCPI20_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI20_1 ; S390X-NEXT: larl %r1, .LCPI20_1
; S390X-NEXT: seb %f0, 0(%r1) ; S390X-NEXT: seb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v1f32: ; SZ13-LABEL: constrained_vector_fsub_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 8 ; SZ13-NEXT: vgmf %v0, 2, 8
; SZ13-NEXT: vgmf %v1, 1, 8 ; SZ13-NEXT: vgmf %v1, 1, 8
; SZ13-NEXT: sebr %f1, %f0 ; SZ13-NEXT: sebr %f1, %f0
; SZ13-NEXT: vlr %v24, %v1 ; SZ13-NEXT: vlr %v24, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32( %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sub ret <1 x float> %sub
} }
define <2 x double> @constrained_vector_fsub_v2f64() { define <2 x double> @constrained_vector_fsub_v2f64() #0 {
; S390X-LABEL: constrained_vector_fsub_v2f64: ; S390X-LABEL: constrained_vector_fsub_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI21_0 ; S390X-NEXT: larl %r1, .LCPI21_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI21_2 ; S390X-NEXT: larl %r1, .LCPI21_2
; S390X-NEXT: ldeb %f1, 0(%r1) ; S390X-NEXT: ldeb %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI21_1 ; S390X-NEXT: larl %r1, .LCPI21_1
; S390X-NEXT: ldr %f2, %f0 ; S390X-NEXT: ldr %f2, %f0
; S390X-NEXT: sdb %f2, 0(%r1) ; S390X-NEXT: sdb %f2, 0(%r1)
; S390X-NEXT: sdbr %f0, %f1 ; S390X-NEXT: sdbr %f0, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fsub_v2f64: ; SZ13-LABEL: constrained_vector_fsub_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI21_0 ; SZ13-NEXT: larl %r1, .LCPI21_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vgmg %v1, 12, 10 ; SZ13-NEXT: vgmg %v1, 12, 10
; SZ13-NEXT: vfsdb %v24, %v1, %v0 ; SZ13-NEXT: vfsdb %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sub ret <2 x double> %sub
} }
define <3 x float> @constrained_vector_fsub_v3f32() { define <3 x float> @constrained_vector_fsub_v3f32() #0 {
; S390X-LABEL: constrained_vector_fsub_v3f32: ; S390X-LABEL: constrained_vector_fsub_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI22_0 ; S390X-NEXT: larl %r1, .LCPI22_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: ler %f4, %f0 ; S390X-NEXT: ler %f4, %f0
; S390X-NEXT: larl %r1, .LCPI22_1 ; S390X-NEXT: larl %r1, .LCPI22_1
; S390X-NEXT: ler %f2, %f0 ; S390X-NEXT: ler %f2, %f0
; S390X-NEXT: seb %f2, 0(%r1) ; S390X-NEXT: seb %f2, 0(%r1)
Show All 19 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32( %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sub ret <3 x float> %sub
} }
define void @constrained_vector_fsub_v3f64(<3 x double>* %a) { define void @constrained_vector_fsub_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_fsub_v3f64: ; S390X-LABEL: constrained_vector_fsub_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI23_0 ; S390X-NEXT: larl %r1, .LCPI23_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: ld %f1, 8(%r2) ; S390X-NEXT: ld %f1, 8(%r2)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ld %f2, 16(%r2)
; S390X-NEXT: ldr %f3, %f0 ; S390X-NEXT: ldr %f3, %f0
; S390X-NEXT: sdb %f3, 0(%r2) ; S390X-NEXT: sdb %f3, 0(%r2)
Show All 17 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64( %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
<3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF>,
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %sub, <3 x double>* %a store <3 x double> %sub, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_fsub_v4f64() { define <4 x double> @constrained_vector_fsub_v4f64() #0 {
; S390X-LABEL: constrained_vector_fsub_v4f64: ; S390X-LABEL: constrained_vector_fsub_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI24_0 ; S390X-NEXT: larl %r1, .LCPI24_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI24_1 ; S390X-NEXT: larl %r1, .LCPI24_1
; S390X-NEXT: ldr %f6, %f0 ; S390X-NEXT: ldr %f6, %f0
; S390X-NEXT: sdb %f6, 0(%r1) ; S390X-NEXT: sdb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI24_2 ; S390X-NEXT: larl %r1, .LCPI24_2
Show All 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64( %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(
<4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sub ret <4 x double> %sub
} }
define <1 x float> @constrained_vector_sqrt_v1f32() { define <1 x float> @constrained_vector_sqrt_v1f32() #0 {
; S390X-LABEL: constrained_vector_sqrt_v1f32: ; S390X-LABEL: constrained_vector_sqrt_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI25_0 ; S390X-NEXT: larl %r1, .LCPI25_0
; S390X-NEXT: sqeb %f0, 0(%r1) ; S390X-NEXT: sqeb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sqrt_v1f32: ; SZ13-LABEL: constrained_vector_sqrt_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI25_0 ; SZ13-NEXT: larl %r1, .LCPI25_0
; SZ13-NEXT: sqeb %f0, 0(%r1) ; SZ13-NEXT: sqeb %f0, 0(%r1)
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32( %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sqrt ret <1 x float> %sqrt
} }
define <2 x double> @constrained_vector_sqrt_v2f64() { define <2 x double> @constrained_vector_sqrt_v2f64() #0 {
; S390X-LABEL: constrained_vector_sqrt_v2f64: ; S390X-LABEL: constrained_vector_sqrt_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI26_0 ; S390X-NEXT: larl %r1, .LCPI26_0
; S390X-NEXT: larl %r2, .LCPI26_1 ; S390X-NEXT: larl %r2, .LCPI26_1
; S390X-NEXT: ldeb %f0, 0(%r2) ; S390X-NEXT: ldeb %f0, 0(%r2)
; S390X-NEXT: sqdb %f2, 0(%r1) ; S390X-NEXT: sqdb %f2, 0(%r1)
; S390X-NEXT: sqdbr %f0, %f0 ; S390X-NEXT: sqdbr %f0, %f0
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_sqrt_v2f64: ; SZ13-LABEL: constrained_vector_sqrt_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI26_0 ; SZ13-NEXT: larl %r1, .LCPI26_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsqdb %v24, %v0 ; SZ13-NEXT: vfsqdb %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64( %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sqrt ret <2 x double> %sqrt
} }
define <3 x float> @constrained_vector_sqrt_v3f32() { define <3 x float> @constrained_vector_sqrt_v3f32() #0 {
; S390X-LABEL: constrained_vector_sqrt_v3f32: ; S390X-LABEL: constrained_vector_sqrt_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI27_0 ; S390X-NEXT: larl %r1, .LCPI27_0
; S390X-NEXT: sqeb %f4, 0(%r1) ; S390X-NEXT: sqeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI27_1 ; S390X-NEXT: larl %r1, .LCPI27_1
; S390X-NEXT: sqeb %f2, 0(%r1) ; S390X-NEXT: sqeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI27_2 ; S390X-NEXT: larl %r1, .LCPI27_2
; S390X-NEXT: sqeb %f0, 0(%r1) ; S390X-NEXT: sqeb %f0, 0(%r1)
Show All 10 Lines
; SZ13-NEXT: sqeb %f2, 0(%r1) ; SZ13-NEXT: sqeb %f2, 0(%r1)
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32( %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sqrt ret <3 x float> %sqrt
} }
define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) { define void @constrained_vector_sqrt_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_sqrt_v3f64: ; S390X-LABEL: constrained_vector_sqrt_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 8(%r2) ; S390X-NEXT: ld %f0, 8(%r2)
; S390X-NEXT: ld %f1, 16(%r2) ; S390X-NEXT: ld %f1, 16(%r2)
; S390X-NEXT: sqdb %f2, 0(%r2) ; S390X-NEXT: sqdb %f2, 0(%r2)
; S390X-NEXT: sqdbr %f0, %f0 ; S390X-NEXT: sqdbr %f0, %f0
; S390X-NEXT: sqdbr %f1, %f1 ; S390X-NEXT: sqdbr %f1, %f1
; S390X-NEXT: std %f1, 16(%r2) ; S390X-NEXT: std %f1, 16(%r2)
Show All 9 Lines
; SZ13-NEXT: vfsqdb %v0, %v0 ; SZ13-NEXT: vfsqdb %v0, %v0
; SZ13-NEXT: vst %v0, 0(%r2), 4 ; SZ13-NEXT: vst %v0, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64( %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %sqrt, <3 x double>* %a store <3 x double> %sqrt, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_sqrt_v4f64() { define <4 x double> @constrained_vector_sqrt_v4f64() #0 {
; S390X-LABEL: constrained_vector_sqrt_v4f64: ; S390X-LABEL: constrained_vector_sqrt_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI29_0 ; S390X-NEXT: larl %r1, .LCPI29_0
; S390X-NEXT: sqdb %f6, 0(%r1) ; S390X-NEXT: sqdb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI29_1 ; S390X-NEXT: larl %r1, .LCPI29_1
; S390X-NEXT: sqdb %f4, 0(%r1) ; S390X-NEXT: sqdb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI29_3 ; S390X-NEXT: larl %r1, .LCPI29_3
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
Show All 11 Lines
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfsqdb %v24, %v0 ; SZ13-NEXT: vfsqdb %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sqrt ret <4 x double> %sqrt
} }
define <1 x float> @constrained_vector_pow_v1f32() { define <1 x float> @constrained_vector_pow_v1f32() #0 {
; S390X-LABEL: constrained_vector_pow_v1f32: ; S390X-LABEL: constrained_vector_pow_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI30_0 ; S390X-NEXT: larl %r1, .LCPI30_0
Show All 20 Lines
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32( %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
<1 x float> <float 3.0>, <1 x float> <float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %pow ret <1 x float> %pow
} }
define <2 x double> @constrained_vector_pow_v2f64() { define <2 x double> @constrained_vector_pow_v2f64() #0 {
; S390X-LABEL: constrained_vector_pow_v2f64: ; S390X-LABEL: constrained_vector_pow_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 296(%r15) ; SZ13-NEXT: lmg %r14, %r15, 296(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64( %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
<2 x double> <double 3.0, double 3.0>, <2 x double> <double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %pow ret <2 x double> %pow
} }
define <3 x float> @constrained_vector_pow_v3f32() { define <3 x float> @constrained_vector_pow_v3f32() #0 {
; S390X-LABEL: constrained_vector_pow_v3f32: ; S390X-LABEL: constrained_vector_pow_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 312(%r15) ; SZ13-NEXT: lmg %r14, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32( %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
<3 x float> <float 3.0, float 3.0, float 3.0>, <3 x float> <float 3.0, float 3.0, float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %pow ret <3 x float> %pow
} }
define void @constrained_vector_pow_v3f64(<3 x double>* %a) { define void @constrained_vector_pow_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_pow_v3f64: ; S390X-LABEL: constrained_vector_pow_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -192 ; S390X-NEXT: aghi %r15, -192
; S390X-NEXT: .cfi_def_cfa_offset 352 ; S390X-NEXT: .cfi_def_cfa_offset 352
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; SZ13-NEXT: lmg %r13, %r15, 312(%r15) ; SZ13-NEXT: lmg %r13, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64( %pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64(
<3 x double> %b, <3 x double> %b,
<3 x double> <double 3.0, double 3.0, double 3.0>, <3 x double> <double 3.0, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %pow, <3 x double>* %a store <3 x double> %pow, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_pow_v4f64() { define <4 x double> @constrained_vector_pow_v4f64() #0 {
; S390X-LABEL: constrained_vector_pow_v4f64: ; S390X-LABEL: constrained_vector_pow_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -192 ; S390X-NEXT: aghi %r15, -192
; S390X-NEXT: .cfi_def_cfa_offset 352 ; S390X-NEXT: .cfi_def_cfa_offset 352
; S390X-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 184(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64( %pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
<4 x double> <double 3.0, double 3.0, <4 x double> <double 3.0, double 3.0,
double 3.0, double 3.0>, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %pow ret <4 x double> %pow
} }
define <1 x float> @constrained_vector_powi_v1f32() { define <1 x float> @constrained_vector_powi_v1f32() #0 {
; S390X-LABEL: constrained_vector_powi_v1f32: ; S390X-LABEL: constrained_vector_powi_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI35_0 ; S390X-NEXT: larl %r1, .LCPI35_0
Show All 18 Lines
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32( %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %powi ret <1 x float> %powi
} }
define <2 x double> @constrained_vector_powi_v2f64() { define <2 x double> @constrained_vector_powi_v2f64() #0 {
; S390X-LABEL: constrained_vector_powi_v2f64: ; S390X-LABEL: constrained_vector_powi_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 36 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64( %powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %powi ret <2 x double> %powi
} }
define <3 x float> @constrained_vector_powi_v3f32() { define <3 x float> @constrained_vector_powi_v3f32() #0 {
; S390X-LABEL: constrained_vector_powi_v3f32: ; S390X-LABEL: constrained_vector_powi_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32( %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %powi ret <3 x float> %powi
} }
define void @constrained_vector_powi_v3f64(<3 x double>* %a) { define void @constrained_vector_powi_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_powi_v3f64: ; S390X-LABEL: constrained_vector_powi_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
▲ Show 20 Lines • Show All 59 Lines • ▼ Show 20 Lines
; SZ13-NEXT: lmg %r13, %r15, 280(%r15) ; SZ13-NEXT: lmg %r13, %r15, 280(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64( %powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %powi, <3 x double>* %a store <3 x double> %powi, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_powi_v4f64() { define <4 x double> @constrained_vector_powi_v4f64() #0 {
; S390X-LABEL: constrained_vector_powi_v4f64: ; S390X-LABEL: constrained_vector_powi_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 72 Lines • ▼ Show 20 Lines
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64( %powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %powi ret <4 x double> %powi
} }
define <1 x float> @constrained_vector_sin_v1f32() { define <1 x float> @constrained_vector_sin_v1f32() #0 {
; S390X-LABEL: constrained_vector_sin_v1f32: ; S390X-LABEL: constrained_vector_sin_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI40_0 ; S390X-NEXT: larl %r1, .LCPI40_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32( %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sin ret <1 x float> %sin
} }
define <2 x double> @constrained_vector_sin_v2f64() { define <2 x double> @constrained_vector_sin_v2f64() #0 {
; S390X-LABEL: constrained_vector_sin_v2f64: ; S390X-LABEL: constrained_vector_sin_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64( %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sin ret <2 x double> %sin
} }
define <3 x float> @constrained_vector_sin_v3f32() { define <3 x float> @constrained_vector_sin_v3f32() #0 {
; S390X-LABEL: constrained_vector_sin_v3f32: ; S390X-LABEL: constrained_vector_sin_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32( %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sin ret <3 x float> %sin
} }
define void @constrained_vector_sin_v3f64(<3 x double>* %a) { define void @constrained_vector_sin_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_sin_v3f64: ; S390X-LABEL: constrained_vector_sin_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64( %sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %sin, <3 x double>* %a store <3 x double> %sin, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_sin_v4f64() { define <4 x double> @constrained_vector_sin_v4f64() #0 {
; S390X-LABEL: constrained_vector_sin_v4f64: ; S390X-LABEL: constrained_vector_sin_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64( %sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sin ret <4 x double> %sin
} }
define <1 x float> @constrained_vector_cos_v1f32() { define <1 x float> @constrained_vector_cos_v1f32() #0 {
; S390X-LABEL: constrained_vector_cos_v1f32: ; S390X-LABEL: constrained_vector_cos_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI45_0 ; S390X-NEXT: larl %r1, .LCPI45_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32( %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %cos ret <1 x float> %cos
} }
define <2 x double> @constrained_vector_cos_v2f64() { define <2 x double> @constrained_vector_cos_v2f64() #0 {
; S390X-LABEL: constrained_vector_cos_v2f64: ; S390X-LABEL: constrained_vector_cos_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64( %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %cos ret <2 x double> %cos
} }
define <3 x float> @constrained_vector_cos_v3f32() { define <3 x float> @constrained_vector_cos_v3f32() #0 {
; S390X-LABEL: constrained_vector_cos_v3f32: ; S390X-LABEL: constrained_vector_cos_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32( %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %cos ret <3 x float> %cos
} }
define void @constrained_vector_cos_v3f64(<3 x double>* %a) { define void @constrained_vector_cos_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_cos_v3f64: ; S390X-LABEL: constrained_vector_cos_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64( %cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %cos, <3 x double>* %a store <3 x double> %cos, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_cos_v4f64() { define <4 x double> @constrained_vector_cos_v4f64() #0 {
; S390X-LABEL: constrained_vector_cos_v4f64: ; S390X-LABEL: constrained_vector_cos_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64( %cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %cos ret <4 x double> %cos
} }
define <1 x float> @constrained_vector_exp_v1f32() { define <1 x float> @constrained_vector_exp_v1f32() #0 {
; S390X-LABEL: constrained_vector_exp_v1f32: ; S390X-LABEL: constrained_vector_exp_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI50_0 ; S390X-NEXT: larl %r1, .LCPI50_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32( %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %exp ret <1 x float> %exp
} }
define <2 x double> @constrained_vector_exp_v2f64() { define <2 x double> @constrained_vector_exp_v2f64() #0 {
; S390X-LABEL: constrained_vector_exp_v2f64: ; S390X-LABEL: constrained_vector_exp_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64( %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %exp ret <2 x double> %exp
} }
define <3 x float> @constrained_vector_exp_v3f32() { define <3 x float> @constrained_vector_exp_v3f32() #0 {
; S390X-LABEL: constrained_vector_exp_v3f32: ; S390X-LABEL: constrained_vector_exp_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32( %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %exp ret <3 x float> %exp
} }
define void @constrained_vector_exp_v3f64(<3 x double>* %a) { define void @constrained_vector_exp_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_exp_v3f64: ; S390X-LABEL: constrained_vector_exp_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64( %exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %exp, <3 x double>* %a store <3 x double> %exp, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_exp_v4f64() { define <4 x double> @constrained_vector_exp_v4f64() #0 {
; S390X-LABEL: constrained_vector_exp_v4f64: ; S390X-LABEL: constrained_vector_exp_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64( %exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %exp ret <4 x double> %exp
} }
define <1 x float> @constrained_vector_exp2_v1f32() { define <1 x float> @constrained_vector_exp2_v1f32() #0 {
; S390X-LABEL: constrained_vector_exp2_v1f32: ; S390X-LABEL: constrained_vector_exp2_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI55_0 ; S390X-NEXT: larl %r1, .LCPI55_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32( %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %exp2 ret <1 x float> %exp2
} }
define <2 x double> @constrained_vector_exp2_v2f64() { define <2 x double> @constrained_vector_exp2_v2f64() #0 {
; S390X-LABEL: constrained_vector_exp2_v2f64: ; S390X-LABEL: constrained_vector_exp2_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64( %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %exp2 ret <2 x double> %exp2
} }
define <3 x float> @constrained_vector_exp2_v3f32() { define <3 x float> @constrained_vector_exp2_v3f32() #0 {
; S390X-LABEL: constrained_vector_exp2_v3f32: ; S390X-LABEL: constrained_vector_exp2_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32( %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %exp2 ret <3 x float> %exp2
} }
define void @constrained_vector_exp2_v3f64(<3 x double>* %a) { define void @constrained_vector_exp2_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_exp2_v3f64: ; S390X-LABEL: constrained_vector_exp2_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64( %exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %exp2, <3 x double>* %a store <3 x double> %exp2, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_exp2_v4f64() { define <4 x double> @constrained_vector_exp2_v4f64() #0 {
; S390X-LABEL: constrained_vector_exp2_v4f64: ; S390X-LABEL: constrained_vector_exp2_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64( %exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %exp2 ret <4 x double> %exp2
} }
define <1 x float> @constrained_vector_log_v1f32() { define <1 x float> @constrained_vector_log_v1f32() #0 {
; S390X-LABEL: constrained_vector_log_v1f32: ; S390X-LABEL: constrained_vector_log_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI60_0 ; S390X-NEXT: larl %r1, .LCPI60_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log = call <1 x float> @llvm.experimental.constrained.log.v1f32( %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log ret <1 x float> %log
} }
define <2 x double> @constrained_vector_log_v2f64() { define <2 x double> @constrained_vector_log_v2f64() #0 {
; S390X-LABEL: constrained_vector_log_v2f64: ; S390X-LABEL: constrained_vector_log_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log = call <2 x double> @llvm.experimental.constrained.log.v2f64( %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log ret <2 x double> %log
} }
define <3 x float> @constrained_vector_log_v3f32() { define <3 x float> @constrained_vector_log_v3f32() #0 {
; S390X-LABEL: constrained_vector_log_v3f32: ; S390X-LABEL: constrained_vector_log_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log = call <3 x float> @llvm.experimental.constrained.log.v3f32( %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log ret <3 x float> %log
} }
define void @constrained_vector_log_v3f64(<3 x double>* %a) { define void @constrained_vector_log_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_log_v3f64: ; S390X-LABEL: constrained_vector_log_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%log = call <3 x double> @llvm.experimental.constrained.log.v3f64( %log = call <3 x double> @llvm.experimental.constrained.log.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %log, <3 x double>* %a store <3 x double> %log, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_log_v4f64() { define <4 x double> @constrained_vector_log_v4f64() #0 {
; S390X-LABEL: constrained_vector_log_v4f64: ; S390X-LABEL: constrained_vector_log_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log = call <4 x double> @llvm.experimental.constrained.log.v4f64( %log = call <4 x double> @llvm.experimental.constrained.log.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log ret <4 x double> %log
} }
define <1 x float> @constrained_vector_log10_v1f32() { define <1 x float> @constrained_vector_log10_v1f32() #0 {
; S390X-LABEL: constrained_vector_log10_v1f32: ; S390X-LABEL: constrained_vector_log10_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI65_0 ; S390X-NEXT: larl %r1, .LCPI65_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32( %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log10 ret <1 x float> %log10
} }
define <2 x double> @constrained_vector_log10_v2f64() { define <2 x double> @constrained_vector_log10_v2f64() #0 {
; S390X-LABEL: constrained_vector_log10_v2f64: ; S390X-LABEL: constrained_vector_log10_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64( %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log10 ret <2 x double> %log10
} }
define <3 x float> @constrained_vector_log10_v3f32() { define <3 x float> @constrained_vector_log10_v3f32() #0 {
; S390X-LABEL: constrained_vector_log10_v3f32: ; S390X-LABEL: constrained_vector_log10_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32( %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log10 ret <3 x float> %log10
} }
define void @constrained_vector_log10_v3f64(<3 x double>* %a) { define void @constrained_vector_log10_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_log10_v3f64: ; S390X-LABEL: constrained_vector_log10_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
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; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64( %log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %log10, <3 x double>* %a store <3 x double> %log10, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_log10_v4f64() { define <4 x double> @constrained_vector_log10_v4f64() #0 {
; S390X-LABEL: constrained_vector_log10_v4f64: ; S390X-LABEL: constrained_vector_log10_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
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; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64( %log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log10 ret <4 x double> %log10
} }
define <1 x float> @constrained_vector_log2_v1f32() { define <1 x float> @constrained_vector_log2_v1f32() #0 {
; S390X-LABEL: constrained_vector_log2_v1f32: ; S390X-LABEL: constrained_vector_log2_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI70_0 ; S390X-NEXT: larl %r1, .LCPI70_0
Show All 15 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32( %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log2 ret <1 x float> %log2
} }
define <2 x double> @constrained_vector_log2_v2f64() { define <2 x double> @constrained_vector_log2_v2f64() #0 {
; S390X-LABEL: constrained_vector_log2_v2f64: ; S390X-LABEL: constrained_vector_log2_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 31 Lines
; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0 ; SZ13-NEXT: # kill: def $f0d killed $f0d def $v0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64( %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log2 ret <2 x double> %log2
} }
define <3 x float> @constrained_vector_log2_v3f32() { define <3 x float> @constrained_vector_log2_v3f32() #0 {
; S390X-LABEL: constrained_vector_log2_v3f32: ; S390X-LABEL: constrained_vector_log2_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vrepf %v1, %v1, 0 ; SZ13-NEXT: vrepf %v1, %v1, 0
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32( %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log2 ret <3 x float> %log2
} }
define void @constrained_vector_log2_v3f64(<3 x double>* %a) { define void @constrained_vector_log2_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_log2_v3f64: ; S390X-LABEL: constrained_vector_log2_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vst %v0, 0(%r13), 4 ; SZ13-NEXT: vst %v0, 0(%r13), 4
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64( %log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %log2, <3 x double>* %a store <3 x double> %log2, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_log2_v4f64() { define <4 x double> @constrained_vector_log2_v4f64() #0 {
; S390X-LABEL: constrained_vector_log2_v4f64: ; S390X-LABEL: constrained_vector_log2_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 63 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v26, %v0, %v1 ; SZ13-NEXT: vmrhg %v26, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 304(%r15) ; SZ13-NEXT: lmg %r14, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64( %log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log2 ret <4 x double> %log2
} }
define <1 x float> @constrained_vector_rint_v1f32() { define <1 x float> @constrained_vector_rint_v1f32() #0 {
; S390X-LABEL: constrained_vector_rint_v1f32: ; S390X-LABEL: constrained_vector_rint_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI75_0 ; S390X-NEXT: larl %r1, .LCPI75_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: fiebr %f0, 0, %f0 ; S390X-NEXT: fiebr %f0, 0, %f0
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v1f32: ; SZ13-LABEL: constrained_vector_rint_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI75_0 ; SZ13-NEXT: larl %r1, .LCPI75_0
; SZ13-NEXT: lde %f0, 0(%r1) ; SZ13-NEXT: lde %f0, 0(%r1)
; SZ13-NEXT: fiebr %f0, 0, %f0 ; SZ13-NEXT: fiebr %f0, 0, %f0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32( %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %rint ret <1 x float> %rint
} }
define <2 x double> @constrained_vector_rint_v2f64() { define <2 x double> @constrained_vector_rint_v2f64() #0 {
; S390X-LABEL: constrained_vector_rint_v2f64: ; S390X-LABEL: constrained_vector_rint_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI76_0 ; S390X-NEXT: larl %r1, .LCPI76_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI76_1 ; S390X-NEXT: larl %r1, .LCPI76_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: fidbr %f2, 0, %f0 ; S390X-NEXT: fidbr %f2, 0, %f0
; S390X-NEXT: fidbr %f0, 0, %f1 ; S390X-NEXT: fidbr %f0, 0, %f1
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_rint_v2f64: ; SZ13-LABEL: constrained_vector_rint_v2f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI76_0 ; SZ13-NEXT: larl %r1, .LCPI76_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 0, 0 ; SZ13-NEXT: vfidb %v24, %v0, 0, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64( %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %rint ret <2 x double> %rint
} }
define <3 x float> @constrained_vector_rint_v3f32() { define <3 x float> @constrained_vector_rint_v3f32() #0 {
; S390X-LABEL: constrained_vector_rint_v3f32: ; S390X-LABEL: constrained_vector_rint_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI77_0 ; S390X-NEXT: larl %r1, .LCPI77_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI77_1 ; S390X-NEXT: larl %r1, .LCPI77_1
; S390X-NEXT: le %f1, 0(%r1) ; S390X-NEXT: le %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI77_2 ; S390X-NEXT: larl %r1, .LCPI77_2
; S390X-NEXT: le %f3, 0(%r1) ; S390X-NEXT: le %f3, 0(%r1)
Show All 16 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32( %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %rint ret <3 x float> %rint
} }
define void @constrained_vector_rint_v3f64(<3 x double>* %a) { define void @constrained_vector_rint_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_rint_v3f64: ; S390X-LABEL: constrained_vector_rint_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 0(%r2)
; S390X-NEXT: ld %f1, 8(%r2) ; S390X-NEXT: ld %f1, 8(%r2)
; S390X-NEXT: ld %f2, 16(%r2) ; S390X-NEXT: ld %f2, 16(%r2)
; S390X-NEXT: fidbr %f0, 0, %f0 ; S390X-NEXT: fidbr %f0, 0, %f0
; S390X-NEXT: fidbr %f1, 0, %f1 ; S390X-NEXT: fidbr %f1, 0, %f1
; S390X-NEXT: fidbr %f2, 0, %f2 ; S390X-NEXT: fidbr %f2, 0, %f2
Show All 11 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64( %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %rint, <3 x double>* %a store <3 x double> %rint, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_rint_v4f64() { define <4 x double> @constrained_vector_rint_v4f64() #0 {
; S390X-LABEL: constrained_vector_rint_v4f64: ; S390X-LABEL: constrained_vector_rint_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI79_0 ; S390X-NEXT: larl %r1, .LCPI79_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI79_1 ; S390X-NEXT: larl %r1, .LCPI79_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI79_2 ; S390X-NEXT: larl %r1, .LCPI79_2
; S390X-NEXT: ld %f2, 0(%r1) ; S390X-NEXT: ld %f2, 0(%r1)
Show All 14 Lines
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v26, %v0, 0, 0 ; SZ13-NEXT: vfidb %v26, %v0, 0, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64( %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %rint ret <4 x double> %rint
} }
define <1 x float> @constrained_vector_nearbyint_v1f32() { define <1 x float> @constrained_vector_nearbyint_v1f32() #0 {
; S390X-LABEL: constrained_vector_nearbyint_v1f32: ; S390X-LABEL: constrained_vector_nearbyint_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI80_0 ; S390X-NEXT: larl %r1, .LCPI80_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: brasl %r14, nearbyintf@PLT ; S390X-NEXT: brasl %r14, nearbyintf@PLT
; S390X-NEXT: lmg %r14, %r15, 272(%r15) ; S390X-NEXT: lmg %r14, %r15, 272(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_nearbyint_v1f32: ; SZ13-LABEL: constrained_vector_nearbyint_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI80_0 ; SZ13-NEXT: larl %r1, .LCPI80_0
; SZ13-NEXT: lde %f0, 0(%r1) ; SZ13-NEXT: lde %f0, 0(%r1)
; SZ13-NEXT: fiebra %f0, 0, %f0, 4 ; SZ13-NEXT: fiebra %f0, 0, %f0, 4
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32( %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %nearby ret <1 x float> %nearby
} }
define <2 x double> @constrained_vector_nearbyint_v2f64() { define <2 x double> @constrained_vector_nearbyint_v2f64() #0 {
; S390X-LABEL: constrained_vector_nearbyint_v2f64: ; S390X-LABEL: constrained_vector_nearbyint_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 17 Lines
; SZ13-NEXT: larl %r1, .LCPI81_0 ; SZ13-NEXT: larl %r1, .LCPI81_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 4, 0 ; SZ13-NEXT: vfidb %v24, %v0, 4, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64( %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %nearby ret <2 x double> %nearby
} }
define <3 x float> @constrained_vector_nearbyint_v3f32() { define <3 x float> @constrained_vector_nearbyint_v3f32() #0 {
; S390X-LABEL: constrained_vector_nearbyint_v3f32: ; S390X-LABEL: constrained_vector_nearbyint_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
Show All 35 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32( %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %nearby ret <3 x float> %nearby
} }
define void @constrained_vector_nearbyint_v3f64(<3 x double>* %a) { define void @constrained_vector_nearbyint_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_nearbyint_v3f64: ; S390X-LABEL: constrained_vector_nearbyint_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
Show All 32 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64( %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %nearby, <3 x double>* %a store <3 x double> %nearby, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_nearbyint_v4f64() { define <4 x double> @constrained_vector_nearbyint_v4f64() #0 {
; S390X-LABEL: constrained_vector_nearbyint_v4f64: ; S390X-LABEL: constrained_vector_nearbyint_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
Show All 39 Lines
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v26, %v0, 4, 0 ; SZ13-NEXT: vfidb %v26, %v0, 4, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64( %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %nearby ret <4 x double> %nearby
} }
define <1 x float> @constrained_vector_maxnum_v1f32() { define <1 x float> @constrained_vector_maxnum_v1f32() #0 {
; S390X-LABEL: constrained_vector_maxnum_v1f32: ; S390X-LABEL: constrained_vector_maxnum_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI85_0 ; S390X-NEXT: larl %r1, .LCPI85_0
Show All 19 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32( %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %max ret <1 x float> %max
} }
define <2 x double> @constrained_vector_maxnum_v2f64() { define <2 x double> @constrained_vector_maxnum_v2f64() #0 {
; S390X-LABEL: constrained_vector_maxnum_v2f64: ; S390X-LABEL: constrained_vector_maxnum_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 40 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64( %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %max ret <2 x double> %max
} }
define <3 x float> @constrained_vector_maxnum_v3f32() { define <3 x float> @constrained_vector_maxnum_v3f32() #0 {
; S390X-LABEL: constrained_vector_maxnum_v3f32: ; S390X-LABEL: constrained_vector_maxnum_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 312(%r15) ; SZ13-NEXT: lmg %r14, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32( %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %max ret <3 x float> %max
} }
define void @constrained_vector_log10_maxnum_v3f64(<3 x double>* %a) { define void @constrained_vector_log10_maxnum_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_log10_maxnum_v3f64: ; S390X-LABEL: constrained_vector_log10_maxnum_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; SZ13-NEXT: lmg %r13, %r15, 304(%r15) ; SZ13-NEXT: lmg %r13, %r15, 304(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64( %max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64(
<3 x double> %b, <3 x double> %b,
<3 x double> <double 40.0, double 41.0, double 42.0>, <3 x double> <double 40.0, double 41.0, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %max, <3 x double>* %a store <3 x double> %max, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_maxnum_v4f64() { define <4 x double> @constrained_vector_maxnum_v4f64() #0 {
; S390X-LABEL: constrained_vector_maxnum_v4f64: ; S390X-LABEL: constrained_vector_maxnum_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64( %max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %max ret <4 x double> %max
} }
define <1 x float> @constrained_vector_minnum_v1f32() { define <1 x float> @constrained_vector_minnum_v1f32() #0 {
; S390X-LABEL: constrained_vector_minnum_v1f32: ; S390X-LABEL: constrained_vector_minnum_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI90_0 ; S390X-NEXT: larl %r1, .LCPI90_0
Show All 19 Lines
; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0 ; SZ13-NEXT: # kill: def $f0s killed $f0s def $v0
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: lmg %r14, %r15, 272(%r15) ; SZ13-NEXT: lmg %r14, %r15, 272(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32( %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %min ret <1 x float> %min
} }
define <2 x double> @constrained_vector_minnum_v2f64() { define <2 x double> @constrained_vector_minnum_v2f64() #0 {
; S390X-LABEL: constrained_vector_minnum_v2f64: ; S390X-LABEL: constrained_vector_minnum_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 40 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 288(%r15) ; SZ13-NEXT: lmg %r14, %r15, 288(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64( %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %min ret <2 x double> %min
} }
define <3 x float> @constrained_vector_minnum_v3f32() { define <3 x float> @constrained_vector_minnum_v3f32() #0 {
; S390X-LABEL: constrained_vector_minnum_v3f32: ; S390X-LABEL: constrained_vector_minnum_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 67 Lines • ▼ Show 20 Lines
; SZ13-NEXT: vmrhg %v24, %v0, %v1 ; SZ13-NEXT: vmrhg %v24, %v0, %v1
; SZ13-NEXT: lmg %r14, %r15, 312(%r15) ; SZ13-NEXT: lmg %r14, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32( %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %min ret <3 x float> %min
} }
define void @constrained_vector_minnum_v3f64(<3 x double>* %a) { define void @constrained_vector_minnum_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_minnum_v3f64: ; S390X-LABEL: constrained_vector_minnum_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -192 ; S390X-NEXT: aghi %r15, -192
; S390X-NEXT: .cfi_def_cfa_offset 352 ; S390X-NEXT: .cfi_def_cfa_offset 352
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; SZ13-NEXT: lmg %r13, %r15, 312(%r15) ; SZ13-NEXT: lmg %r13, %r15, 312(%r15)
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64( %min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64(
<3 x double> %b, <3 x double> %b,
<3 x double> <double 3.0, double 3.0, double 3.0>, <3 x double> <double 3.0, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %min, <3 x double>* %a store <3 x double> %min, <3 x double>* %a
ret void ret void
} }
define <4 x double> @constrained_vector_minnum_v4f64() { define <4 x double> @constrained_vector_minnum_v4f64() #0 {
; S390X-LABEL: constrained_vector_minnum_v4f64: ; S390X-LABEL: constrained_vector_minnum_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 176(%r15) # 8-byte Folded Spill
▲ Show 20 Lines • Show All 81 Lines • ▼ Show 20 Lines
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64( %min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %min ret <4 x double> %min
} }
define <1 x float> @constrained_vector_fptrunc_v1f64() { define <1 x float> @constrained_vector_fptrunc_v1f64() #0 {
; S390X-LABEL: constrained_vector_fptrunc_v1f64: ; S390X-LABEL: constrained_vector_fptrunc_v1f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI95_0 ; S390X-NEXT: larl %r1, .LCPI95_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: ledbr %f0, %f0 ; S390X-NEXT: ledbr %f0, %f0
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fptrunc_v1f64: ; SZ13-LABEL: constrained_vector_fptrunc_v1f64:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI95_0 ; SZ13-NEXT: larl %r1, .LCPI95_0
; SZ13-NEXT: ld %f0, 0(%r1) ; SZ13-NEXT: ld %f0, 0(%r1)
; SZ13-NEXT: wledb %v24, %f0, 0, 0 ; SZ13-NEXT: wledb %v24, %f0, 0, 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64( %result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %result ret <1 x float> %result
} }
define <2 x float> @constrained_vector_fptrunc_v2f64() { define <2 x float> @constrained_vector_fptrunc_v2f64() #0 {
; S390X-LABEL: constrained_vector_fptrunc_v2f64: ; S390X-LABEL: constrained_vector_fptrunc_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI96_0 ; S390X-NEXT: larl %r1, .LCPI96_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI96_1 ; S390X-NEXT: larl %r1, .LCPI96_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: ledbr %f2, %f0 ; S390X-NEXT: ledbr %f2, %f0
; S390X-NEXT: ledbr %f0, %f1 ; S390X-NEXT: ledbr %f0, %f1
Show All 9 Lines
; SZ13-NEXT: ledbra %f1, 0, %f1, 0 ; SZ13-NEXT: ledbra %f1, 0, %f1, 0
; SZ13-NEXT: vmrhf %v0, %v1, %v0 ; SZ13-NEXT: vmrhf %v0, %v1, %v0
; SZ13-NEXT: vmrhg %v24, %v0, %v0 ; SZ13-NEXT: vmrhg %v24, %v0, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64( %result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x float> %result ret <2 x float> %result
} }
define void @constrained_vector_fptrunc_v3f64(<3 x double>* %src, <3 x float>* %dest) { define void @constrained_vector_fptrunc_v3f64(<3 x double>* %src, <3 x float>* %dest) #0 {
; S390X-LABEL: constrained_vector_fptrunc_v3f64: ; S390X-LABEL: constrained_vector_fptrunc_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: ld %f0, 0(%r2) ; S390X-NEXT: ld %f0, 0(%r2)
; S390X-NEXT: ld %f1, 16(%r2) ; S390X-NEXT: ld %f1, 16(%r2)
; S390X-NEXT: ld %f2, 8(%r2) ; S390X-NEXT: ld %f2, 8(%r2)
; S390X-NEXT: ledbr %f0, %f0 ; S390X-NEXT: ledbr %f0, %f0
; S390X-NEXT: lgdr %r0, %f0 ; S390X-NEXT: lgdr %r0, %f0
; S390X-NEXT: nilf %r0, 0 ; S390X-NEXT: nilf %r0, 0
Show All 19 Lines
; SZ13-NEXT: ste %f0, 8(%r3) ; SZ13-NEXT: ste %f0, 8(%r3)
; SZ13-NEXT: vsteg %v1, 0(%r3), 0 ; SZ13-NEXT: vsteg %v1, 0(%r3), 0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %src %b = load <3 x double>, <3 x double>* %src
%result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64( %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x float> %result, <3 x float>* %dest store <3 x float> %result, <3 x float>* %dest
ret void ret void
} }
define <4 x float> @constrained_vector_fptrunc_v4f64() { define <4 x float> @constrained_vector_fptrunc_v4f64() #0 {
; S390X-LABEL: constrained_vector_fptrunc_v4f64: ; S390X-LABEL: constrained_vector_fptrunc_v4f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI98_0 ; S390X-NEXT: larl %r1, .LCPI98_0
; S390X-NEXT: ld %f0, 0(%r1) ; S390X-NEXT: ld %f0, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI98_1 ; S390X-NEXT: larl %r1, .LCPI98_1
; S390X-NEXT: ld %f1, 0(%r1) ; S390X-NEXT: ld %f1, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI98_2 ; S390X-NEXT: larl %r1, .LCPI98_2
; S390X-NEXT: ld %f2, 0(%r1) ; S390X-NEXT: ld %f2, 0(%r1)
Show All 23 Lines
; SZ13-NEXT: vmrhf %v1, %v2, %v1 ; SZ13-NEXT: vmrhf %v1, %v2, %v1
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( %result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %result ret <4 x float> %result
} }
define <1 x double> @constrained_vector_fpext_v1f32() { define <1 x double> @constrained_vector_fpext_v1f32() #0 {
; S390X-LABEL: constrained_vector_fpext_v1f32: ; S390X-LABEL: constrained_vector_fpext_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI99_0 ; S390X-NEXT: larl %r1, .LCPI99_0
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fpext_v1f32: ; SZ13-LABEL: constrained_vector_fpext_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI99_0 ; SZ13-NEXT: larl %r1, .LCPI99_0
; SZ13-NEXT: ldeb %f0, 0(%r1) ; SZ13-NEXT: ldeb %f0, 0(%r1)
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32( %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x double> %result ret <1 x double> %result
} }
define <2 x double> @constrained_vector_fpext_v2f32() { define <2 x double> @constrained_vector_fpext_v2f32() #0 {
; S390X-LABEL: constrained_vector_fpext_v2f32: ; S390X-LABEL: constrained_vector_fpext_v2f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI100_0 ; S390X-NEXT: larl %r1, .LCPI100_0
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI100_1 ; S390X-NEXT: larl %r1, .LCPI100_1
; S390X-NEXT: ldeb %f0, 0(%r1) ; S390X-NEXT: ldeb %f0, 0(%r1)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_fpext_v2f32: ; SZ13-LABEL: constrained_vector_fpext_v2f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: larl %r1, .LCPI100_0 ; SZ13-NEXT: larl %r1, .LCPI100_0
; SZ13-NEXT: ldeb %f0, 0(%r1) ; SZ13-NEXT: ldeb %f0, 0(%r1)
; SZ13-NEXT: larl %r1, .LCPI100_1 ; SZ13-NEXT: larl %r1, .LCPI100_1
; SZ13-NEXT: ldeb %f1, 0(%r1) ; SZ13-NEXT: ldeb %f1, 0(%r1)
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32( %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %result ret <2 x double> %result
} }
define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) { define void @constrained_vector_fpext_v3f64(<3 x float>* %src, <3 x double>* %dest) #0 {
; S390X-LABEL: constrained_vector_fpext_v3f64: ; S390X-LABEL: constrained_vector_fpext_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: lg %r0, 0(%r2) ; S390X-NEXT: lg %r0, 0(%r2)
; S390X-NEXT: sllg %r1, %r0, 32 ; S390X-NEXT: sllg %r1, %r0, 32
; S390X-NEXT: ldgr %f0, %r1 ; S390X-NEXT: ldgr %f0, %r1
; S390X-NEXT: nilf %r0, 0 ; S390X-NEXT: nilf %r0, 0
; S390X-NEXT: ldeb %f1, 8(%r2) ; S390X-NEXT: ldeb %f1, 8(%r2)
; S390X-NEXT: ldgr %f2, %r0 ; S390X-NEXT: ldgr %f2, %r0
Show All 15 Lines
; SZ13-NEXT: vmrhg %v1, %v1, %v2 ; SZ13-NEXT: vmrhg %v1, %v1, %v2
; SZ13-NEXT: std %f0, 16(%r3) ; SZ13-NEXT: std %f0, 16(%r3)
; SZ13-NEXT: vst %v1, 0(%r3), 4 ; SZ13-NEXT: vst %v1, 0(%r3), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x float>, <3 x float>* %src %b = load <3 x float>, <3 x float>* %src
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32( %result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(
<3 x float> %b, <3 x float> %b,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %result, <3 x double>* %dest store <3 x double> %result, <3 x double>* %dest
ret void ret void
} }
define <4 x double> @constrained_vector_fpext_v4f32() { define <4 x double> @constrained_vector_fpext_v4f32() #0 {
; S390X-LABEL: constrained_vector_fpext_v4f32: ; S390X-LABEL: constrained_vector_fpext_v4f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: larl %r1, .LCPI102_0 ; S390X-NEXT: larl %r1, .LCPI102_0
; S390X-NEXT: ldeb %f6, 0(%r1) ; S390X-NEXT: ldeb %f6, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_1 ; S390X-NEXT: larl %r1, .LCPI102_1
; S390X-NEXT: ldeb %f4, 0(%r1) ; S390X-NEXT: ldeb %f4, 0(%r1)
; S390X-NEXT: larl %r1, .LCPI102_2 ; S390X-NEXT: larl %r1, .LCPI102_2
; S390X-NEXT: ldeb %f2, 0(%r1) ; S390X-NEXT: ldeb %f2, 0(%r1)
Show All 13 Lines
; SZ13-NEXT: larl %r1, .LCPI102_3 ; SZ13-NEXT: larl %r1, .LCPI102_3
; SZ13-NEXT: ldeb %f1, 0(%r1) ; SZ13-NEXT: ldeb %f1, 0(%r1)
; SZ13-NEXT: vmrhg %v26, %v1, %v0 ; SZ13-NEXT: vmrhg %v26, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %result ret <4 x double> %result
} }
define <1 x float> @constrained_vector_ceil_v1f32() { define <1 x float> @constrained_vector_ceil_v1f32() #0 {
; S390X-LABEL: constrained_vector_ceil_v1f32: ; S390X-LABEL: constrained_vector_ceil_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI103_0 ; S390X-NEXT: larl %r1, .LCPI103_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: brasl %r14, ceilf@PLT ; S390X-NEXT: brasl %r14, ceilf@PLT
; S390X-NEXT: lmg %r14, %r15, 272(%r15) ; S390X-NEXT: lmg %r14, %r15, 272(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_ceil_v1f32: ; SZ13-LABEL: constrained_vector_ceil_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 9 ; SZ13-NEXT: vgmf %v0, 2, 9
; SZ13-NEXT: fiebra %f0, 6, %f0, 4 ; SZ13-NEXT: fiebra %f0, 6, %f0, 4
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32( %ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %ceil ret <1 x float> %ceil
} }
define <2 x double> @constrained_vector_ceil_v2f64() { define <2 x double> @constrained_vector_ceil_v2f64() #0 {
; S390X-LABEL: constrained_vector_ceil_v2f64: ; S390X-LABEL: constrained_vector_ceil_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 17 Lines
; SZ13-NEXT: larl %r1, .LCPI104_0 ; SZ13-NEXT: larl %r1, .LCPI104_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 4, 6 ; SZ13-NEXT: vfidb %v24, %v0, 4, 6
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64( %ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ceil ret <2 x double> %ceil
} }
define <3 x float> @constrained_vector_ceil_v3f32() { define <3 x float> @constrained_vector_ceil_v3f32() #0 {
; S390X-LABEL: constrained_vector_ceil_v3f32: ; S390X-LABEL: constrained_vector_ceil_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
Show All 34 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32( %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %ceil ret <3 x float> %ceil
} }
define void @constrained_vector_ceil_v3f64(<3 x double>* %a) { define void @constrained_vector_ceil_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_ceil_v3f64: ; S390X-LABEL: constrained_vector_ceil_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
Show All 32 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64( %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %ceil, <3 x double>* %a store <3 x double> %ceil, <3 x double>* %a
ret void ret void
} }
define <1 x float> @constrained_vector_floor_v1f32() { define <1 x float> @constrained_vector_floor_v1f32() #0 {
; S390X-LABEL: constrained_vector_floor_v1f32: ; S390X-LABEL: constrained_vector_floor_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI107_0 ; S390X-NEXT: larl %r1, .LCPI107_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: brasl %r14, floorf@PLT ; S390X-NEXT: brasl %r14, floorf@PLT
; S390X-NEXT: lmg %r14, %r15, 272(%r15) ; S390X-NEXT: lmg %r14, %r15, 272(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_floor_v1f32: ; SZ13-LABEL: constrained_vector_floor_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 9 ; SZ13-NEXT: vgmf %v0, 2, 9
; SZ13-NEXT: fiebra %f0, 7, %f0, 4 ; SZ13-NEXT: fiebra %f0, 7, %f0, 4
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32( %floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %floor ret <1 x float> %floor
} }
define <2 x double> @constrained_vector_floor_v2f64() { define <2 x double> @constrained_vector_floor_v2f64() #0 {
; S390X-LABEL: constrained_vector_floor_v2f64: ; S390X-LABEL: constrained_vector_floor_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 17 Lines
; SZ13-NEXT: larl %r1, .LCPI108_0 ; SZ13-NEXT: larl %r1, .LCPI108_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 4, 7 ; SZ13-NEXT: vfidb %v24, %v0, 4, 7
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64( %floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %floor ret <2 x double> %floor
} }
define <3 x float> @constrained_vector_floor_v3f32() { define <3 x float> @constrained_vector_floor_v3f32() #0 {
; S390X-LABEL: constrained_vector_floor_v3f32: ; S390X-LABEL: constrained_vector_floor_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
Show All 34 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32( %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %floor ret <3 x float> %floor
} }
define void @constrained_vector_floor_v3f64(<3 x double>* %a) { define void @constrained_vector_floor_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_floor_v3f64: ; S390X-LABEL: constrained_vector_floor_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
Show All 32 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64( %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %floor, <3 x double>* %a store <3 x double> %floor, <3 x double>* %a
ret void ret void
} }
define <1 x float> @constrained_vector_round_v1f32() { define <1 x float> @constrained_vector_round_v1f32() #0 {
; S390X-LABEL: constrained_vector_round_v1f32: ; S390X-LABEL: constrained_vector_round_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI111_0 ; S390X-NEXT: larl %r1, .LCPI111_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: brasl %r14, roundf@PLT ; S390X-NEXT: brasl %r14, roundf@PLT
; S390X-NEXT: lmg %r14, %r15, 272(%r15) ; S390X-NEXT: lmg %r14, %r15, 272(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_round_v1f32: ; SZ13-LABEL: constrained_vector_round_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 9 ; SZ13-NEXT: vgmf %v0, 2, 9
; SZ13-NEXT: fiebra %f0, 1, %f0, 4 ; SZ13-NEXT: fiebra %f0, 1, %f0, 4
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%round = call <1 x float> @llvm.experimental.constrained.round.v1f32( %round = call <1 x float> @llvm.experimental.constrained.round.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %round ret <1 x float> %round
} }
define <2 x double> @constrained_vector_round_v2f64() { define <2 x double> @constrained_vector_round_v2f64() #0 {
; S390X-LABEL: constrained_vector_round_v2f64: ; S390X-LABEL: constrained_vector_round_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 17 Lines
; SZ13-NEXT: larl %r1, .LCPI112_0 ; SZ13-NEXT: larl %r1, .LCPI112_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 4, 1 ; SZ13-NEXT: vfidb %v24, %v0, 4, 1
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%round = call <2 x double> @llvm.experimental.constrained.round.v2f64( %round = call <2 x double> @llvm.experimental.constrained.round.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %round ret <2 x double> %round
} }
define <3 x float> @constrained_vector_round_v3f32() { define <3 x float> @constrained_vector_round_v3f32() #0 {
; S390X-LABEL: constrained_vector_round_v3f32: ; S390X-LABEL: constrained_vector_round_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
Show All 34 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%round = call <3 x float> @llvm.experimental.constrained.round.v3f32( %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %round ret <3 x float> %round
} }
define void @constrained_vector_round_v3f64(<3 x double>* %a) { define void @constrained_vector_round_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_round_v3f64: ; S390X-LABEL: constrained_vector_round_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
Show All 32 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%round = call <3 x double> @llvm.experimental.constrained.round.v3f64( %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %round, <3 x double>* %a store <3 x double> %round, <3 x double>* %a
ret void ret void
} }
define <1 x float> @constrained_vector_trunc_v1f32() { define <1 x float> @constrained_vector_trunc_v1f32() #0 {
; S390X-LABEL: constrained_vector_trunc_v1f32: ; S390X-LABEL: constrained_vector_trunc_v1f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -160 ; S390X-NEXT: aghi %r15, -160
; S390X-NEXT: .cfi_def_cfa_offset 320 ; S390X-NEXT: .cfi_def_cfa_offset 320
; S390X-NEXT: larl %r1, .LCPI115_0 ; S390X-NEXT: larl %r1, .LCPI115_0
; S390X-NEXT: le %f0, 0(%r1) ; S390X-NEXT: le %f0, 0(%r1)
; S390X-NEXT: brasl %r14, truncf@PLT ; S390X-NEXT: brasl %r14, truncf@PLT
; S390X-NEXT: lmg %r14, %r15, 272(%r15) ; S390X-NEXT: lmg %r14, %r15, 272(%r15)
; S390X-NEXT: br %r14 ; S390X-NEXT: br %r14
; ;
; SZ13-LABEL: constrained_vector_trunc_v1f32: ; SZ13-LABEL: constrained_vector_trunc_v1f32:
; SZ13: # %bb.0: # %entry ; SZ13: # %bb.0: # %entry
; SZ13-NEXT: vgmf %v0, 2, 9 ; SZ13-NEXT: vgmf %v0, 2, 9
; SZ13-NEXT: fiebra %f0, 5, %f0, 4 ; SZ13-NEXT: fiebra %f0, 5, %f0, 4
; SZ13-NEXT: vlr %v24, %v0 ; SZ13-NEXT: vlr %v24, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32( %trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %trunc ret <1 x float> %trunc
} }
define <2 x double> @constrained_vector_trunc_v2f64() { define <2 x double> @constrained_vector_trunc_v2f64() #0 {
; S390X-LABEL: constrained_vector_trunc_v2f64: ; S390X-LABEL: constrained_vector_trunc_v2f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -168 ; S390X-NEXT: aghi %r15, -168
; S390X-NEXT: .cfi_def_cfa_offset 328 ; S390X-NEXT: .cfi_def_cfa_offset 328
; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 160(%r15) # 8-byte Folded Spill
Show All 17 Lines
; SZ13-NEXT: larl %r1, .LCPI116_0 ; SZ13-NEXT: larl %r1, .LCPI116_0
; SZ13-NEXT: vl %v0, 0(%r1), 3 ; SZ13-NEXT: vl %v0, 0(%r1), 3
; SZ13-NEXT: vfidb %v24, %v0, 4, 5 ; SZ13-NEXT: vfidb %v24, %v0, 4, 5
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64( %trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %trunc ret <2 x double> %trunc
} }
define <3 x float> @constrained_vector_trunc_v3f32() { define <3 x float> @constrained_vector_trunc_v3f32() #0 {
; S390X-LABEL: constrained_vector_trunc_v3f32: ; S390X-LABEL: constrained_vector_trunc_v3f32:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r14, %r15, 112(%r15) ; S390X-NEXT: stmg %r14, %r15, 112(%r15)
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -176 ; S390X-NEXT: aghi %r15, -176
; S390X-NEXT: .cfi_def_cfa_offset 336 ; S390X-NEXT: .cfi_def_cfa_offset 336
; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill ; S390X-NEXT: std %f8, 168(%r15) # 8-byte Folded Spill
Show All 34 Lines
; SZ13-NEXT: vmrhf %v1, %v1, %v2 ; SZ13-NEXT: vmrhf %v1, %v1, %v2
; SZ13-NEXT: vrepf %v0, %v0, 0 ; SZ13-NEXT: vrepf %v0, %v0, 0
; SZ13-NEXT: vmrhg %v24, %v1, %v0 ; SZ13-NEXT: vmrhg %v24, %v1, %v0
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32( %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %trunc ret <3 x float> %trunc
} }
define void @constrained_vector_trunc_v3f64(<3 x double>* %a) { define void @constrained_vector_trunc_v3f64(<3 x double>* %a) #0 {
; S390X-LABEL: constrained_vector_trunc_v3f64: ; S390X-LABEL: constrained_vector_trunc_v3f64:
; S390X: # %bb.0: # %entry ; S390X: # %bb.0: # %entry
; S390X-NEXT: stmg %r13, %r15, 104(%r15) ; S390X-NEXT: stmg %r13, %r15, 104(%r15)
; S390X-NEXT: .cfi_offset %r13, -56 ; S390X-NEXT: .cfi_offset %r13, -56
; S390X-NEXT: .cfi_offset %r14, -48 ; S390X-NEXT: .cfi_offset %r14, -48
; S390X-NEXT: .cfi_offset %r15, -40 ; S390X-NEXT: .cfi_offset %r15, -40
; S390X-NEXT: aghi %r15, -184 ; S390X-NEXT: aghi %r15, -184
; S390X-NEXT: .cfi_def_cfa_offset 344 ; S390X-NEXT: .cfi_def_cfa_offset 344
Show All 32 Lines
; SZ13-NEXT: std %f0, 16(%r2) ; SZ13-NEXT: std %f0, 16(%r2)
; SZ13-NEXT: vst %v1, 0(%r2), 4 ; SZ13-NEXT: vst %v1, 0(%r2), 4
; SZ13-NEXT: br %r14 ; SZ13-NEXT: br %r14
entry: entry:
%b = load <3 x double>, <3 x double>* %a %b = load <3 x double>, <3 x double>* %a
%trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64( %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
<3 x double> %b, <3 x double> %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
store <3 x double> %trunc, <3 x double>* %a store <3 x double> %trunc, <3 x double>* %a
ret void ret void
} }
attributes #0 = { strictfp }
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.pow.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.powi.v2f64(<2 x double>, i32, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.powi.v2f64(<2 x double>, i32, metadata, metadata)
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llvm/test/CodeGen/X86/constrained-fp80-trunc-ext.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=x86_64-gnu-linux < %s | FileCheck %s ; RUN: llc -O3 -mtriple=x86_64-gnu-linux < %s | FileCheck %s
define x86_fp80 @constrained_fpext_f32_as_fp80(float %mem) { define x86_fp80 @constrained_fpext_f32_as_fp80(float %mem) #0 {
; CHECK-LABEL: constrained_fpext_f32_as_fp80: ; CHECK-LABEL: constrained_fpext_f32_as_fp80:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movss %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: flds -{{[0-9]+}}(%rsp) ; CHECK-NEXT: flds -{{[0-9]+}}(%rsp)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%ext = call x86_fp80 @llvm.experimental.constrained.fpext.f80.f32( %ext = call x86_fp80 @llvm.experimental.constrained.fpext.f80.f32(
float %mem, float %mem,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret x86_fp80 %ext ret x86_fp80 %ext
} }
define float @constrained_fptrunc_f80_to_f32(x86_fp80 %reg) { define float @constrained_fptrunc_f80_to_f32(x86_fp80 %reg) #0 {
; CHECK-LABEL: constrained_fptrunc_f80_to_f32: ; CHECK-LABEL: constrained_fptrunc_f80_to_f32:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fstps -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fstps -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%trunc = call float @llvm.experimental.constrained.fptrunc.f32.f80( %trunc = call float @llvm.experimental.constrained.fptrunc.f32.f80(
x86_fp80 %reg, x86_fp80 %reg,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %trunc ret float %trunc
} }
define x86_fp80 @constrained_fpext_f64_to_f80(double %mem) { define x86_fp80 @constrained_fpext_f64_to_f80(double %mem) #0 {
; CHECK-LABEL: constrained_fpext_f64_to_f80: ; CHECK-LABEL: constrained_fpext_f64_to_f80:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm0, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%ext = call x86_fp80 @llvm.experimental.constrained.fpext.f80.f64( %ext = call x86_fp80 @llvm.experimental.constrained.fpext.f80.f64(
double %mem, double %mem,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret x86_fp80 %ext ret x86_fp80 %ext
} }
define double @constrained_fptrunc_f80_to_f64(x86_fp80 %reg) { define double @constrained_fptrunc_f80_to_f64(x86_fp80 %reg) #0 {
; CHECK-LABEL: constrained_fptrunc_f80_to_f64: ; CHECK-LABEL: constrained_fptrunc_f80_to_f64:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: fldt {{[0-9]+}}(%rsp) ; CHECK-NEXT: fldt {{[0-9]+}}(%rsp)
; CHECK-NEXT: fstpl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fstpl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%trunc = call double @llvm.experimental.constrained.fptrunc.f64.f80( %trunc = call double @llvm.experimental.constrained.fptrunc.f64.f80(
x86_fp80 %reg, x86_fp80 %reg,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %trunc ret double %trunc
} }
attributes #0 = { strictfp }
declare x86_fp80 @llvm.experimental.constrained.fpext.f80.f32(float, metadata) declare x86_fp80 @llvm.experimental.constrained.fpext.f80.f32(float, metadata)
declare x86_fp80 @llvm.experimental.constrained.fpext.f80.f64(double, metadata) declare x86_fp80 @llvm.experimental.constrained.fpext.f80.f64(double, metadata)
declare float @llvm.experimental.constrained.fptrunc.f32.f80(x86_fp80, metadata, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f80(x86_fp80, metadata, metadata)
declare double @llvm.experimental.constrained.fptrunc.f64.f80(x86_fp80, metadata, metadata) declare double @llvm.experimental.constrained.fptrunc.f64.f80(x86_fp80, metadata, metadata)

llvm/test/CodeGen/X86/fp-intrinsics.ll

; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck --check-prefix=COMMON --check-prefix=NO-FMA --check-prefix=FMACALL64 --check-prefix=FMACALL32 %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck --check-prefix=COMMON --check-prefix=NO-FMA --check-prefix=FMACALL64 --check-prefix=FMACALL32 %s
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck -check-prefix=COMMON --check-prefix=HAS-FMA --check-prefix=FMA64 --check-prefix=FMA32 %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck -check-prefix=COMMON --check-prefix=HAS-FMA --check-prefix=FMA64 --check-prefix=FMA32 %s
; Verify that constants aren't folded to inexact results when the rounding mode ; Verify that constants aren't folded to inexact results when the rounding mode
; is unknown. ; is unknown.
; ;
; double f1() { ; double f1() {
; // Because 0.1 cannot be represented exactly, this shouldn't be folded. ; // Because 0.1 cannot be represented exactly, this shouldn't be folded.
; return 1.0/10.0; ; return 1.0/10.0;
; } ; }
; ;
; CHECK-LABEL: f1 ; CHECK-LABEL: f1
; COMMON: divsd ; COMMON: divsd
define double @f1() { define double @f1() #0 {
entry: entry:
%div = call double @llvm.experimental.constrained.fdiv.f64( %div = call double @llvm.experimental.constrained.fdiv.f64(
double 1.000000e+00, double 1.000000e+00,
double 1.000000e+01, double 1.000000e+01,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %div ret double %div
} }
; Verify that 'a - 0' isn't simplified to 'a' when the rounding mode is unknown. ; Verify that 'a - 0' isn't simplified to 'a' when the rounding mode is unknown.
; ;
; double f2(double a) { ; double f2(double a) {
; // Because the result of '0 - 0' is negative zero if rounding mode is ; // Because the result of '0 - 0' is negative zero if rounding mode is
; // downward, this shouldn't be simplified. ; // downward, this shouldn't be simplified.
; return a - 0; ; return a - 0;
; } ; }
; ;
; CHECK-LABEL: f2 ; CHECK-LABEL: f2
; COMMON: subsd ; COMMON: subsd
define double @f2(double %a) { define double @f2(double %a) #0 {
entry: entry:
%sub = call double @llvm.experimental.constrained.fsub.f64( %sub = call double @llvm.experimental.constrained.fsub.f64(
double %a, double %a,
double 0.000000e+00, double 0.000000e+00,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %sub ret double %sub
} }
; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is ; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is
; unknown. ; unknown.
; ;
; double f3(double a, double b) { ; double f3(double a, double b) {
; // Because the intermediate value involved in this calculation may require ; // Because the intermediate value involved in this calculation may require
; // rounding, this shouldn't be simplified. ; // rounding, this shouldn't be simplified.
; return -((-a)*b); ; return -((-a)*b);
; } ; }
; ;
; CHECK-LABEL: f3: ; CHECK-LABEL: f3:
; COMMON: subsd ; COMMON: subsd
; COMMON: mulsd ; COMMON: mulsd
; COMMON: subsd ; COMMON: subsd
define double @f3(double %a, double %b) { define double @f3(double %a, double %b) #0 {
entry: entry:
%sub = call double @llvm.experimental.constrained.fsub.f64( %sub = call double @llvm.experimental.constrained.fsub.f64(
double -0.000000e+00, double %a, double -0.000000e+00, double %a,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul = call double @llvm.experimental.constrained.fmul.f64( %mul = call double @llvm.experimental.constrained.fmul.f64(
double %sub, double %b, double %sub, double %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%ret = call double @llvm.experimental.constrained.fsub.f64( %ret = call double @llvm.experimental.constrained.fsub.f64(
double -0.000000e+00, double -0.000000e+00,
double %mul, double %mul,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
; Verify that FP operations are not performed speculatively when FP exceptions ; Verify that FP operations are not performed speculatively when FP exceptions
; are not being ignored. ; are not being ignored.
; ;
; double f4(int n, double a) { ; double f4(int n, double a) {
; // Because a + 1 may overflow, this should not be simplified. ; // Because a + 1 may overflow, this should not be simplified.
; if (n > 0) ; if (n > 0)
; return a + 1.0; ; return a + 1.0;
; return a; ; return a;
; } ; }
; ;
; ;
; CHECK-LABEL: f4: ; CHECK-LABEL: f4:
; COMMON: testl ; COMMON: testl
; COMMON: jle ; COMMON: jle
; COMMON: addsd ; COMMON: addsd
define double @f4(i32 %n, double %a) { define double @f4(i32 %n, double %a) #0 {
entry: entry:
%cmp = icmp sgt i32 %n, 0 %cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: if.then:
%add = call double @llvm.experimental.constrained.fadd.f64( %add = call double @llvm.experimental.constrained.fadd.f64(
double 1.000000e+00, double %a, double 1.000000e+00, double %a,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
br label %if.end br label %if.end
if.end: if.end:
%a.0 = phi double [%add, %if.then], [ %a, %entry ] %a.0 = phi double [%add, %if.then], [ %a, %entry ]
ret double %a.0 ret double %a.0
} }
; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown. ; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f5 ; CHECK-LABEL: f5
; COMMON: sqrtsd ; COMMON: sqrtsd
define double @f5() { define double @f5() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0, %result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown. ; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f6 ; CHECK-LABEL: f6
; COMMON: pow ; COMMON: pow
define double @f6() { define double @f6() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.pow.f64(double 42.1, %result = call double @llvm.experimental.constrained.pow.f64(double 42.1,
double 3.0, double 3.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown. ; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f7 ; CHECK-LABEL: f7
; COMMON: powi ; COMMON: powi
define double @f7() { define double @f7() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.powi.f64(double 42.1, %result = call double @llvm.experimental.constrained.powi.f64(double 42.1,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that sin(42.0) isn't simplified when the rounding mode is unknown. ; Verify that sin(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f8 ; CHECK-LABEL: f8
; COMMON: sin ; COMMON: sin
define double @f8() { define double @f8() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.sin.f64(double 42.0, %result = call double @llvm.experimental.constrained.sin.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that cos(42.0) isn't simplified when the rounding mode is unknown. ; Verify that cos(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f9 ; CHECK-LABEL: f9
; COMMON: cos ; COMMON: cos
define double @f9() { define double @f9() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.cos.f64(double 42.0, %result = call double @llvm.experimental.constrained.cos.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that exp(42.0) isn't simplified when the rounding mode is unknown. ; Verify that exp(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f10 ; CHECK-LABEL: f10
; COMMON: exp ; COMMON: exp
define double @f10() { define double @f10() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.exp.f64(double 42.0, %result = call double @llvm.experimental.constrained.exp.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown. ; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f11 ; CHECK-LABEL: f11
; COMMON: exp2 ; COMMON: exp2
define double @f11() { define double @f11() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.exp2.f64(double 42.1, %result = call double @llvm.experimental.constrained.exp2.f64(double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f12 ; CHECK-LABEL: f12
; COMMON: log ; COMMON: log
define double @f12() { define double @f12() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log.f64(double 42.0, %result = call double @llvm.experimental.constrained.log.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log10(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log10(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f13 ; CHECK-LABEL: f13
; COMMON: log10 ; COMMON: log10
define double @f13() { define double @f13() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log10.f64(double 42.0, %result = call double @llvm.experimental.constrained.log10.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log2(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log2(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f14 ; CHECK-LABEL: f14
; COMMON: log2 ; COMMON: log2
define double @f14() { define double @f14() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log2.f64(double 42.0, %result = call double @llvm.experimental.constrained.log2.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that rint(42.1) isn't simplified when the rounding mode is unknown. ; Verify that rint(42.1) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f15 ; CHECK-LABEL: f15
; NO-FMA: rint ; NO-FMA: rint
; HAS-FMA: vroundsd ; HAS-FMA: vroundsd
define double @f15() { define double @f15() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.rint.f64(double 42.1, %result = call double @llvm.experimental.constrained.rint.f64(double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that nearbyint(42.1) isn't simplified when the rounding mode is ; Verify that nearbyint(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f16 ; CHECK-LABEL: f16
; NO-FMA: nearbyint ; NO-FMA: nearbyint
; HAS-FMA: vroundsd ; HAS-FMA: vroundsd
define double @f16() { define double @f16() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.nearbyint.f64( %result = call double @llvm.experimental.constrained.nearbyint.f64(
double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that fma(3.5) isn't simplified when the rounding mode is ; Verify that fma(3.5) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f17 ; CHECK-LABEL: f17
; FMACALL32: jmp fmaf # TAILCALL ; FMACALL32: jmp fmaf # TAILCALL
; FMA32: vfmadd213ss ; FMA32: vfmadd213ss
define float @f17() { define float @f17() #0 {
entry: entry:
%result = call float @llvm.experimental.constrained.fma.f32( %result = call float @llvm.experimental.constrained.fma.f32(
float 3.5, float 3.5,
float 3.5, float 3.5,
float 3.5, float 3.5,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %result ret float %result
} }
; Verify that fma(42.1) isn't simplified when the rounding mode is ; Verify that fma(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f18 ; CHECK-LABEL: f18
; FMACALL64: jmp fma # TAILCALL ; FMACALL64: jmp fma # TAILCALL
; FMA64: vfmadd213sd ; FMA64: vfmadd213sd
define double @f18() { define double @f18() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.fma.f64( %result = call double @llvm.experimental.constrained.fma.f64(
double 42.1, double 42.1,
double 42.1, double 42.1,
double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; CHECK-LABEL: f19 ; CHECK-LABEL: f19
; COMMON: fmod ; COMMON: fmod
define double @f19() { define double @f19() #0 {
entry: entry:
%rem = call double @llvm.experimental.constrained.frem.f64( %rem = call double @llvm.experimental.constrained.frem.f64(
double 1.000000e+00, double 1.000000e+00,
double 1.000000e+01, double 1.000000e+01,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %rem ret double %rem
} }
; Verify that fptoui(%x) isn't simplified when the rounding mode is ; Verify that fptoui(%x) isn't simplified when the rounding mode is
; unknown. The expansion should have only one conversion instruction. ; unknown. The expansion should have only one conversion instruction.
; Verify that no gross errors happen. ; Verify that no gross errors happen.
; CHECK-LABEL: @f20u ; CHECK-LABEL: @f20u
; NO-FMA: cmpltsd ; NO-FMA: cmpltsd
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; HAS-FMA: vsubsd ; HAS-FMA: vsubsd
; HAS-FMA: vblendvpd ; HAS-FMA: vblendvpd
; HAS-FMA: vcvttsd2si ; HAS-FMA: vcvttsd2si
; HAS-FMA: xorl ; HAS-FMA: xorl
; HAS-FMA: vucomisd ; HAS-FMA: vucomisd
; HAS-FMA: setae ; HAS-FMA: setae
; HAS-FMA: shll ; HAS-FMA: shll
; HAS-FMA: xorl ; HAS-FMA: xorl
define i32 @f20u(double %x) { define i32 @f20u(double %x) #0 {
entry: entry:
%result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x, %result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %result ret i32 %result
} }
; Verify that round(42.1) isn't simplified when the rounding mode is ; Verify that round(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; Verify that no gross errors happen. ; Verify that no gross errors happen.
; CHECK-LABEL: @f21 ; CHECK-LABEL: @f21
; COMMON: cvtsd2ss ; COMMON: cvtsd2ss
define float @f21() { define float @f21() #0 {
entry: entry:
%result = call float @llvm.experimental.constrained.fptrunc.f32.f64( %result = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %result ret float %result
} }
; CHECK-LABEL: @f22 ; CHECK-LABEL: @f22
; COMMON: cvtss2sd ; COMMON: cvtss2sd
define double @f22(float %x) { define double @f22(float %x) #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.fpext.f64.f32(float %x, %result = call double @llvm.experimental.constrained.fpext.f64.f32(float %x,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
attributes #0 = { strictfp }
@llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata" @llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata"
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.frem.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.frem.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
declare double @llvm.experimental.constrained.pow.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.pow.f64(double, double, metadata, metadata)
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llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics-fma.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+fma < %s | FileCheck %s
define <1 x float> @constrained_vector_fma_v1f32() { define <1 x float> @constrained_vector_fma_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fma_v1f32: ; CHECK-LABEL: constrained_vector_fma_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + mem ; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm0 = (xmm1 * xmm0) + mem
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <1 x float> @llvm.experimental.constrained.fma.v1f32( %fma = call <1 x float> @llvm.experimental.constrained.fma.v1f32(
<1 x float> <float 0.5>, <1 x float> <float 0.5>,
<1 x float> <float 2.5>, <1 x float> <float 2.5>,
<1 x float> <float 4.5>, <1 x float> <float 4.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %fma ret <1 x float> %fma
} }
define <2 x double> @constrained_vector_fma_v2f64() { define <2 x double> @constrained_vector_fma_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fma_v2f64: ; CHECK-LABEL: constrained_vector_fma_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovapd {{.*#+}} xmm1 = [1.5E+0,5.0E-1] ; CHECK-NEXT: vmovapd {{.*#+}} xmm1 = [1.5E+0,5.0E-1]
; CHECK-NEXT: vmovapd {{.*#+}} xmm0 = [3.5E+0,2.5E+0] ; CHECK-NEXT: vmovapd {{.*#+}} xmm0 = [3.5E+0,2.5E+0]
; CHECK-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem ; CHECK-NEXT: vfmadd213pd {{.*#+}} xmm0 = (xmm1 * xmm0) + mem
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64( %fma = call <2 x double> @llvm.experimental.constrained.fma.v2f64(
<2 x double> <double 1.5, double 0.5>, <2 x double> <double 1.5, double 0.5>,
<2 x double> <double 3.5, double 2.5>, <2 x double> <double 3.5, double 2.5>,
<2 x double> <double 5.5, double 4.5>, <2 x double> <double 5.5, double 4.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %fma ret <2 x double> %fma
} }
define <3 x float> @constrained_vector_fma_v3f32() { define <3 x float> @constrained_vector_fma_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fma_v3f32: ; CHECK-LABEL: constrained_vector_fma_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + mem ; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm1 = (xmm0 * xmm1) + mem
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm0 * xmm2) + mem ; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm2 = (xmm0 * xmm2) + mem
; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero ; CHECK-NEXT: vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm3 = (xmm0 * xmm3) + mem ; CHECK-NEXT: vfmadd213ss {{.*#+}} xmm3 = (xmm0 * xmm3) + mem
; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm3[0],xmm2[2,3] ; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm3[0],xmm2[2,3]
; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] ; CHECK-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <3 x float> @llvm.experimental.constrained.fma.v3f32( %fma = call <3 x float> @llvm.experimental.constrained.fma.v3f32(
<3 x float> <float 2.5, float 1.5, float 0.5>, <3 x float> <float 2.5, float 1.5, float 0.5>,
<3 x float> <float 5.5, float 4.5, float 3.5>, <3 x float> <float 5.5, float 4.5, float 3.5>,
<3 x float> <float 8.5, float 7.5, float 6.5>, <3 x float> <float 8.5, float 7.5, float 6.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %fma ret <3 x float> %fma
} }
define <3 x double> @constrained_vector_fma_v3f64() { define <3 x double> @constrained_vector_fma_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fma_v3f64: ; CHECK-LABEL: constrained_vector_fma_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: vfmadd213sd {{.*#+}} xmm1 = (xmm0 * xmm1) + mem ; CHECK-NEXT: vfmadd213sd {{.*#+}} xmm1 = (xmm0 * xmm1) + mem
; CHECK-NEXT: vmovapd {{.*#+}} xmm0 = [2.5E+0,1.5E+0] ; CHECK-NEXT: vmovapd {{.*#+}} xmm0 = [2.5E+0,1.5E+0]
; CHECK-NEXT: vmovapd {{.*#+}} xmm2 = [5.5E+0,4.5E+0] ; CHECK-NEXT: vmovapd {{.*#+}} xmm2 = [5.5E+0,4.5E+0]
; CHECK-NEXT: vfmadd213pd {{.*#+}} xmm2 = (xmm0 * xmm2) + mem ; CHECK-NEXT: vfmadd213pd {{.*#+}} xmm2 = (xmm0 * xmm2) + mem
; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm0 ; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <3 x double> @llvm.experimental.constrained.fma.v3f64( %fma = call <3 x double> @llvm.experimental.constrained.fma.v3f64(
<3 x double> <double 2.5, double 1.5, double 0.5>, <3 x double> <double 2.5, double 1.5, double 0.5>,
<3 x double> <double 5.5, double 4.5, double 3.5>, <3 x double> <double 5.5, double 4.5, double 3.5>,
<3 x double> <double 8.5, double 7.5, double 6.5>, <3 x double> <double 8.5, double 7.5, double 6.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %fma ret <3 x double> %fma
} }
define <4 x double> @constrained_vector_fma_v4f64() { define <4 x double> @constrained_vector_fma_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fma_v4f64: ; CHECK-LABEL: constrained_vector_fma_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovapd {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1] ; CHECK-NEXT: vmovapd {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1]
; CHECK-NEXT: vmovapd {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0] ; CHECK-NEXT: vmovapd {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0]
; CHECK-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + mem ; CHECK-NEXT: vfmadd213pd {{.*#+}} ymm0 = (ymm1 * ymm0) + mem
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <4 x double> @llvm.experimental.constrained.fma.v4f64( %fma = call <4 x double> @llvm.experimental.constrained.fma.v4f64(
<4 x double> <double 3.5, double 2.5, double 1.5, double 0.5>, <4 x double> <double 3.5, double 2.5, double 1.5, double 0.5>,
<4 x double> <double 7.5, double 6.5, double 5.5, double 4.5>, <4 x double> <double 7.5, double 6.5, double 5.5, double 4.5>,
<4 x double> <double 11.5, double 10.5, double 9.5, double 8.5>, <4 x double> <double 11.5, double 10.5, double 9.5, double 8.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %fma ret <4 x double> %fma
} }
define <4 x float> @constrained_vector_fma_v4f32() { define <4 x float> @constrained_vector_fma_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fma_v4f32: ; CHECK-LABEL: constrained_vector_fma_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovaps {{.*#+}} xmm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1] ; CHECK-NEXT: vmovaps {{.*#+}} xmm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1]
; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0] ; CHECK-NEXT: vmovaps {{.*#+}} xmm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0]
; CHECK-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + mem ; CHECK-NEXT: vfmadd213ps {{.*#+}} xmm0 = (xmm1 * xmm0) + mem
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32( %fma = call <4 x float> @llvm.experimental.constrained.fma.v4f32(
<4 x float> <float 3.5, float 2.5, float 1.5, float 0.5>, <4 x float> <float 3.5, float 2.5, float 1.5, float 0.5>,
<4 x float> <float 7.5, float 6.5, float 5.5, float 4.5>, <4 x float> <float 7.5, float 6.5, float 5.5, float 4.5>,
<4 x float> <float 11.5, float 10.5, float 9.5, float 8.5>, <4 x float> <float 11.5, float 10.5, float 9.5, float 8.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %fma ret <4 x float> %fma
} }
define <8 x float> @constrained_vector_fma_v8f32() { define <8 x float> @constrained_vector_fma_v8f32() #0 {
; CHECK-LABEL: constrained_vector_fma_v8f32: ; CHECK-LABEL: constrained_vector_fma_v8f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1,7.5E+0,6.5E+0,5.5E+0,4.5E+0] ; CHECK-NEXT: vmovaps {{.*#+}} ymm1 = [3.5E+0,2.5E+0,1.5E+0,5.0E-1,7.5E+0,6.5E+0,5.5E+0,4.5E+0]
; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0,1.15E+1,1.05E+1,9.5E+0,8.5E+0] ; CHECK-NEXT: vmovaps {{.*#+}} ymm0 = [7.5E+0,6.5E+0,5.5E+0,4.5E+0,1.15E+1,1.05E+1,9.5E+0,8.5E+0]
; CHECK-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + mem ; CHECK-NEXT: vfmadd213ps {{.*#+}} ymm0 = (ymm1 * ymm0) + mem
; CHECK-NEXT: retq ; CHECK-NEXT: retq
entry: entry:
%fma = call <8 x float> @llvm.experimental.constrained.fma.v8f32( %fma = call <8 x float> @llvm.experimental.constrained.fma.v8f32(
<8 x float> <float 3.5, float 2.5, float 1.5, float 0.5, <8 x float> <float 3.5, float 2.5, float 1.5, float 0.5,
float 7.5, float 6.5, float 5.5, float 4.5>, float 7.5, float 6.5, float 5.5, float 4.5>,
<8 x float> <float 7.5, float 6.5, float 5.5, float 4.5, <8 x float> <float 7.5, float 6.5, float 5.5, float 4.5,
float 11.5, float 10.5, float 9.5, float 8.5>, float 11.5, float 10.5, float 9.5, float 8.5>,
<8 x float> <float 11.5, float 10.5, float 9.5, float 8.5, <8 x float> <float 11.5, float 10.5, float 9.5, float 8.5,
float 15.5, float 14.5, float 13.5, float 12.5>, float 15.5, float 14.5, float 13.5, float 12.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <8 x float> %fma ret <8 x float> %fma
} }
attributes #0 = { strictfp }
; Single width declarations ; Single width declarations
declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fma.v2f64(<2 x double>, <2 x double>, <2 x double>, metadata, metadata)
declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata) declare <4 x float> @llvm.experimental.constrained.fma.v4f32(<4 x float>, <4 x float>, <4 x float>, metadata, metadata)
; Scalar width declarations ; Scalar width declarations
declare <1 x float> @llvm.experimental.constrained.fma.v1f32(<1 x float>, <1 x float>, <1 x float>, metadata, metadata) declare <1 x float> @llvm.experimental.constrained.fma.v1f32(<1 x float>, <1 x float>, <1 x float>, metadata, metadata)
; Illegal width declarations ; Illegal width declarations
declare <3 x float> @llvm.experimental.constrained.fma.v3f32(<3 x float>, <3 x float>, <3 x float>, metadata, metadata) declare <3 x float> @llvm.experimental.constrained.fma.v3f32(<3 x float>, <3 x float>, <3 x float>, metadata, metadata)
declare <3 x double> @llvm.experimental.constrained.fma.v3f64(<3 x double>, <3 x double>, <3 x double>, metadata, metadata) declare <3 x double> @llvm.experimental.constrained.fma.v3f64(<3 x double>, <3 x double>, <3 x double>, metadata, metadata)
; Double width declarations ; Double width declarations
declare <4 x double> @llvm.experimental.constrained.fma.v4f64(<4 x double>, <4 x double>, <4 x double>, metadata, metadata) declare <4 x double> @llvm.experimental.constrained.fma.v4f64(<4 x double>, <4 x double>, <4 x double>, metadata, metadata)
declare <8 x float> @llvm.experimental.constrained.fma.v8f32(<8 x float>, <8 x float>, <8 x float>, metadata, metadata) declare <8 x float> @llvm.experimental.constrained.fma.v8f32(<8 x float>, <8 x float>, <8 x float>, metadata, metadata)

llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s
; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck --check-prefix=AVX %s ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck --check-prefix=AVX %s
define <1 x float> @constrained_vector_fdiv_v1f32() { define <1 x float> @constrained_vector_fdiv_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fdiv_v1f32: ; CHECK-LABEL: constrained_vector_fdiv_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: divss {{.*}}(%rip), %xmm0 ; CHECK-NEXT: divss {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fdiv_v1f32: ; AVX-LABEL: constrained_vector_fdiv_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vdivss {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vdivss {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32( %div = call <1 x float> @llvm.experimental.constrained.fdiv.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %div ret <1 x float> %div
} }
define <2 x double> @constrained_vector_fdiv_v2f64() { define <2 x double> @constrained_vector_fdiv_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fdiv_v2f64: ; CHECK-LABEL: constrained_vector_fdiv_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fdiv_v2f64: ; AVX-LABEL: constrained_vector_fdiv_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64( %div = call <2 x double> @llvm.experimental.constrained.fdiv.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %div ret <2 x double> %div
} }
define <3 x float> @constrained_vector_fdiv_v3f32() { define <3 x float> @constrained_vector_fdiv_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fdiv_v3f32: ; CHECK-LABEL: constrained_vector_fdiv_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: divss %xmm1, %xmm2 ; CHECK-NEXT: divss %xmm1, %xmm2
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: divss %xmm1, %xmm0 ; CHECK-NEXT: divss %xmm1, %xmm0
; CHECK-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm3 = mem[0],zero,zero,zero
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0],xmm0[0],xmm2[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32( %div = call <3 x float> @llvm.experimental.constrained.fdiv.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %div ret <3 x float> %div
} }
define <3 x double> @constrained_vector_fdiv_v3f64() { define <3 x double> @constrained_vector_fdiv_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fdiv_v3f64: ; CHECK-LABEL: constrained_vector_fdiv_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: divpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: divsd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: divsd {{.*}}(%rip), %xmm1
; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movapd %xmm0, %xmm1 ; CHECK-NEXT: movapd %xmm0, %xmm1
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; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm1, %xmm1 ; AVX-NEXT: vdivpd {{.*}}(%rip), %xmm1, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64( %div = call <3 x double> @llvm.experimental.constrained.fdiv.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>, <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %div ret <3 x double> %div
} }
define <4 x double> @constrained_vector_fdiv_v4f64() { define <4 x double> @constrained_vector_fdiv_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fdiv_v4f64: ; CHECK-LABEL: constrained_vector_fdiv_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1] ; CHECK-NEXT: movapd {{.*#+}} xmm2 = [1.0E+1,1.0E+1]
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.0E+0,2.0E+0]
; CHECK-NEXT: divpd %xmm2, %xmm0 ; CHECK-NEXT: divpd %xmm2, %xmm0
; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0] ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [3.0E+0,4.0E+0]
; CHECK-NEXT: divpd %xmm2, %xmm1 ; CHECK-NEXT: divpd %xmm2, %xmm1
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fdiv_v4f64: ; AVX-LABEL: constrained_vector_fdiv_v4f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0] ; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.0E+0,2.0E+0,3.0E+0,4.0E+0]
; AVX-NEXT: vdivpd {{.*}}(%rip), %ymm0, %ymm0 ; AVX-NEXT: vdivpd {{.*}}(%rip), %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64( %div = call <4 x double> @llvm.experimental.constrained.fdiv.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %div ret <4 x double> %div
} }
define <1 x float> @constrained_vector_frem_v1f32() { define <1 x float> @constrained_vector_frem_v1f32() #0 {
; CHECK-LABEL: constrained_vector_frem_v1f32: ; CHECK-LABEL: constrained_vector_frem_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf ; CHECK-NEXT: callq fmodf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
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; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32( %rem = call <1 x float> @llvm.experimental.constrained.frem.v1f32(
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
<1 x float> <float 1.000000e+01>, <1 x float> <float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %rem ret <1 x float> %rem
} }
define <2 x double> @constrained_vector_frem_v2f64() { define <2 x double> @constrained_vector_frem_v2f64() #0 {
; CHECK-LABEL: constrained_vector_frem_v2f64: ; CHECK-LABEL: constrained_vector_frem_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmod ; CHECK-NEXT: callq fmod
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64( %rem = call <2 x double> @llvm.experimental.constrained.frem.v2f64(
<2 x double> <double 1.000000e+00, double 2.000000e+00>, <2 x double> <double 1.000000e+00, double 2.000000e+00>,
<2 x double> <double 1.000000e+01, double 1.000000e+01>, <2 x double> <double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %rem ret <2 x double> %rem
} }
define <3 x float> @constrained_vector_frem_v3f32() { define <3 x float> @constrained_vector_frem_v3f32() #0 {
; CHECK-LABEL: constrained_vector_frem_v3f32: ; CHECK-LABEL: constrained_vector_frem_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmodf ; CHECK-NEXT: callq fmodf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32( %rem = call <3 x float> @llvm.experimental.constrained.frem.v3f32(
<3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>, <3 x float> <float 1.000000e+00, float 2.000000e+00, float 3.000000e+00>,
<3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>, <3 x float> <float 1.000000e+01, float 1.000000e+01, float 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %rem ret <3 x float> %rem
} }
define <3 x double> @constrained_vector_frem_v3f64() { define <3 x double> @constrained_vector_frem_v3f64() #0 {
; CHECK-LABEL: constrained_vector_frem_v3f64: ; CHECK-LABEL: constrained_vector_frem_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmod ; CHECK-NEXT: callq fmod
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64( %rem = call <3 x double> @llvm.experimental.constrained.frem.v3f64(
<3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>, <3 x double> <double 1.000000e+00, double 2.000000e+00, double 3.000000e+00>,
<3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>, <3 x double> <double 1.000000e+01, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %rem ret <3 x double> %rem
} }
define <4 x double> @constrained_vector_frem_v4f64() { define <4 x double> @constrained_vector_frem_v4f64() #0 {
; CHECK-LABEL: constrained_vector_frem_v4f64: ; CHECK-LABEL: constrained_vector_frem_v4f64:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmod ; CHECK-NEXT: callq fmod
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
%rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64( %rem = call <4 x double> @llvm.experimental.constrained.frem.v4f64(
<4 x double> <double 1.000000e+00, double 2.000000e+00, <4 x double> <double 1.000000e+00, double 2.000000e+00,
double 3.000000e+00, double 4.000000e+00>, double 3.000000e+00, double 4.000000e+00>,
<4 x double> <double 1.000000e+01, double 1.000000e+01, <4 x double> <double 1.000000e+01, double 1.000000e+01,
double 1.000000e+01, double 1.000000e+01>, double 1.000000e+01, double 1.000000e+01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %rem ret <4 x double> %rem
} }
define <1 x float> @constrained_vector_fmul_v1f32() { define <1 x float> @constrained_vector_fmul_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fmul_v1f32: ; CHECK-LABEL: constrained_vector_fmul_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0 ; CHECK-NEXT: mulss {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fmul_v1f32: ; AVX-LABEL: constrained_vector_fmul_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vmulss {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32( %mul = call <1 x float> @llvm.experimental.constrained.fmul.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 2.000000e+00>, <1 x float> <float 2.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %mul ret <1 x float> %mul
} }
define <2 x double> @constrained_vector_fmul_v2f64() { define <2 x double> @constrained_vector_fmul_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fmul_v2f64: ; CHECK-LABEL: constrained_vector_fmul_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fmul_v2f64: ; AVX-LABEL: constrained_vector_fmul_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308] ; AVX-NEXT: vmovapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
; AVX-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64( %mul = call <2 x double> @llvm.experimental.constrained.fmul.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 2.000000e+00, double 3.000000e+00>, <2 x double> <double 2.000000e+00, double 3.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %mul ret <2 x double> %mul
} }
define <3 x float> @constrained_vector_fmul_v3f32() { define <3 x float> @constrained_vector_fmul_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fmul_v3f32: ; CHECK-LABEL: constrained_vector_fmul_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: mulss %xmm1, %xmm2 ; CHECK-NEXT: mulss %xmm1, %xmm2
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: mulss %xmm1, %xmm0 ; CHECK-NEXT: mulss %xmm1, %xmm0
; CHECK-NEXT: mulss {{.*}}(%rip), %xmm1 ; CHECK-NEXT: mulss {{.*}}(%rip), %xmm1
Show All 11 Lines
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32( %mul = call <3 x float> @llvm.experimental.constrained.fmul.v3f32(
<3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000, <3 x float> <float 0x7FF0000000000000, float 0x7FF0000000000000,
float 0x7FF0000000000000>, float 0x7FF0000000000000>,
<3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>, <3 x float> <float 1.000000e+00, float 1.000000e+01, float 1.000000e+02>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %mul ret <3 x float> %mul
} }
define <3 x double> @constrained_vector_fmul_v3f64() { define <3 x double> @constrained_vector_fmul_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fmul_v3f64: ; CHECK-LABEL: constrained_vector_fmul_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [1.7976931348623157E+308,1.7976931348623157E+308]
; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: mulsd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: mulsd {{.*}}(%rip), %xmm1
; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movapd %xmm0, %xmm1 ; CHECK-NEXT: movapd %xmm0, %xmm1
Show All 10 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64( %mul = call <3 x double> @llvm.experimental.constrained.fmul.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>, <3 x double> <double 1.000000e+00, double 1.000000e+01, double 1.000000e+02>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %mul ret <3 x double> %mul
} }
define <4 x double> @constrained_vector_fmul_v4f64() { define <4 x double> @constrained_vector_fmul_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fmul_v4f64: ; CHECK-LABEL: constrained_vector_fmul_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308] ; CHECK-NEXT: movapd {{.*#+}} xmm1 = [1.7976931348623157E+308,1.7976931348623157E+308]
; CHECK-NEXT: movapd {{.*#+}} xmm0 = [2.0E+0,3.0E+0] ; CHECK-NEXT: movapd {{.*#+}} xmm0 = [2.0E+0,3.0E+0]
; CHECK-NEXT: mulpd %xmm1, %xmm0 ; CHECK-NEXT: mulpd %xmm1, %xmm0
; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: mulpd {{.*}}(%rip), %xmm1
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fmul_v4f64: ; AVX-LABEL: constrained_vector_fmul_v4f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308] ; AVX-NEXT: vmovapd {{.*#+}} ymm0 = [1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308,1.7976931348623157E+308]
; AVX-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0 ; AVX-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64( %mul = call <4 x double> @llvm.experimental.constrained.fmul.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 2.000000e+00, double 3.000000e+00, <4 x double> <double 2.000000e+00, double 3.000000e+00,
double 4.000000e+00, double 5.000000e+00>, double 4.000000e+00, double 5.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %mul ret <4 x double> %mul
} }
define <1 x float> @constrained_vector_fadd_v1f32() { define <1 x float> @constrained_vector_fadd_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fadd_v1f32: ; CHECK-LABEL: constrained_vector_fadd_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: addss {{.*}}(%rip), %xmm0 ; CHECK-NEXT: addss {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fadd_v1f32: ; AVX-LABEL: constrained_vector_fadd_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vaddss {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vaddss {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32( %add = call <1 x float> @llvm.experimental.constrained.fadd.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.0>, <1 x float> <float 1.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %add ret <1 x float> %add
} }
define <2 x double> @constrained_vector_fadd_v2f64() { define <2 x double> @constrained_vector_fadd_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fadd_v2f64: ; CHECK-LABEL: constrained_vector_fadd_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: addsd %xmm0, %xmm1 ; CHECK-NEXT: addsd %xmm0, %xmm1
; CHECK-NEXT: addsd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: addsd {{.*}}(%rip), %xmm0
; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fadd_v2f64: ; AVX-LABEL: constrained_vector_fadd_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm1 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm1
; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vaddsd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64( %add = call <2 x double> @llvm.experimental.constrained.fadd.v2f64(
<2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, <2 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %add ret <2 x double> %add
} }
define <3 x float> @constrained_vector_fadd_v3f32() { define <3 x float> @constrained_vector_fadd_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fadd_v3f32: ; CHECK-LABEL: constrained_vector_fadd_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorps %xmm1, %xmm1 ; CHECK-NEXT: xorps %xmm1, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: addss %xmm2, %xmm1 ; CHECK-NEXT: addss %xmm2, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: addss %xmm2, %xmm0 ; CHECK-NEXT: addss %xmm2, %xmm0
; CHECK-NEXT: addss {{.*}}(%rip), %xmm2 ; CHECK-NEXT: addss {{.*}}(%rip), %xmm2
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32( %add = call <3 x float> @llvm.experimental.constrained.fadd.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %add ret <3 x float> %add
} }
define <3 x double> @constrained_vector_fadd_v3f64() { define <3 x double> @constrained_vector_fadd_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fadd_v3f64: ; CHECK-LABEL: constrained_vector_fadd_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorpd %xmm2, %xmm2 ; CHECK-NEXT: xorpd %xmm2, %xmm2
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: addsd %xmm1, %xmm2 ; CHECK-NEXT: addsd %xmm1, %xmm2
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: addsd %xmm1, %xmm0 ; CHECK-NEXT: addsd %xmm1, %xmm0
; CHECK-NEXT: addsd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: addsd {{.*}}(%rip), %xmm1
Show All 12 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64( %add = call <3 x double> @llvm.experimental.constrained.fadd.v3f64(
<3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <3 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF>,
<3 x double> <double 2.0, double 1.0, double 0.0>, <3 x double> <double 2.0, double 1.0, double 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %add ret <3 x double> %add
} }
define <4 x double> @constrained_vector_fadd_v4f64() { define <4 x double> @constrained_vector_fadd_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fadd_v4f64: ; CHECK-LABEL: constrained_vector_fadd_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm2 = mem[0],zero
; CHECK-NEXT: addsd %xmm1, %xmm2 ; CHECK-NEXT: addsd %xmm1, %xmm2
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: addsd %xmm1, %xmm0 ; CHECK-NEXT: addsd %xmm1, %xmm0
; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
Show All 16 Lines
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64( %add = call <4 x double> @llvm.experimental.constrained.fadd.v4f64(
<4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF, <4 x double> <double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF,
double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>, double 0x7FEFFFFFFFFFFFFF, double 0x7FEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %add ret <4 x double> %add
} }
define <1 x float> @constrained_vector_fsub_v1f32() { define <1 x float> @constrained_vector_fsub_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fsub_v1f32: ; CHECK-LABEL: constrained_vector_fsub_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: subss {{.*}}(%rip), %xmm0 ; CHECK-NEXT: subss {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fsub_v1f32: ; AVX-LABEL: constrained_vector_fsub_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vsubss {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vsubss {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32( %sub = call <1 x float> @llvm.experimental.constrained.fsub.v1f32(
<1 x float> <float 0x7FF0000000000000>, <1 x float> <float 0x7FF0000000000000>,
<1 x float> <float 1.000000e+00>, <1 x float> <float 1.000000e+00>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sub ret <1 x float> %sub
} }
define <2 x double> @constrained_vector_fsub_v2f64() { define <2 x double> @constrained_vector_fsub_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fsub_v2f64: ; CHECK-LABEL: constrained_vector_fsub_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movapd %xmm0, %xmm1 ; CHECK-NEXT: movapd %xmm0, %xmm1
; CHECK-NEXT: subsd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm1
; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fsub_v2f64: ; AVX-LABEL: constrained_vector_fsub_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm1 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm1
; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm0 ; AVX-NEXT: vsubsd {{.*}}(%rip), %xmm0, %xmm0
; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; AVX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64( %sub = call <2 x double> @llvm.experimental.constrained.fsub.v2f64(
<2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, <2 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<2 x double> <double 1.000000e+00, double 1.000000e-01>, <2 x double> <double 1.000000e+00, double 1.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sub ret <2 x double> %sub
} }
define <3 x float> @constrained_vector_fsub_v3f32() { define <3 x float> @constrained_vector_fsub_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fsub_v3f32: ; CHECK-LABEL: constrained_vector_fsub_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorps %xmm0, %xmm0 ; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: movaps %xmm1, %xmm2 ; CHECK-NEXT: movaps %xmm1, %xmm2
; CHECK-NEXT: subss %xmm0, %xmm2 ; CHECK-NEXT: subss %xmm0, %xmm2
; CHECK-NEXT: movaps %xmm1, %xmm0 ; CHECK-NEXT: movaps %xmm1, %xmm0
; CHECK-NEXT: subss {{.*}}(%rip), %xmm0 ; CHECK-NEXT: subss {{.*}}(%rip), %xmm0
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; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32( %sub = call <3 x float> @llvm.experimental.constrained.fsub.v3f32(
<3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, <3 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000,
float 0xFFFFFFFFE0000000>, float 0xFFFFFFFFE0000000>,
<3 x float> <float 2.0, float 1.0, float 0.0>, <3 x float> <float 2.0, float 1.0, float 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sub ret <3 x float> %sub
} }
define <3 x double> @constrained_vector_fsub_v3f64() { define <3 x double> @constrained_vector_fsub_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fsub_v3f64: ; CHECK-LABEL: constrained_vector_fsub_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xorpd %xmm0, %xmm0 ; CHECK-NEXT: xorpd %xmm0, %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: movapd %xmm1, %xmm2 ; CHECK-NEXT: movapd %xmm1, %xmm2
; CHECK-NEXT: subsd %xmm0, %xmm2 ; CHECK-NEXT: subsd %xmm0, %xmm2
; CHECK-NEXT: movapd %xmm1, %xmm0 ; CHECK-NEXT: movapd %xmm1, %xmm0
; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64( %sub = call <3 x double> @llvm.experimental.constrained.fsub.v3f64(
<3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <3 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF>,
<3 x double> <double 2.0, double 1.0, double 0.0>, <3 x double> <double 2.0, double 1.0, double 0.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %sub ret <3 x double> %sub
} }
define <4 x double> @constrained_vector_fsub_v4f64() { define <4 x double> @constrained_vector_fsub_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fsub_v4f64: ; CHECK-LABEL: constrained_vector_fsub_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: movapd %xmm1, %xmm2 ; CHECK-NEXT: movapd %xmm1, %xmm2
; CHECK-NEXT: subsd {{.*}}(%rip), %xmm2 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm2
; CHECK-NEXT: movapd %xmm1, %xmm0 ; CHECK-NEXT: movapd %xmm1, %xmm0
; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: subsd {{.*}}(%rip), %xmm0
; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] ; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0]
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; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64( %sub = call <4 x double> @llvm.experimental.constrained.fsub.v4f64(
<4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF, <4 x double> <double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF,
double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>, double 0xFFEFFFFFFFFFFFFF, double 0xFFEFFFFFFFFFFFFF>,
<4 x double> <double 1.000000e+00, double 1.000000e-01, <4 x double> <double 1.000000e+00, double 1.000000e-01,
double 2.000000e+00, double 2.000000e-01>, double 2.000000e+00, double 2.000000e-01>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sub ret <4 x double> %sub
} }
define <1 x float> @constrained_vector_sqrt_v1f32() { define <1 x float> @constrained_vector_sqrt_v1f32() #0 {
; CHECK-LABEL: constrained_vector_sqrt_v1f32: ; CHECK-LABEL: constrained_vector_sqrt_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: sqrtss %xmm0, %xmm0 ; CHECK-NEXT: sqrtss %xmm0, %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sqrt_v1f32: ; AVX-LABEL: constrained_vector_sqrt_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vsqrtss %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32( %sqrt = call <1 x float> @llvm.experimental.constrained.sqrt.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sqrt ret <1 x float> %sqrt
} }
define <2 x double> @constrained_vector_sqrt_v2f64() { define <2 x double> @constrained_vector_sqrt_v2f64() #0 {
; CHECK-LABEL: constrained_vector_sqrt_v2f64: ; CHECK-LABEL: constrained_vector_sqrt_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sqrt_v2f64: ; AVX-LABEL: constrained_vector_sqrt_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm0 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64( %sqrt = call <2 x double> @llvm.experimental.constrained.sqrt.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sqrt ret <2 x double> %sqrt
} }
define <3 x float> @constrained_vector_sqrt_v3f32() { define <3 x float> @constrained_vector_sqrt_v3f32() #0 {
; CHECK-LABEL: constrained_vector_sqrt_v3f32: ; CHECK-LABEL: constrained_vector_sqrt_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: sqrtss %xmm0, %xmm1 ; CHECK-NEXT: sqrtss %xmm0, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: sqrtss %xmm0, %xmm0 ; CHECK-NEXT: sqrtss %xmm0, %xmm0
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: sqrtss %xmm2, %xmm2 ; CHECK-NEXT: sqrtss %xmm2, %xmm2
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; AVX-NEXT: vsqrtss %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vsqrtss %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32( %sqrt = call <3 x float> @llvm.experimental.constrained.sqrt.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sqrt ret <3 x float> %sqrt
} }
define <3 x double> @constrained_vector_sqrt_v3f64() { define <3 x double> @constrained_vector_sqrt_v3f64() #0 {
; CHECK-LABEL: constrained_vector_sqrt_v3f64: ; CHECK-LABEL: constrained_vector_sqrt_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: sqrtsd %xmm0, %xmm1 ; CHECK-NEXT: sqrtsd %xmm0, %xmm1
; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp) ; CHECK-NEXT: movsd %xmm1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movapd %xmm0, %xmm1 ; CHECK-NEXT: movapd %xmm0, %xmm1
; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1] ; CHECK-NEXT: unpckhpd {{.*#+}} xmm1 = xmm1[1],xmm0[1]
; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp) ; CHECK-NEXT: fldl -{{[0-9]+}}(%rsp)
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sqrt_v3f64: ; AVX-LABEL: constrained_vector_sqrt_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vsqrtsd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm1 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64( %sqrt = call <3 x double> @llvm.experimental.constrained.sqrt.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %sqrt ret <3 x double> %sqrt
} }
define <4 x double> @constrained_vector_sqrt_v4f64() { define <4 x double> @constrained_vector_sqrt_v4f64() #0 {
; CHECK-LABEL: constrained_vector_sqrt_v4f64: ; CHECK-LABEL: constrained_vector_sqrt_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm0
; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm1 ; CHECK-NEXT: sqrtpd {{.*}}(%rip), %xmm1
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sqrt_v4f64: ; AVX-LABEL: constrained_vector_sqrt_v4f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vsqrtpd {{.*}}(%rip), %ymm0 ; AVX-NEXT: vsqrtpd {{.*}}(%rip), %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64( %sqrt = call <4 x double> @llvm.experimental.constrained.sqrt.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sqrt ret <4 x double> %sqrt
} }
define <1 x float> @constrained_vector_pow_v1f32() { define <1 x float> @constrained_vector_pow_v1f32() #0 {
; CHECK-LABEL: constrained_vector_pow_v1f32: ; CHECK-LABEL: constrained_vector_pow_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq powf ; CHECK-NEXT: callq powf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
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; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32( %pow = call <1 x float> @llvm.experimental.constrained.pow.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
<1 x float> <float 3.0>, <1 x float> <float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %pow ret <1 x float> %pow
} }
define <2 x double> @constrained_vector_pow_v2f64() { define <2 x double> @constrained_vector_pow_v2f64() #0 {
; CHECK-LABEL: constrained_vector_pow_v2f64: ; CHECK-LABEL: constrained_vector_pow_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; CHECK-NEXT: callq pow
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64( %pow = call <2 x double> @llvm.experimental.constrained.pow.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
<2 x double> <double 3.0, double 3.0>, <2 x double> <double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %pow ret <2 x double> %pow
} }
define <3 x float> @constrained_vector_pow_v3f32() { define <3 x float> @constrained_vector_pow_v3f32() #0 {
; CHECK-LABEL: constrained_vector_pow_v3f32: ; CHECK-LABEL: constrained_vector_pow_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq powf ; CHECK-NEXT: callq powf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32( %pow = call <3 x float> @llvm.experimental.constrained.pow.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
<3 x float> <float 3.0, float 3.0, float 3.0>, <3 x float> <float 3.0, float 3.0, float 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %pow ret <3 x float> %pow
} }
define <3 x double> @constrained_vector_pow_v3f64() { define <3 x double> @constrained_vector_pow_v3f64() #0 {
; CHECK-LABEL: constrained_vector_pow_v3f64: ; CHECK-LABEL: constrained_vector_pow_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; CHECK-NEXT: callq pow
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64( %pow = call <3 x double> @llvm.experimental.constrained.pow.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
<3 x double> <double 3.0, double 3.0, double 3.0>, <3 x double> <double 3.0, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %pow ret <3 x double> %pow
} }
define <4 x double> @constrained_vector_pow_v4f64() { define <4 x double> @constrained_vector_pow_v4f64() #0 {
; CHECK-LABEL: constrained_vector_pow_v4f64: ; CHECK-LABEL: constrained_vector_pow_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq pow ; CHECK-NEXT: callq pow
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64( %pow = call <4 x double> @llvm.experimental.constrained.pow.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
<4 x double> <double 3.0, double 3.0, <4 x double> <double 3.0, double 3.0,
double 3.0, double 3.0>, double 3.0, double 3.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %pow ret <4 x double> %pow
} }
define <1 x float> @constrained_vector_powi_v1f32() { define <1 x float> @constrained_vector_powi_v1f32() #0 {
; CHECK-LABEL: constrained_vector_powi_v1f32: ; CHECK-LABEL: constrained_vector_powi_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powisf2 ; CHECK-NEXT: callq __powisf2
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
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; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32( %powi = call <1 x float> @llvm.experimental.constrained.powi.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %powi ret <1 x float> %powi
} }
define <2 x double> @constrained_vector_powi_v2f64() { define <2 x double> @constrained_vector_powi_v2f64() #0 {
; CHECK-LABEL: constrained_vector_powi_v2f64: ; CHECK-LABEL: constrained_vector_powi_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powidf2 ; CHECK-NEXT: callq __powidf2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64( %powi = call <2 x double> @llvm.experimental.constrained.powi.v2f64(
<2 x double> <double 42.1, double 42.2>, <2 x double> <double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %powi ret <2 x double> %powi
} }
define <3 x float> @constrained_vector_powi_v3f32() { define <3 x float> @constrained_vector_powi_v3f32() #0 {
; CHECK-LABEL: constrained_vector_powi_v3f32: ; CHECK-LABEL: constrained_vector_powi_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powisf2 ; CHECK-NEXT: callq __powisf2
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32( %powi = call <3 x float> @llvm.experimental.constrained.powi.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %powi ret <3 x float> %powi
} }
define <3 x double> @constrained_vector_powi_v3f64() { define <3 x double> @constrained_vector_powi_v3f64() #0 {
; CHECK-LABEL: constrained_vector_powi_v3f64: ; CHECK-LABEL: constrained_vector_powi_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powidf2 ; CHECK-NEXT: callq __powidf2
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64( %powi = call <3 x double> @llvm.experimental.constrained.powi.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %powi ret <3 x double> %powi
} }
define <4 x double> @constrained_vector_powi_v4f64() { define <4 x double> @constrained_vector_powi_v4f64() #0 {
; CHECK-LABEL: constrained_vector_powi_v4f64: ; CHECK-LABEL: constrained_vector_powi_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movl $3, %edi ; CHECK-NEXT: movl $3, %edi
; CHECK-NEXT: callq __powidf2 ; CHECK-NEXT: callq __powidf2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64( %powi = call <4 x double> @llvm.experimental.constrained.powi.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %powi ret <4 x double> %powi
} }
define <1 x float> @constrained_vector_sin_v1f32() { define <1 x float> @constrained_vector_sin_v1f32() #0 {
; CHECK-LABEL: constrained_vector_sin_v1f32: ; CHECK-LABEL: constrained_vector_sin_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq sinf ; CHECK-NEXT: callq sinf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_sin_v1f32: ; AVX-LABEL: constrained_vector_sin_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq sinf ; AVX-NEXT: callq sinf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32( %sin = call <1 x float> @llvm.experimental.constrained.sin.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %sin ret <1 x float> %sin
} }
define <2 x double> @constrained_vector_sin_v2f64() { define <2 x double> @constrained_vector_sin_v2f64() #0 {
; CHECK-LABEL: constrained_vector_sin_v2f64: ; CHECK-LABEL: constrained_vector_sin_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; CHECK-NEXT: callq sin
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64( %sin = call <2 x double> @llvm.experimental.constrained.sin.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %sin ret <2 x double> %sin
} }
define <3 x float> @constrained_vector_sin_v3f32() { define <3 x float> @constrained_vector_sin_v3f32() #0 {
; CHECK-LABEL: constrained_vector_sin_v3f32: ; CHECK-LABEL: constrained_vector_sin_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq sinf ; CHECK-NEXT: callq sinf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32( %sin = call <3 x float> @llvm.experimental.constrained.sin.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %sin ret <3 x float> %sin
} }
define <3 x double> @constrained_vector_sin_v3f64() { define <3 x double> @constrained_vector_sin_v3f64() #0 {
; CHECK-LABEL: constrained_vector_sin_v3f64: ; CHECK-LABEL: constrained_vector_sin_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; CHECK-NEXT: callq sin
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64( %sin = call <3 x double> @llvm.experimental.constrained.sin.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %sin ret <3 x double> %sin
} }
define <4 x double> @constrained_vector_sin_v4f64() { define <4 x double> @constrained_vector_sin_v4f64() #0 {
; CHECK-LABEL: constrained_vector_sin_v4f64: ; CHECK-LABEL: constrained_vector_sin_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq sin ; CHECK-NEXT: callq sin
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64( %sin = call <4 x double> @llvm.experimental.constrained.sin.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %sin ret <4 x double> %sin
} }
define <1 x float> @constrained_vector_cos_v1f32() { define <1 x float> @constrained_vector_cos_v1f32() #0 {
; CHECK-LABEL: constrained_vector_cos_v1f32: ; CHECK-LABEL: constrained_vector_cos_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq cosf ; CHECK-NEXT: callq cosf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_cos_v1f32: ; AVX-LABEL: constrained_vector_cos_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq cosf ; AVX-NEXT: callq cosf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32( %cos = call <1 x float> @llvm.experimental.constrained.cos.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %cos ret <1 x float> %cos
} }
define <2 x double> @constrained_vector_cos_v2f64() { define <2 x double> @constrained_vector_cos_v2f64() #0 {
; CHECK-LABEL: constrained_vector_cos_v2f64: ; CHECK-LABEL: constrained_vector_cos_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; CHECK-NEXT: callq cos
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64( %cos = call <2 x double> @llvm.experimental.constrained.cos.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %cos ret <2 x double> %cos
} }
define <3 x float> @constrained_vector_cos_v3f32() { define <3 x float> @constrained_vector_cos_v3f32() #0 {
; CHECK-LABEL: constrained_vector_cos_v3f32: ; CHECK-LABEL: constrained_vector_cos_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq cosf ; CHECK-NEXT: callq cosf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 28 Lines
; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32( %cos = call <3 x float> @llvm.experimental.constrained.cos.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %cos ret <3 x float> %cos
} }
define <3 x double> @constrained_vector_cos_v3f64() { define <3 x double> @constrained_vector_cos_v3f64() #0 {
; CHECK-LABEL: constrained_vector_cos_v3f64: ; CHECK-LABEL: constrained_vector_cos_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; CHECK-NEXT: callq cos
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64( %cos = call <3 x double> @llvm.experimental.constrained.cos.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %cos ret <3 x double> %cos
} }
define <4 x double> @constrained_vector_cos_v4f64() { define <4 x double> @constrained_vector_cos_v4f64() #0 {
; CHECK-LABEL: constrained_vector_cos_v4f64: ; CHECK-LABEL: constrained_vector_cos_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq cos ; CHECK-NEXT: callq cos
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64( %cos = call <4 x double> @llvm.experimental.constrained.cos.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %cos ret <4 x double> %cos
} }
define <1 x float> @constrained_vector_exp_v1f32() { define <1 x float> @constrained_vector_exp_v1f32() #0 {
; CHECK-LABEL: constrained_vector_exp_v1f32: ; CHECK-LABEL: constrained_vector_exp_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq expf ; CHECK-NEXT: callq expf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_exp_v1f32: ; AVX-LABEL: constrained_vector_exp_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq expf ; AVX-NEXT: callq expf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32( %exp = call <1 x float> @llvm.experimental.constrained.exp.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %exp ret <1 x float> %exp
} }
define <2 x double> @constrained_vector_exp_v2f64() { define <2 x double> @constrained_vector_exp_v2f64() #0 {
; CHECK-LABEL: constrained_vector_exp_v2f64: ; CHECK-LABEL: constrained_vector_exp_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; CHECK-NEXT: callq exp
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64( %exp = call <2 x double> @llvm.experimental.constrained.exp.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %exp ret <2 x double> %exp
} }
define <3 x float> @constrained_vector_exp_v3f32() { define <3 x float> @constrained_vector_exp_v3f32() #0 {
; CHECK-LABEL: constrained_vector_exp_v3f32: ; CHECK-LABEL: constrained_vector_exp_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq expf ; CHECK-NEXT: callq expf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 28 Lines
; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32( %exp = call <3 x float> @llvm.experimental.constrained.exp.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %exp ret <3 x float> %exp
} }
define <3 x double> @constrained_vector_exp_v3f64() { define <3 x double> @constrained_vector_exp_v3f64() #0 {
; CHECK-LABEL: constrained_vector_exp_v3f64: ; CHECK-LABEL: constrained_vector_exp_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; CHECK-NEXT: callq exp
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 30 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64( %exp = call <3 x double> @llvm.experimental.constrained.exp.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %exp ret <3 x double> %exp
} }
define <4 x double> @constrained_vector_exp_v4f64() { define <4 x double> @constrained_vector_exp_v4f64() #0 {
; CHECK-LABEL: constrained_vector_exp_v4f64: ; CHECK-LABEL: constrained_vector_exp_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp ; CHECK-NEXT: callq exp
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 37 Lines
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64( %exp = call <4 x double> @llvm.experimental.constrained.exp.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %exp ret <4 x double> %exp
} }
define <1 x float> @constrained_vector_exp2_v1f32() { define <1 x float> @constrained_vector_exp2_v1f32() #0 {
; CHECK-LABEL: constrained_vector_exp2_v1f32: ; CHECK-LABEL: constrained_vector_exp2_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq exp2f ; CHECK-NEXT: callq exp2f
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_exp2_v1f32: ; AVX-LABEL: constrained_vector_exp2_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq exp2f ; AVX-NEXT: callq exp2f
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32( %exp2 = call <1 x float> @llvm.experimental.constrained.exp2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %exp2 ret <1 x float> %exp2
} }
define <2 x double> @constrained_vector_exp2_v2f64() { define <2 x double> @constrained_vector_exp2_v2f64() #0 {
; CHECK-LABEL: constrained_vector_exp2_v2f64: ; CHECK-LABEL: constrained_vector_exp2_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; CHECK-NEXT: callq exp2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64( %exp2 = call <2 x double> @llvm.experimental.constrained.exp2.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %exp2 ret <2 x double> %exp2
} }
define <3 x float> @constrained_vector_exp2_v3f32() { define <3 x float> @constrained_vector_exp2_v3f32() #0 {
; CHECK-LABEL: constrained_vector_exp2_v3f32: ; CHECK-LABEL: constrained_vector_exp2_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq exp2f ; CHECK-NEXT: callq exp2f
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 28 Lines
; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32( %exp2 = call <3 x float> @llvm.experimental.constrained.exp2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %exp2 ret <3 x float> %exp2
} }
define <3 x double> @constrained_vector_exp2_v3f64() { define <3 x double> @constrained_vector_exp2_v3f64() #0 {
; CHECK-LABEL: constrained_vector_exp2_v3f64: ; CHECK-LABEL: constrained_vector_exp2_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; CHECK-NEXT: callq exp2
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 30 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64( %exp2 = call <3 x double> @llvm.experimental.constrained.exp2.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %exp2 ret <3 x double> %exp2
} }
define <4 x double> @constrained_vector_exp2_v4f64() { define <4 x double> @constrained_vector_exp2_v4f64() #0 {
; CHECK-LABEL: constrained_vector_exp2_v4f64: ; CHECK-LABEL: constrained_vector_exp2_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq exp2 ; CHECK-NEXT: callq exp2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 37 Lines
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64( %exp2 = call <4 x double> @llvm.experimental.constrained.exp2.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %exp2 ret <4 x double> %exp2
} }
define <1 x float> @constrained_vector_log_v1f32() { define <1 x float> @constrained_vector_log_v1f32() #0 {
; CHECK-LABEL: constrained_vector_log_v1f32: ; CHECK-LABEL: constrained_vector_log_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq logf ; CHECK-NEXT: callq logf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log_v1f32: ; AVX-LABEL: constrained_vector_log_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq logf ; AVX-NEXT: callq logf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log = call <1 x float> @llvm.experimental.constrained.log.v1f32( %log = call <1 x float> @llvm.experimental.constrained.log.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log ret <1 x float> %log
} }
define <2 x double> @constrained_vector_log_v2f64() { define <2 x double> @constrained_vector_log_v2f64() #0 {
; CHECK-LABEL: constrained_vector_log_v2f64: ; CHECK-LABEL: constrained_vector_log_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; CHECK-NEXT: callq log
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log = call <2 x double> @llvm.experimental.constrained.log.v2f64( %log = call <2 x double> @llvm.experimental.constrained.log.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log ret <2 x double> %log
} }
define <3 x float> @constrained_vector_log_v3f32() { define <3 x float> @constrained_vector_log_v3f32() #0 {
; CHECK-LABEL: constrained_vector_log_v3f32: ; CHECK-LABEL: constrained_vector_log_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq logf ; CHECK-NEXT: callq logf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log = call <3 x float> @llvm.experimental.constrained.log.v3f32( %log = call <3 x float> @llvm.experimental.constrained.log.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log ret <3 x float> %log
} }
define <3 x double> @constrained_vector_log_v3f64() { define <3 x double> @constrained_vector_log_v3f64() #0 {
; CHECK-LABEL: constrained_vector_log_v3f64: ; CHECK-LABEL: constrained_vector_log_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; CHECK-NEXT: callq log
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 30 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log = call <3 x double> @llvm.experimental.constrained.log.v3f64( %log = call <3 x double> @llvm.experimental.constrained.log.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %log ret <3 x double> %log
} }
define <4 x double> @constrained_vector_log_v4f64() { define <4 x double> @constrained_vector_log_v4f64() #0 {
; CHECK-LABEL: constrained_vector_log_v4f64: ; CHECK-LABEL: constrained_vector_log_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log ; CHECK-NEXT: callq log
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 37 Lines
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log = call <4 x double> @llvm.experimental.constrained.log.v4f64( %log = call <4 x double> @llvm.experimental.constrained.log.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log ret <4 x double> %log
} }
define <1 x float> @constrained_vector_log10_v1f32() { define <1 x float> @constrained_vector_log10_v1f32() #0 {
; CHECK-LABEL: constrained_vector_log10_v1f32: ; CHECK-LABEL: constrained_vector_log10_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq log10f ; CHECK-NEXT: callq log10f
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log10_v1f32: ; AVX-LABEL: constrained_vector_log10_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq log10f ; AVX-NEXT: callq log10f
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32( %log10 = call <1 x float> @llvm.experimental.constrained.log10.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log10 ret <1 x float> %log10
} }
define <2 x double> @constrained_vector_log10_v2f64() { define <2 x double> @constrained_vector_log10_v2f64() #0 {
; CHECK-LABEL: constrained_vector_log10_v2f64: ; CHECK-LABEL: constrained_vector_log10_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; CHECK-NEXT: callq log10
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64( %log10 = call <2 x double> @llvm.experimental.constrained.log10.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log10 ret <2 x double> %log10
} }
define <3 x float> @constrained_vector_log10_v3f32() { define <3 x float> @constrained_vector_log10_v3f32() #0 {
; CHECK-LABEL: constrained_vector_log10_v3f32: ; CHECK-LABEL: constrained_vector_log10_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq log10f ; CHECK-NEXT: callq log10f
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 28 Lines
; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32( %log10 = call <3 x float> @llvm.experimental.constrained.log10.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log10 ret <3 x float> %log10
} }
define <3 x double> @constrained_vector_log10_v3f64() { define <3 x double> @constrained_vector_log10_v3f64() #0 {
; CHECK-LABEL: constrained_vector_log10_v3f64: ; CHECK-LABEL: constrained_vector_log10_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; CHECK-NEXT: callq log10
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 30 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64( %log10 = call <3 x double> @llvm.experimental.constrained.log10.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %log10 ret <3 x double> %log10
} }
define <4 x double> @constrained_vector_log10_v4f64() { define <4 x double> @constrained_vector_log10_v4f64() #0 {
; CHECK-LABEL: constrained_vector_log10_v4f64: ; CHECK-LABEL: constrained_vector_log10_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log10 ; CHECK-NEXT: callq log10
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 37 Lines
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64( %log10 = call <4 x double> @llvm.experimental.constrained.log10.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log10 ret <4 x double> %log10
} }
define <1 x float> @constrained_vector_log2_v1f32() { define <1 x float> @constrained_vector_log2_v1f32() #0 {
; CHECK-LABEL: constrained_vector_log2_v1f32: ; CHECK-LABEL: constrained_vector_log2_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq log2f ; CHECK-NEXT: callq log2f
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_log2_v1f32: ; AVX-LABEL: constrained_vector_log2_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq log2f ; AVX-NEXT: callq log2f
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32( %log2 = call <1 x float> @llvm.experimental.constrained.log2.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %log2 ret <1 x float> %log2
} }
define <2 x double> @constrained_vector_log2_v2f64() { define <2 x double> @constrained_vector_log2_v2f64() #0 {
; CHECK-LABEL: constrained_vector_log2_v2f64: ; CHECK-LABEL: constrained_vector_log2_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; CHECK-NEXT: callq log2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64( %log2 = call <2 x double> @llvm.experimental.constrained.log2.v2f64(
<2 x double> <double 42.0, double 42.1>, <2 x double> <double 42.0, double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %log2 ret <2 x double> %log2
} }
define <3 x float> @constrained_vector_log2_v3f32() { define <3 x float> @constrained_vector_log2_v3f32() #0 {
; CHECK-LABEL: constrained_vector_log2_v3f32: ; CHECK-LABEL: constrained_vector_log2_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq log2f ; CHECK-NEXT: callq log2f
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 28 Lines
; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32( %log2 = call <3 x float> @llvm.experimental.constrained.log2.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %log2 ret <3 x float> %log2
} }
define <3 x double> @constrained_vector_log2_v3f64() { define <3 x double> @constrained_vector_log2_v3f64() #0 {
; CHECK-LABEL: constrained_vector_log2_v3f64: ; CHECK-LABEL: constrained_vector_log2_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; CHECK-NEXT: callq log2
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 30 Lines
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64( %log2 = call <3 x double> @llvm.experimental.constrained.log2.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %log2 ret <3 x double> %log2
} }
define <4 x double> @constrained_vector_log2_v4f64() { define <4 x double> @constrained_vector_log2_v4f64() #0 {
; CHECK-LABEL: constrained_vector_log2_v4f64: ; CHECK-LABEL: constrained_vector_log2_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq log2 ; CHECK-NEXT: callq log2
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 37 Lines
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64( %log2 = call <4 x double> @llvm.experimental.constrained.log2.v4f64(
<4 x double> <double 42.0, double 42.1, <4 x double> <double 42.0, double 42.1,
double 42.2, double 42.3>, double 42.2, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %log2 ret <4 x double> %log2
} }
define <1 x float> @constrained_vector_rint_v1f32() { define <1 x float> @constrained_vector_rint_v1f32() #0 {
; CHECK-LABEL: constrained_vector_rint_v1f32: ; CHECK-LABEL: constrained_vector_rint_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq rintf ; CHECK-NEXT: callq rintf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_rint_v1f32: ; AVX-LABEL: constrained_vector_rint_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundss $4, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32( %rint = call <1 x float> @llvm.experimental.constrained.rint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %rint ret <1 x float> %rint
} }
define <2 x double> @constrained_vector_rint_v2f64() { define <2 x double> @constrained_vector_rint_v2f64() #0 {
; CHECK-LABEL: constrained_vector_rint_v2f64: ; CHECK-LABEL: constrained_vector_rint_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_rint_v2f64: ; AVX-LABEL: constrained_vector_rint_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm0 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64( %rint = call <2 x double> @llvm.experimental.constrained.rint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %rint ret <2 x double> %rint
} }
define <3 x float> @constrained_vector_rint_v3f32() { define <3 x float> @constrained_vector_rint_v3f32() #0 {
; CHECK-LABEL: constrained_vector_rint_v3f32: ; CHECK-LABEL: constrained_vector_rint_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq rintf ; CHECK-NEXT: callq rintf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 20 Lines
; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vroundss $4, %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32( %rint = call <3 x float> @llvm.experimental.constrained.rint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %rint ret <3 x float> %rint
} }
define <3 x double> @constrained_vector_rint_v3f64() { define <3 x double> @constrained_vector_rint_v3f64() #0 {
; CHECK-LABEL: constrained_vector_rint_v3f64: ; CHECK-LABEL: constrained_vector_rint_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundsd $4, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm1 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64( %rint = call <3 x double> @llvm.experimental.constrained.rint.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %rint ret <3 x double> %rint
} }
define <4 x double> @constrained_vector_rint_v4f64() { define <4 x double> @constrained_vector_rint_v4f64() #0 {
; CHECK-LABEL: constrained_vector_rint_v4f64: ; CHECK-LABEL: constrained_vector_rint_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq rint ; CHECK-NEXT: callq rint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 18 Lines
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %ymm0 ; AVX-NEXT: vroundpd $4, {{.*}}(%rip), %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64( %rint = call <4 x double> @llvm.experimental.constrained.rint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %rint ret <4 x double> %rint
} }
define <1 x float> @constrained_vector_nearbyint_v1f32() { define <1 x float> @constrained_vector_nearbyint_v1f32() #0 {
; CHECK-LABEL: constrained_vector_nearbyint_v1f32: ; CHECK-LABEL: constrained_vector_nearbyint_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq nearbyintf ; CHECK-NEXT: callq nearbyintf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_nearbyint_v1f32: ; AVX-LABEL: constrained_vector_nearbyint_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundss $12, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32( %nearby = call <1 x float> @llvm.experimental.constrained.nearbyint.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %nearby ret <1 x float> %nearby
} }
define <2 x double> @constrained_vector_nearbyint_v2f64() { define <2 x double> @constrained_vector_nearbyint_v2f64() #0 {
; CHECK-LABEL: constrained_vector_nearbyint_v2f64: ; CHECK-LABEL: constrained_vector_nearbyint_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_nearbyint_v2f64: ; AVX-LABEL: constrained_vector_nearbyint_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm0 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64( %nearby = call <2 x double> @llvm.experimental.constrained.nearbyint.v2f64(
<2 x double> <double 42.1, double 42.0>, <2 x double> <double 42.1, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %nearby ret <2 x double> %nearby
} }
define <3 x float> @constrained_vector_nearbyint_v3f32() { define <3 x float> @constrained_vector_nearbyint_v3f32() #0 {
; CHECK-LABEL: constrained_vector_nearbyint_v3f32: ; CHECK-LABEL: constrained_vector_nearbyint_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq nearbyintf ; CHECK-NEXT: callq nearbyintf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
Show All 20 Lines
; AVX-NEXT: vroundss $12, %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vroundss $12, %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32( %nearby = call <3 x float> @llvm.experimental.constrained.nearbyint.v3f32(
<3 x float> <float 42.0, float 43.0, float 44.0>, <3 x float> <float 42.0, float 43.0, float 44.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %nearby ret <3 x float> %nearby
} }
define <3 x double> @constrained_vector_nearby_v3f64() { define <3 x double> @constrained_vector_nearby_v3f64() #0 {
; CHECK-LABEL: constrained_vector_nearby_v3f64: ; CHECK-LABEL: constrained_vector_nearby_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 17 Lines
; AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundsd $12, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm1 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64( %nearby = call <3 x double> @llvm.experimental.constrained.nearbyint.v3f64(
<3 x double> <double 42.0, double 42.1, double 42.2>, <3 x double> <double 42.0, double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %nearby ret <3 x double> %nearby
} }
define <4 x double> @constrained_vector_nearbyint_v4f64() { define <4 x double> @constrained_vector_nearbyint_v4f64() #0 {
; CHECK-LABEL: constrained_vector_nearbyint_v4f64: ; CHECK-LABEL: constrained_vector_nearbyint_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq nearbyint ; CHECK-NEXT: callq nearbyint
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
Show All 18 Lines
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %ymm0 ; AVX-NEXT: vroundpd $12, {{.*}}(%rip), %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64( %nearby = call <4 x double> @llvm.experimental.constrained.nearbyint.v4f64(
<4 x double> <double 42.1, double 42.2, <4 x double> <double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %nearby ret <4 x double> %nearby
} }
define <1 x float> @constrained_vector_maxnum_v1f32() { define <1 x float> @constrained_vector_maxnum_v1f32() #0 {
; CHECK-LABEL: constrained_vector_maxnum_v1f32: ; CHECK-LABEL: constrained_vector_maxnum_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmaxf ; CHECK-NEXT: callq fmaxf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
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; AVX-NEXT: callq fmaxf ; AVX-NEXT: callq fmaxf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32( %max = call <1 x float> @llvm.experimental.constrained.maxnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %max ret <1 x float> %max
} }
define <2 x double> @constrained_vector_maxnum_v2f64() { define <2 x double> @constrained_vector_maxnum_v2f64() #0 {
; CHECK-LABEL: constrained_vector_maxnum_v2f64: ; CHECK-LABEL: constrained_vector_maxnum_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmax ; CHECK-NEXT: callq fmax
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64( %max = call <2 x double> @llvm.experimental.constrained.maxnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %max ret <2 x double> %max
} }
define <3 x float> @constrained_vector_maxnum_v3f32() { define <3 x float> @constrained_vector_maxnum_v3f32() #0 {
; CHECK-LABEL: constrained_vector_maxnum_v3f32: ; CHECK-LABEL: constrained_vector_maxnum_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fmaxf ; CHECK-NEXT: callq fmaxf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32( %max = call <3 x float> @llvm.experimental.constrained.maxnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %max ret <3 x float> %max
} }
define <3 x double> @constrained_vector_max_v3f64() { define <3 x double> @constrained_vector_max_v3f64() #0 {
; CHECK-LABEL: constrained_vector_max_v3f64: ; CHECK-LABEL: constrained_vector_max_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmax ; CHECK-NEXT: callq fmax
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64( %max = call <3 x double> @llvm.experimental.constrained.maxnum.v3f64(
<3 x double> <double 43.0, double 44.0, double 45.0>, <3 x double> <double 43.0, double 44.0, double 45.0>,
<3 x double> <double 40.0, double 41.0, double 42.0>, <3 x double> <double 40.0, double 41.0, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %max ret <3 x double> %max
} }
define <4 x double> @constrained_vector_maxnum_v4f64() { define <4 x double> @constrained_vector_maxnum_v4f64() #0 {
; CHECK-LABEL: constrained_vector_maxnum_v4f64: ; CHECK-LABEL: constrained_vector_maxnum_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmax ; CHECK-NEXT: callq fmax
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64( %max = call <4 x double> @llvm.experimental.constrained.maxnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %max ret <4 x double> %max
} }
define <1 x float> @constrained_vector_minnum_v1f32() { define <1 x float> @constrained_vector_minnum_v1f32() #0 {
; CHECK-LABEL: constrained_vector_minnum_v1f32: ; CHECK-LABEL: constrained_vector_minnum_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fminf ; CHECK-NEXT: callq fminf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
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; AVX-NEXT: callq fminf ; AVX-NEXT: callq fminf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32( %min = call <1 x float> @llvm.experimental.constrained.minnum.v1f32(
<1 x float> <float 42.0>, <1 x float> <float 41.0>, <1 x float> <float 42.0>, <1 x float> <float 41.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %min ret <1 x float> %min
} }
define <2 x double> @constrained_vector_minnum_v2f64() { define <2 x double> @constrained_vector_minnum_v2f64() #0 {
; CHECK-LABEL: constrained_vector_minnum_v2f64: ; CHECK-LABEL: constrained_vector_minnum_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmin ; CHECK-NEXT: callq fmin
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64( %min = call <2 x double> @llvm.experimental.constrained.minnum.v2f64(
<2 x double> <double 43.0, double 42.0>, <2 x double> <double 43.0, double 42.0>,
<2 x double> <double 41.0, double 40.0>, <2 x double> <double 41.0, double 40.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %min ret <2 x double> %min
} }
define <3 x float> @constrained_vector_minnum_v3f32() { define <3 x float> @constrained_vector_minnum_v3f32() #0 {
; CHECK-LABEL: constrained_vector_minnum_v3f32: ; CHECK-LABEL: constrained_vector_minnum_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: callq fminf ; CHECK-NEXT: callq fminf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
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; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32( %min = call <3 x float> @llvm.experimental.constrained.minnum.v3f32(
<3 x float> <float 43.0, float 44.0, float 45.0>, <3 x float> <float 43.0, float 44.0, float 45.0>,
<3 x float> <float 41.0, float 42.0, float 43.0>, <3 x float> <float 41.0, float 42.0, float 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %min ret <3 x float> %min
} }
define <3 x double> @constrained_vector_min_v3f64() { define <3 x double> @constrained_vector_min_v3f64() #0 {
; CHECK-LABEL: constrained_vector_min_v3f64: ; CHECK-LABEL: constrained_vector_min_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmin ; CHECK-NEXT: callq fmin
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
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; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64( %min = call <3 x double> @llvm.experimental.constrained.minnum.v3f64(
<3 x double> <double 43.0, double 44.0, double 45.0>, <3 x double> <double 43.0, double 44.0, double 45.0>,
<3 x double> <double 40.0, double 41.0, double 42.0>, <3 x double> <double 40.0, double 41.0, double 42.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %min ret <3 x double> %min
} }
define <4 x double> @constrained_vector_minnum_v4f64() { define <4 x double> @constrained_vector_minnum_v4f64() #0 {
; CHECK-LABEL: constrained_vector_minnum_v4f64: ; CHECK-LABEL: constrained_vector_minnum_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: callq fmin ; CHECK-NEXT: callq fmin
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
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; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64( %min = call <4 x double> @llvm.experimental.constrained.minnum.v4f64(
<4 x double> <double 44.0, double 45.0, <4 x double> <double 44.0, double 45.0,
double 46.0, double 47.0>, double 46.0, double 47.0>,
<4 x double> <double 40.0, double 41.0, <4 x double> <double 40.0, double 41.0,
double 42.0, double 43.0>, double 42.0, double 43.0>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %min ret <4 x double> %min
} }
define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() { define <1 x i32> @constrained_vector_fptosi_v1i32_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f32: ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f32: ; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32( %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i32> %result ret <1 x i32> %result
} }
define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() { define <2 x i32> @constrained_vector_fptosi_v2i32_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f32: ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f32: ; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vmovd %eax, %xmm0 ; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32( %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i32> %result ret <2 x i32> %result
} }
define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() { define <3 x i32> @constrained_vector_fptosi_v3i32_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f32: ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
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; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32( %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i32> %result ret <3 x i32> %result
} }
define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() { define <4 x i32> @constrained_vector_fptosi_v4i32_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f32: ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
Show All 14 Lines
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32( %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %result ret <4 x i32> %result
} }
define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() { define <1 x i64> @constrained_vector_fptosi_v1i64_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f32: ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f32: ; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32( %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i64> %result ret <1 x i64> %result
} }
define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() { define <2 x i64> @constrained_vector_fptosi_v2i64_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f32: ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f32: ; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32( %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %result ret <2 x i64> %result
} }
define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() { define <3 x i64> @constrained_vector_fptosi_v3i64_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f32: ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f32: ; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32( %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i64> %result ret <3 x i64> %result
} }
define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() { define <4 x i64> @constrained_vector_fptosi_v4i64_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f32: ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
Show All 16 Lines
; AVX-NEXT: vmovq %rax, %xmm2 ; AVX-NEXT: vmovq %rax, %xmm2
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32( %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i64> %result ret <4 x i64> %result
} }
define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() { define <1 x i32> @constrained_vector_fptosi_v1i32_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f64: ; CHECK-LABEL: constrained_vector_fptosi_v1i32_v1f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f64: ; AVX-LABEL: constrained_vector_fptosi_v1i32_v1f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64( %result = call <1 x i32> @llvm.experimental.constrained.fptosi.v1i32.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i32> %result ret <1 x i32> %result
} }
define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() { define <2 x i32> @constrained_vector_fptosi_v2i32_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f64: ; CHECK-LABEL: constrained_vector_fptosi_v2i32_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f64: ; AVX-LABEL: constrained_vector_fptosi_v2i32_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vmovd %eax, %xmm0 ; AVX-NEXT: vmovd %eax, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64( %result = call <2 x i32> @llvm.experimental.constrained.fptosi.v2i32.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i32> %result ret <2 x i32> %result
} }
define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() { define <3 x i32> @constrained_vector_fptosi_v3i32_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f64: ; CHECK-LABEL: constrained_vector_fptosi_v3i32_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
Show All 9 Lines
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64( %result = call <3 x i32> @llvm.experimental.constrained.fptosi.v3i32.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i32> %result ret <3 x i32> %result
} }
define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() { define <4 x i32> @constrained_vector_fptosi_v4i32_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f64: ; CHECK-LABEL: constrained_vector_fptosi_v4i32_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
Show All 14 Lines
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64( %result = call <4 x i32> @llvm.experimental.constrained.fptosi.v4i32.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %result ret <4 x i32> %result
} }
define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() { define <1 x i64> @constrained_vector_fptosi_v1i64_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f64: ; CHECK-LABEL: constrained_vector_fptosi_v1i64_v1f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f64: ; AVX-LABEL: constrained_vector_fptosi_v1i64_v1f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64( %result = call <1 x i64> @llvm.experimental.constrained.fptosi.v1i64.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i64> %result ret <1 x i64> %result
} }
define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() { define <2 x i64> @constrained_vector_fptosi_v2i64_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f64: ; CHECK-LABEL: constrained_vector_fptosi_v2i64_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f64: ; AVX-LABEL: constrained_vector_fptosi_v2i64_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64( %result = call <2 x i64> @llvm.experimental.constrained.fptosi.v2i64.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %result ret <2 x i64> %result
} }
define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() { define <3 x i64> @constrained_vector_fptosi_v3i64_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f64: ; CHECK-LABEL: constrained_vector_fptosi_v3i64_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f64: ; AVX-LABEL: constrained_vector_fptosi_v3i64_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64( %result = call <3 x i64> @llvm.experimental.constrained.fptosi.v3i64.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i64> %result ret <3 x i64> %result
} }
define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() { define <4 x i64> @constrained_vector_fptosi_v4i64_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f64: ; CHECK-LABEL: constrained_vector_fptosi_v4i64_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
Show All 16 Lines
; AVX-NEXT: vmovq %rax, %xmm2 ; AVX-NEXT: vmovq %rax, %xmm2
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64( %result = call <4 x i64> @llvm.experimental.constrained.fptosi.v4i64.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i64> %result ret <4 x i64> %result
} }
define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() { define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32: ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f32: ; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32( %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i32> %result ret <1 x i32> %result
} }
define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() { define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32: ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f32: ; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
; AVX-NEXT: vmovd %ecx, %xmm0 ; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32( %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i32> %result ret <2 x i32> %result
} }
define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() { define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32: ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
Show All 9 Lines
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32( %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i32> %result ret <3 x i32> %result
} }
define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() { define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32: ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
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; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32( %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %result ret <4 x i32> %result
} }
define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() { define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f32: ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f32: ; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32( %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i64> %result ret <1 x i64> %result
} }
define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() { define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f32: ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f32: ; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32( %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %result ret <2 x i64> %result
} }
define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() { define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f32: ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rdx
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rcx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f32: ; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32( %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i64> %result ret <3 x i64> %result
} }
define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() { define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f32: ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
Show All 16 Lines
; AVX-NEXT: vmovq %rax, %xmm2 ; AVX-NEXT: vmovq %rax, %xmm2
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32( %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i64> %result ret <4 x i64> %result
} }
define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() { define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64: ; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f64: ; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64( %result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i32> %result ret <1 x i32> %result
} }
define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() { define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64: ; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f64: ; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
; AVX-NEXT: vmovd %ecx, %xmm0 ; AVX-NEXT: vmovd %ecx, %xmm0
; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64( %result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i32> %result ret <2 x i32> %result
} }
define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() { define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64: ; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
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; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64( %result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i32> %result ret <3 x i32> %result
} }
define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() { define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64: ; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm0 ; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
; CHECK-NEXT: movd %eax, %xmm1 ; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
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; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 ; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64( %result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i32> %result ret <4 x i32> %result
} }
define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() { define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f64: ; CHECK-LABEL: constrained_vector_fptoui_v1i64_v1f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f64: ; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64( %result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x i64> %result ret <1 x i64> %result
} }
define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() { define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f64: ; CHECK-LABEL: constrained_vector_fptoui_v2i64_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f64: ; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64( %result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x i64> %result ret <2 x i64> %result
} }
define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() { define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f64: ; CHECK-LABEL: constrained_vector_fptoui_v3i64_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rdx
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rcx
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f64: ; AVX-LABEL: constrained_vector_fptoui_v3i64_v3f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm0 ; AVX-NEXT: vmovq %rax, %xmm0
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax ; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
; AVX-NEXT: vmovq %rax, %xmm1 ; AVX-NEXT: vmovq %rax, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64( %result = call <3 x i64> @llvm.experimental.constrained.fptoui.v3i64.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x i64> %result ret <3 x i64> %result
} }
define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() { define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f64: ; CHECK-LABEL: constrained_vector_fptoui_v4i64_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm1 ; CHECK-NEXT: movq %rax, %xmm1
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movq %rax, %xmm0 ; CHECK-NEXT: movq %rax, %xmm0
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax ; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
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; AVX-NEXT: vmovq %rax, %xmm2 ; AVX-NEXT: vmovq %rax, %xmm2
; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] ; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64( %result = call <4 x i64> @llvm.experimental.constrained.fptoui.v4i64.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x i64> %result ret <4 x i64> %result
} }
define <1 x float> @constrained_vector_fptrunc_v1f64() { define <1 x float> @constrained_vector_fptrunc_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptrunc_v1f64: ; CHECK-LABEL: constrained_vector_fptrunc_v1f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptrunc_v1f64: ; AVX-LABEL: constrained_vector_fptrunc_v1f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64( %result = call <1 x float> @llvm.experimental.constrained.fptrunc.v1f32.v1f64(
<1 x double><double 42.1>, <1 x double><double 42.1>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %result ret <1 x float> %result
} }
define <2 x float> @constrained_vector_fptrunc_v2f64() { define <2 x float> @constrained_vector_fptrunc_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptrunc_v2f64: ; CHECK-LABEL: constrained_vector_fptrunc_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptrunc_v2f64: ; AVX-LABEL: constrained_vector_fptrunc_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero ; AVX-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero
; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1 ; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0],xmm0[0],xmm1[2,3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64( %result = call <2 x float> @llvm.experimental.constrained.fptrunc.v2f32.v2f64(
<2 x double><double 42.1, double 42.2>, <2 x double><double 42.1, double 42.2>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x float> %result ret <2 x float> %result
} }
define <3 x float> @constrained_vector_fptrunc_v3f64() { define <3 x float> @constrained_vector_fptrunc_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptrunc_v3f64: ; CHECK-LABEL: constrained_vector_fptrunc_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm1
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
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; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1 ; AVX-NEXT: vcvtsd2ss %xmm1, %xmm1, %xmm1
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64( %result = call <3 x float> @llvm.experimental.constrained.fptrunc.v3f32.v3f64(
<3 x double><double 42.1, double 42.2, <3 x double><double 42.1, double 42.2,
double 42.3>, double 42.3>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %result ret <3 x float> %result
} }
define <4 x float> @constrained_vector_fptrunc_v4f64() { define <4 x float> @constrained_vector_fptrunc_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptrunc_v4f64: ; CHECK-LABEL: constrained_vector_fptrunc_v4f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm1, %xmm1 ; CHECK-NEXT: cvtsd2ss %xmm1, %xmm1
; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] ; CHECK-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm2 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm2
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0 ; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] ; CHECK-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fptrunc_v4f64: ; AVX-LABEL: constrained_vector_fptrunc_v4f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtpd2psy {{.*}}(%rip), %xmm0 ; AVX-NEXT: vcvtpd2psy {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64( %result = call <4 x float> @llvm.experimental.constrained.fptrunc.v4f32.v4f64(
<4 x double><double 42.1, double 42.2, <4 x double><double 42.1, double 42.2,
double 42.3, double 42.4>, double 42.3, double 42.4>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x float> %result ret <4 x float> %result
} }
define <1 x double> @constrained_vector_fpext_v1f32() { define <1 x double> @constrained_vector_fpext_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fpext_v1f32: ; CHECK-LABEL: constrained_vector_fpext_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fpext_v1f32: ; AVX-LABEL: constrained_vector_fpext_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32( %result = call <1 x double> @llvm.experimental.constrained.fpext.v1f64.v1f32(
<1 x float><float 42.0>, <1 x float><float 42.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x double> %result ret <1 x double> %result
} }
define <2 x double> @constrained_vector_fpext_v2f32() { define <2 x double> @constrained_vector_fpext_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fpext_v2f32: ; CHECK-LABEL: constrained_vector_fpext_v2f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm1 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fpext_v2f32: ; AVX-LABEL: constrained_vector_fpext_v2f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vcvtss2sd %xmm0, %xmm0, %xmm0
; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 ; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0] ; AVX-NEXT: vmovlhps {{.*#+}} xmm0 = xmm1[0],xmm0[0]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32( %result = call <2 x double> @llvm.experimental.constrained.fpext.v2f64.v2f32(
<2 x float><float 42.0, float 43.0>, <2 x float><float 42.0, float 43.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %result ret <2 x double> %result
} }
define <3 x double> @constrained_vector_fpext_v3f32() { define <3 x double> @constrained_vector_fpext_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fpext_v3f32: ; CHECK-LABEL: constrained_vector_fpext_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm1, %xmm1 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm2 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm2, %xmm2 ; CHECK-NEXT: cvtss2sd %xmm2, %xmm2
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; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1 ; AVX-NEXT: vcvtss2sd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32( %result = call <3 x double> @llvm.experimental.constrained.fpext.v3f64.v3f32(
<3 x float><float 42.0, float 43.0, <3 x float><float 42.0, float 43.0,
float 44.0>, float 44.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %result ret <3 x double> %result
} }
define <4 x double> @constrained_vector_fpext_v4f32() { define <4 x double> @constrained_vector_fpext_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fpext_v4f32: ; CHECK-LABEL: constrained_vector_fpext_v4f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm1 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm1
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm0, %xmm0 ; CHECK-NEXT: cvtss2sd %xmm0, %xmm0
; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0] ; CHECK-NEXT: movlhps {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm1, %xmm2 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm2
; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm1 = mem[0],zero,zero,zero
; CHECK-NEXT: cvtss2sd %xmm1, %xmm1 ; CHECK-NEXT: cvtss2sd %xmm1, %xmm1
; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0] ; CHECK-NEXT: movlhps {{.*#+}} xmm1 = xmm1[0],xmm2[0]
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_fpext_v4f32: ; AVX-LABEL: constrained_vector_fpext_v4f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vcvtps2pd {{.*}}(%rip), %ymm0 ; AVX-NEXT: vcvtps2pd {{.*}}(%rip), %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32( %result = call <4 x double> @llvm.experimental.constrained.fpext.v4f64.v4f32(
<4 x float><float 42.0, float 43.0, <4 x float><float 42.0, float 43.0,
float 44.0, float 45.0>, float 44.0, float 45.0>,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <4 x double> %result ret <4 x double> %result
} }
define <1 x float> @constrained_vector_ceil_v1f32() { define <1 x float> @constrained_vector_ceil_v1f32() #0 {
; CHECK-LABEL: constrained_vector_ceil_v1f32: ; CHECK-LABEL: constrained_vector_ceil_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq ceilf ; CHECK-NEXT: callq ceilf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_ceil_v1f32: ; AVX-LABEL: constrained_vector_ceil_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundss $10, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32( %ceil = call <1 x float> @llvm.experimental.constrained.ceil.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %ceil ret <1 x float> %ceil
} }
define <2 x double> @constrained_vector_ceil_v2f64() { define <2 x double> @constrained_vector_ceil_v2f64() #0 {
; CHECK-LABEL: constrained_vector_ceil_v2f64: ; CHECK-LABEL: constrained_vector_ceil_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq ceil ; CHECK-NEXT: callq ceil
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq ceil ; CHECK-NEXT: callq ceil
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_ceil_v2f64: ; AVX-LABEL: constrained_vector_ceil_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm0 ; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64( %ceil = call <2 x double> @llvm.experimental.constrained.ceil.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %ceil ret <2 x double> %ceil
} }
define <3 x float> @constrained_vector_ceil_v3f32() { define <3 x float> @constrained_vector_ceil_v3f32() #0 {
; CHECK-LABEL: constrained_vector_ceil_v3f32: ; CHECK-LABEL: constrained_vector_ceil_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq ceilf ; CHECK-NEXT: callq ceilf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: vroundss $10, %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vroundss $10, %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32( %ceil = call <3 x float> @llvm.experimental.constrained.ceil.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %ceil ret <3 x float> %ceil
} }
define <3 x double> @constrained_vector_ceil_v3f64() { define <3 x double> @constrained_vector_ceil_v3f64() #0 {
; CHECK-LABEL: constrained_vector_ceil_v3f64: ; CHECK-LABEL: constrained_vector_ceil_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq ceil ; CHECK-NEXT: callq ceil
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundsd $10, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm1 ; AVX-NEXT: vroundpd $10, {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64( %ceil = call <3 x double> @llvm.experimental.constrained.ceil.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %ceil ret <3 x double> %ceil
} }
define <1 x float> @constrained_vector_floor_v1f32() { define <1 x float> @constrained_vector_floor_v1f32() #0 {
; CHECK-LABEL: constrained_vector_floor_v1f32: ; CHECK-LABEL: constrained_vector_floor_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq floorf ; CHECK-NEXT: callq floorf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_floor_v1f32: ; AVX-LABEL: constrained_vector_floor_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundss $9, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32( %floor = call <1 x float> @llvm.experimental.constrained.floor.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %floor ret <1 x float> %floor
} }
define <2 x double> @constrained_vector_floor_v2f64() { define <2 x double> @constrained_vector_floor_v2f64() #0 {
; CHECK-LABEL: constrained_vector_floor_v2f64: ; CHECK-LABEL: constrained_vector_floor_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq floor ; CHECK-NEXT: callq floor
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq floor ; CHECK-NEXT: callq floor
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_floor_v2f64: ; AVX-LABEL: constrained_vector_floor_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm0 ; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64( %floor = call <2 x double> @llvm.experimental.constrained.floor.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %floor ret <2 x double> %floor
} }
define <3 x float> @constrained_vector_floor_v3f32() { define <3 x float> @constrained_vector_floor_v3f32() #0 {
; CHECK-LABEL: constrained_vector_floor_v3f32: ; CHECK-LABEL: constrained_vector_floor_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq floorf ; CHECK-NEXT: callq floorf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: vroundss $9, %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vroundss $9, %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32( %floor = call <3 x float> @llvm.experimental.constrained.floor.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %floor ret <3 x float> %floor
} }
define <3 x double> @constrained_vector_floor_v3f64() { define <3 x double> @constrained_vector_floor_v3f64() #0 {
; CHECK-LABEL: constrained_vector_floor_v3f64: ; CHECK-LABEL: constrained_vector_floor_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq floor ; CHECK-NEXT: callq floor
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundsd $9, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm1 ; AVX-NEXT: vroundpd $9, {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64( %floor = call <3 x double> @llvm.experimental.constrained.floor.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %floor ret <3 x double> %floor
} }
define <1 x float> @constrained_vector_round_v1f32() { define <1 x float> @constrained_vector_round_v1f32() #0 {
; CHECK-LABEL: constrained_vector_round_v1f32: ; CHECK-LABEL: constrained_vector_round_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq roundf ; CHECK-NEXT: callq roundf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_round_v1f32: ; AVX-LABEL: constrained_vector_round_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: pushq %rax ; AVX-NEXT: pushq %rax
; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: .cfi_def_cfa_offset 16
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: callq roundf ; AVX-NEXT: callq roundf
; AVX-NEXT: popq %rax ; AVX-NEXT: popq %rax
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%round = call <1 x float> @llvm.experimental.constrained.round.v1f32( %round = call <1 x float> @llvm.experimental.constrained.round.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %round ret <1 x float> %round
} }
define <2 x double> @constrained_vector_round_v2f64() { define <2 x double> @constrained_vector_round_v2f64() #0 {
; CHECK-LABEL: constrained_vector_round_v2f64: ; CHECK-LABEL: constrained_vector_round_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq round ; CHECK-NEXT: callq round
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: # xmm0 = xmm0[0],mem[0] ; AVX-NEXT: # xmm0 = xmm0[0],mem[0]
; AVX-NEXT: addq $24, %rsp ; AVX-NEXT: addq $24, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%round = call <2 x double> @llvm.experimental.constrained.round.v2f64( %round = call <2 x double> @llvm.experimental.constrained.round.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %round ret <2 x double> %round
} }
define <3 x float> @constrained_vector_round_v3f32() { define <3 x float> @constrained_vector_round_v3f32() #0 {
; CHECK-LABEL: constrained_vector_round_v3f32: ; CHECK-LABEL: constrained_vector_round_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq roundf ; CHECK-NEXT: callq roundf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3] ; AVX-NEXT: # xmm0 = xmm0[0,1],mem[0],xmm0[3]
; AVX-NEXT: addq $40, %rsp ; AVX-NEXT: addq $40, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%round = call <3 x float> @llvm.experimental.constrained.round.v3f32( %round = call <3 x float> @llvm.experimental.constrained.round.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %round ret <3 x float> %round
} }
define <3 x double> @constrained_vector_round_v3f64() { define <3 x double> @constrained_vector_round_v3f64() #0 {
; CHECK-LABEL: constrained_vector_round_v3f64: ; CHECK-LABEL: constrained_vector_round_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq round ; CHECK-NEXT: callq round
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: addq $56, %rsp ; AVX-NEXT: addq $56, %rsp
; AVX-NEXT: .cfi_def_cfa_offset 8 ; AVX-NEXT: .cfi_def_cfa_offset 8
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%round = call <3 x double> @llvm.experimental.constrained.round.v3f64( %round = call <3 x double> @llvm.experimental.constrained.round.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %round ret <3 x double> %round
} }
define <1 x float> @constrained_vector_trunc_v1f32() { define <1 x float> @constrained_vector_trunc_v1f32() #0 {
; CHECK-LABEL: constrained_vector_trunc_v1f32: ; CHECK-LABEL: constrained_vector_trunc_v1f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushq %rax ; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16 ; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq truncf ; CHECK-NEXT: callq truncf
; CHECK-NEXT: popq %rax ; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_trunc_v1f32: ; AVX-LABEL: constrained_vector_trunc_v1f32:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; AVX-NEXT: vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundss $11, %xmm0, %xmm0, %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32( %trunc = call <1 x float> @llvm.experimental.constrained.trunc.v1f32(
<1 x float> <float 1.5>, <1 x float> <float 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <1 x float> %trunc ret <1 x float> %trunc
} }
define <2 x double> @constrained_vector_trunc_v2f64() { define <2 x double> @constrained_vector_trunc_v2f64() #0 {
; CHECK-LABEL: constrained_vector_trunc_v2f64: ; CHECK-LABEL: constrained_vector_trunc_v2f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq trunc ; CHECK-NEXT: callq trunc
; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, (%rsp) # 16-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq trunc ; CHECK-NEXT: callq trunc
; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload ; CHECK-NEXT: unpcklpd (%rsp), %xmm0 # 16-byte Folded Reload
; CHECK-NEXT: # xmm0 = xmm0[0],mem[0] ; CHECK-NEXT: # xmm0 = xmm0[0],mem[0]
; CHECK-NEXT: addq $24, %rsp ; CHECK-NEXT: addq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 8 ; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; ;
; AVX-LABEL: constrained_vector_trunc_v2f64: ; AVX-LABEL: constrained_vector_trunc_v2f64:
; AVX: # %bb.0: # %entry ; AVX: # %bb.0: # %entry
; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm0 ; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64( %trunc = call <2 x double> @llvm.experimental.constrained.trunc.v2f64(
<2 x double> <double 1.1, double 1.9>, <2 x double> <double 1.1, double 1.9>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <2 x double> %trunc ret <2 x double> %trunc
} }
define <3 x float> @constrained_vector_trunc_v3f32() { define <3 x float> @constrained_vector_trunc_v3f32() #0 {
; CHECK-LABEL: constrained_vector_trunc_v3f32: ; CHECK-LABEL: constrained_vector_trunc_v3f32:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $40, %rsp ; CHECK-NEXT: subq $40, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 48 ; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
; CHECK-NEXT: callq truncf ; CHECK-NEXT: callq truncf
; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill ; CHECK-NEXT: movaps %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 16-byte Spill
; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero ; CHECK-NEXT: movss {{.*#+}} xmm0 = mem[0],zero,zero,zero
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; AVX-NEXT: vroundss $11, %xmm2, %xmm2, %xmm2 ; AVX-NEXT: vroundss $11, %xmm2, %xmm2, %xmm2
; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] ; AVX-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3]
; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3] ; AVX-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1],xmm0[0],xmm1[3]
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32( %trunc = call <3 x float> @llvm.experimental.constrained.trunc.v3f32(
<3 x float> <float 1.5, float 2.5, float 3.5>, <3 x float> <float 1.5, float 2.5, float 3.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x float> %trunc ret <3 x float> %trunc
} }
define <3 x double> @constrained_vector_trunc_v3f64() { define <3 x double> @constrained_vector_trunc_v3f64() #0 {
; CHECK-LABEL: constrained_vector_trunc_v3f64: ; CHECK-LABEL: constrained_vector_trunc_v3f64:
; CHECK: # %bb.0: # %entry ; CHECK: # %bb.0: # %entry
; CHECK-NEXT: subq $24, %rsp ; CHECK-NEXT: subq $24, %rsp
; CHECK-NEXT: .cfi_def_cfa_offset 32 ; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
; CHECK-NEXT: callq trunc ; CHECK-NEXT: callq trunc
; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill ; CHECK-NEXT: movsd %xmm0, {{[-0-9]+}}(%r{{[sb]}}p) # 8-byte Spill
; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero ; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0 ; AVX-NEXT: vroundsd $11, %xmm0, %xmm0, %xmm0
; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm1 ; AVX-NEXT: vroundpd $11, {{.*}}(%rip), %xmm1
; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 ; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; AVX-NEXT: retq ; AVX-NEXT: retq
entry: entry:
%trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64( %trunc = call <3 x double> @llvm.experimental.constrained.trunc.v3f64(
<3 x double> <double 1.1, double 1.9, double 1.5>, <3 x double> <double 1.1, double 1.9, double 1.5>,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret <3 x double> %trunc ret <3 x double> %trunc
} }
attributes #0 = { strictfp }
; Single width declarations ; Single width declarations
declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fadd.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fsub.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fmul.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.fdiv.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.frem.v2f64(<2 x double>, <2 x double>, metadata, metadata)
declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata) declare <2 x double> @llvm.experimental.constrained.sqrt.v2f64(<2 x double>, metadata, metadata)
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llvm/test/Feature/fp-intrinsics.ll

; RUN: opt -O3 -S < %s | FileCheck %s ; RUN: opt -O3 -S < %s | FileCheck %s
; Test to verify that constants aren't folded when the rounding mode is unknown. ; Test to verify that constants aren't folded when the rounding mode is unknown.
; CHECK-LABEL: @f1 ; CHECK-LABEL: @f1
; CHECK: call double @llvm.experimental.constrained.fdiv.f64 ; CHECK: call double @llvm.experimental.constrained.fdiv.f64
define double @f1() { define double @f1() #0 {
entry: entry:
%div = call double @llvm.experimental.constrained.fdiv.f64( %div = call double @llvm.experimental.constrained.fdiv.f64(
double 1.000000e+00, double 1.000000e+00,
double 1.000000e+01, double 1.000000e+01,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %div ret double %div
} }
; Verify that 'a - 0' isn't simplified to 'a' when the rounding mode is unknown. ; Verify that 'a - 0' isn't simplified to 'a' when the rounding mode is unknown.
; ;
; double f2(double a) { ; double f2(double a) {
; // Because the result of '0 - 0' is negative zero if rounding mode is ; // Because the result of '0 - 0' is negative zero if rounding mode is
; // downward, this shouldn't be simplified. ; // downward, this shouldn't be simplified.
; return a - 0.0; ; return a - 0.0;
; } ; }
; ;
; CHECK-LABEL: @f2 ; CHECK-LABEL: @f2
; CHECK: call double @llvm.experimental.constrained.fsub.f64 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
define double @f2(double %a) { define double @f2(double %a) #0 {
entry: entry:
%div = call double @llvm.experimental.constrained.fsub.f64( %div = call double @llvm.experimental.constrained.fsub.f64(
double %a, double 0.000000e+00, double %a, double 0.000000e+00,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %div ret double %div
} }
; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is ; Verify that '-((-a)*b)' isn't simplified to 'a*b' when the rounding mode is
; unknown. ; unknown.
; ;
; double f3(double a, double b) { ; double f3(double a, double b) {
; // Because the intermediate value involved in this calculation may require ; // Because the intermediate value involved in this calculation may require
; // rounding, this shouldn't be simplified. ; // rounding, this shouldn't be simplified.
; return -((-a)*b); ; return -((-a)*b);
; } ; }
; ;
; CHECK-LABEL: @f3 ; CHECK-LABEL: @f3
; CHECK: call double @llvm.experimental.constrained.fsub.f64 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
; CHECK: call double @llvm.experimental.constrained.fmul.f64 ; CHECK: call double @llvm.experimental.constrained.fmul.f64
; CHECK: call double @llvm.experimental.constrained.fsub.f64 ; CHECK: call double @llvm.experimental.constrained.fsub.f64
define double @f3(double %a, double %b) { define double @f3(double %a, double %b) #0 {
entry: entry:
%sub = call double @llvm.experimental.constrained.fsub.f64( %sub = call double @llvm.experimental.constrained.fsub.f64(
double -0.000000e+00, double %a, double -0.000000e+00, double %a,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%mul = call double @llvm.experimental.constrained.fmul.f64( %mul = call double @llvm.experimental.constrained.fmul.f64(
double %sub, double %b, double %sub, double %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
%ret = call double @llvm.experimental.constrained.fsub.f64( %ret = call double @llvm.experimental.constrained.fsub.f64(
double -0.000000e+00, double -0.000000e+00,
double %mul, double %mul,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %ret ret double %ret
} }
; Verify that FP operations are not performed speculatively when FP exceptions ; Verify that FP operations are not performed speculatively when FP exceptions
; are not being ignored. ; are not being ignored.
; ;
; double f4(int n, double a) { ; double f4(int n, double a) {
; // Because a + 1 may overflow, this should not be simplified. ; // Because a + 1 may overflow, this should not be simplified.
; if (n > 0) ; if (n > 0)
; return a + 1.0; ; return a + 1.0;
; return a; ; return a;
; } ; }
; ;
; ;
; CHECK-LABEL: @f4 ; CHECK-LABEL: @f4
; CHECK-NOT: select ; CHECK-NOT: select
; CHECK: br i1 %cmp ; CHECK: br i1 %cmp
define double @f4(i32 %n, double %a) { define double @f4(i32 %n, double %a) #0 {
entry: entry:
%cmp = icmp sgt i32 %n, 0 %cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %if.then, label %if.end br i1 %cmp, label %if.then, label %if.end
if.then: if.then:
%add = call double @llvm.experimental.constrained.fadd.f64( %add = call double @llvm.experimental.constrained.fadd.f64(
double 1.000000e+00, double %a, double 1.000000e+00, double %a,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
br label %if.end br label %if.end
if.end: if.end:
%a.0 = phi double [%add, %if.then], [ %a, %entry ] %a.0 = phi double [%add, %if.then], [ %a, %entry ]
ret double %a.0 ret double %a.0
} }
; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown. ; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f5 ; CHECK-LABEL: f5
; CHECK: call double @llvm.experimental.constrained.sqrt ; CHECK: call double @llvm.experimental.constrained.sqrt
define double @f5() { define double @f5() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0, %result = call double @llvm.experimental.constrained.sqrt.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown. ; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f6 ; CHECK-LABEL: f6
; CHECK: call double @llvm.experimental.constrained.pow ; CHECK: call double @llvm.experimental.constrained.pow
define double @f6() { define double @f6() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.pow.f64(double 42.1, %result = call double @llvm.experimental.constrained.pow.f64(double 42.1,
double 3.0, double 3.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown. ; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f7 ; CHECK-LABEL: f7
; CHECK: call double @llvm.experimental.constrained.powi ; CHECK: call double @llvm.experimental.constrained.powi
define double @f7() { define double @f7() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.powi.f64(double 42.1, %result = call double @llvm.experimental.constrained.powi.f64(double 42.1,
i32 3, i32 3,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that sin(42.0) isn't simplified when the rounding mode is unknown. ; Verify that sin(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f8 ; CHECK-LABEL: f8
; CHECK: call double @llvm.experimental.constrained.sin ; CHECK: call double @llvm.experimental.constrained.sin
define double @f8() { define double @f8() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.sin.f64(double 42.0, %result = call double @llvm.experimental.constrained.sin.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that cos(42.0) isn't simplified when the rounding mode is unknown. ; Verify that cos(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f9 ; CHECK-LABEL: f9
; CHECK: call double @llvm.experimental.constrained.cos ; CHECK: call double @llvm.experimental.constrained.cos
define double @f9() { define double @f9() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.cos.f64(double 42.0, %result = call double @llvm.experimental.constrained.cos.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that exp(42.0) isn't simplified when the rounding mode is unknown. ; Verify that exp(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f10 ; CHECK-LABEL: f10
; CHECK: call double @llvm.experimental.constrained.exp ; CHECK: call double @llvm.experimental.constrained.exp
define double @f10() { define double @f10() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.exp.f64(double 42.0, %result = call double @llvm.experimental.constrained.exp.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown. ; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f11 ; CHECK-LABEL: f11
; CHECK: call double @llvm.experimental.constrained.exp2 ; CHECK: call double @llvm.experimental.constrained.exp2
define double @f11() { define double @f11() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.exp2.f64(double 42.1, %result = call double @llvm.experimental.constrained.exp2.f64(double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f12 ; CHECK-LABEL: f12
; CHECK: call double @llvm.experimental.constrained.log ; CHECK: call double @llvm.experimental.constrained.log
define double @f12() { define double @f12() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log.f64(double 42.0, %result = call double @llvm.experimental.constrained.log.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log10(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log10(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f13 ; CHECK-LABEL: f13
; CHECK: call double @llvm.experimental.constrained.log10 ; CHECK: call double @llvm.experimental.constrained.log10
define double @f13() { define double @f13() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log10.f64(double 42.0, %result = call double @llvm.experimental.constrained.log10.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that log2(42.0) isn't simplified when the rounding mode is unknown. ; Verify that log2(42.0) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f14 ; CHECK-LABEL: f14
; CHECK: call double @llvm.experimental.constrained.log2 ; CHECK: call double @llvm.experimental.constrained.log2
define double @f14() { define double @f14() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.log2.f64(double 42.0, %result = call double @llvm.experimental.constrained.log2.f64(double 42.0,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that rint(42.1) isn't simplified when the rounding mode is unknown. ; Verify that rint(42.1) isn't simplified when the rounding mode is unknown.
; CHECK-LABEL: f15 ; CHECK-LABEL: f15
; CHECK: call double @llvm.experimental.constrained.rint ; CHECK: call double @llvm.experimental.constrained.rint
define double @f15() { define double @f15() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.rint.f64(double 42.1, %result = call double @llvm.experimental.constrained.rint.f64(double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that nearbyint(42.1) isn't simplified when the rounding mode is ; Verify that nearbyint(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f16 ; CHECK-LABEL: f16
; CHECK: call double @llvm.experimental.constrained.nearbyint ; CHECK: call double @llvm.experimental.constrained.nearbyint
define double @f16() { define double @f16() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.nearbyint.f64( %result = call double @llvm.experimental.constrained.nearbyint.f64(
double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that fma(42.1) isn't simplified when the rounding mode is ; Verify that fma(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f17 ; CHECK-LABEL: f17
; CHECK: call double @llvm.experimental.constrained.fma ; CHECK: call double @llvm.experimental.constrained.fma
define double @f17() { define double @f17() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.fma.f64(double 42.1, double 42.1, double 42.1, %result = call double @llvm.experimental.constrained.fma.f64(double 42.1, double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
; Verify that fptoui(42.1) isn't simplified when the rounding mode is ; Verify that fptoui(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f18 ; CHECK-LABEL: f18
; CHECK: call zeroext i32 @llvm.experimental.constrained.fptoui ; CHECK: call zeroext i32 @llvm.experimental.constrained.fptoui
define zeroext i32 @f18() { define zeroext i32 @f18() #0 {
entry: entry:
%result = call zeroext i32 @llvm.experimental.constrained.fptoui.i32.f64( %result = call zeroext i32 @llvm.experimental.constrained.fptoui.i32.f64(
double 42.1, double 42.1,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %result ret i32 %result
} }
; Verify that fptosi(42.1) isn't simplified when the rounding mode is ; Verify that fptosi(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f19 ; CHECK-LABEL: f19
; CHECK: call i32 @llvm.experimental.constrained.fptosi ; CHECK: call i32 @llvm.experimental.constrained.fptosi
define i32 @f19() { define i32 @f19() #0 {
entry: entry:
%result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1, %result = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double 42.1,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret i32 %result ret i32 %result
} }
; Verify that fptrunc(42.1) isn't simplified when the rounding mode is ; Verify that fptrunc(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f20 ; CHECK-LABEL: f20
; CHECK: call float @llvm.experimental.constrained.fptrunc ; CHECK: call float @llvm.experimental.constrained.fptrunc
define float @f20() { define float @f20() #0 {
entry: entry:
%result = call float @llvm.experimental.constrained.fptrunc.f32.f64( %result = call float @llvm.experimental.constrained.fptrunc.f32.f64(
double 42.1, double 42.1,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret float %result ret float %result
} }
; Verify that fpext(42.1) isn't simplified when the rounding mode is ; Verify that fpext(42.1) isn't simplified when the rounding mode is
; unknown. ; unknown.
; CHECK-LABEL: f21 ; CHECK-LABEL: f21
; CHECK: call double @llvm.experimental.constrained.fpext ; CHECK: call double @llvm.experimental.constrained.fpext
define double @f21() { define double @f21() #0 {
entry: entry:
%result = call double @llvm.experimental.constrained.fpext.f64.f32(float 42.0, %result = call double @llvm.experimental.constrained.fpext.f64.f32(float 42.0,
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %result ret double %result
} }
attributes #0 = { strictfp }
@llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata" @llvm.fp.env = thread_local global i8 zeroinitializer, section "llvm.metadata"
declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fdiv.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fmul.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.fsub.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata)
declare double @llvm.experimental.constrained.pow.f64(double, double, metadata, metadata) declare double @llvm.experimental.constrained.pow.f64(double, double, metadata, metadata)
declare double @llvm.experimental.constrained.powi.f64(double, i32, metadata, metadata) declare double @llvm.experimental.constrained.powi.f64(double, i32, metadata, metadata)
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llvm/test/Transforms/DCE/calls-errno.ll

Show First 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; cos(inf) is a domain error ; cos(inf) is a domain error
; CHECK-NEXT: %cos2 = call double @cos(double 0x7FF0000000000000) ; CHECK-NEXT: %cos2 = call double @cos(double 0x7FF0000000000000)
%cos2 = call double @cos(double 0x7FF0000000000000) %cos2 = call double @cos(double 0x7FF0000000000000)
; cos(0) nobuiltin may have side effects ; cos(0) nobuiltin may have side effects
; CHECK-NEXT: %cos3 = call double @cos(double 0.000000e+00) ; CHECK-NEXT: %cos3 = call double @cos(double 0.000000e+00)
%cos3 = call double @cos(double 0.000000e+00) nobuiltin %cos3 = call double @cos(double 0.000000e+00) nobuiltin
; cos(1) strictfp sets FP status flags
; CHECK-NEXT: %cos4 = call double @cos(double 1.000000e+00)
%cos4 = call double @cos(double 1.000000e+00) strictfp
; pow(0, 1) is 0 ; pow(0, 1) is 0
%pow1 = call double @pow(double 0x7FF0000000000000, double 1.000000e+00) %pow1 = call double @pow(double 0x7FF0000000000000, double 1.000000e+00)
; pow(0, -1) is a pole error ; pow(0, -1) is a pole error
; FIXME: It fails on mingw host. Suppress checking. ; FIXME: It fails on mingw host. Suppress checking.
; %pow2 = call double @pow(double 0.000000e+00, double -1.000000e+00) ; %pow2 = call double @pow(double 0.000000e+00, double -1.000000e+00)
; fmod(inf, nan) is nan ; fmod(inf, nan) is nan
%fmod1 = call double @fmod(double 0x7FF0000000000000, double 0x7FF0000000000001) %fmod1 = call double @fmod(double 0x7FF0000000000000, double 0x7FF0000000000001)
; fmod(inf, 1) is a domain error ; fmod(inf, 1) is a domain error
; CHECK-NEXT: %fmod2 = call double @fmod(double 0x7FF0000000000000, double 1.000000e+00) ; CHECK-NEXT: %fmod2 = call double @fmod(double 0x7FF0000000000000, double 1.000000e+00)
%fmod2 = call double @fmod(double 0x7FF0000000000000, double 1.000000e+00) %fmod2 = call double @fmod(double 0x7FF0000000000000, double 1.000000e+00)
; CHECK-NEXT: ret void ; CHECK-NEXT: ret void
ret void ret void
} }
define void @Tstrict() strictfp {
entry:
; CHECK-LABEL: @Tstrict(
; CHECK-NEXT: entry:
; cos(1) strictfp sets FP status flags
; CHECK-NEXT: %cos4 = call double @cos(double 1.000000e+00)
%cos4 = call double @cos(double 1.000000e+00) strictfp
; CHECK-NEXT: ret void
ret void
}

llvm/test/Transforms/InstCombine/constant-fold-libfunc.ll

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; CHECK-LABEL: @test_acos_nobuiltin ; CHECK-LABEL: @test_acos_nobuiltin
%pi = call double @acos(double -1.000000e+00) nobuiltin %pi = call double @acos(double -1.000000e+00) nobuiltin
; CHECK: call double @acos(double -1.000000e+00) ; CHECK: call double @acos(double -1.000000e+00)
ret double %pi ret double %pi
} }
; Check that we don't constant fold strictfp results that require rounding. ; Check that we don't constant fold strictfp results that require rounding.
define double @test_acos_strictfp() { define double @test_acos_strictfp() strictfp {
; CHECK-LABEL: @test_acos_strictfp ; CHECK-LABEL: @test_acos_strictfp
%pi = call double @acos(double -1.000000e+00) strictfp %pi = call double @acos(double -1.000000e+00) strictfp
; CHECK: call double @acos(double -1.000000e+00) ; CHECK: call double @acos(double -1.000000e+00)
ret double %pi ret double %pi
} }

llvm/test/Transforms/InstCombine/memcpy-1.ll

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; CHECK-NEXT: ret i8* [[MEM1]] ; CHECK-NEXT: ret i8* [[MEM1]]
; ;
%ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size) %ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size)
ret i8* %ret ret i8* %ret
} }
; Verify that the strictfp attr doesn't block this optimization. ; Verify that the strictfp attr doesn't block this optimization.
define i8* @test_simplify2(i8* %mem1, i8* %mem2, i32 %size) { define i8* @test_simplify2(i8* %mem1, i8* %mem2, i32 %size) strictfp {
; CHECK-LABEL: @test_simplify2( ; CHECK-LABEL: @test_simplify2(
; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 [[MEM1:%.*]], i8* align 1 [[MEM2:%.*]], i32 [[SIZE:%.*]], i1 false) ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 1 [[MEM1:%.*]], i8* align 1 [[MEM2:%.*]], i32 [[SIZE:%.*]], i1 false)
; CHECK-NEXT: ret i8* [[MEM1]] ; CHECK-NEXT: ret i8* [[MEM1]]
; ;
%ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size) strictfp %ret = call i8* @memcpy(i8* %mem1, i8* %mem2, i32 %size) strictfp
ret i8* %ret ret i8* %ret
} }

llvm/test/Verifier/fp-intrinsics.ll

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; Test that the verifier accepts legal code, and that the correct attributes are ; Test that the verifier accepts legal code, and that the correct attributes are
; attached to the FP intrinsic. ; attached to the FP intrinsic.
; CHECK1: declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) #[[ATTR:[0-9]+]] ; CHECK1: declare double @llvm.experimental.constrained.fadd.f64(double, double, metadata, metadata) #[[ATTR:[0-9]+]]
; CHECK1: declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) #[[ATTR]] ; CHECK1: declare double @llvm.experimental.constrained.sqrt.f64(double, metadata, metadata) #[[ATTR]]
; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nounwind willreturn } ; CHECK1: attributes #[[ATTR]] = { inaccessiblememonly nounwind willreturn }
; Note: FP exceptions aren't usually caught through normal unwind mechanisms, ; Note: FP exceptions aren't usually caught through normal unwind mechanisms,
; but we may want to revisit this for asynchronous exception handling. ; but we may want to revisit this for asynchronous exception handling.
define double @f1(double %a, double %b) { define double @f1(double %a, double %b) #0 {
entry: entry:
%fadd = call double @llvm.experimental.constrained.fadd.f64( %fadd = call double @llvm.experimental.constrained.fadd.f64(
double %a, double %b, double %a, double %b,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %fadd ret double %fadd
} }
define double @f1u(double %a) { define double @f1u(double %a) #0 {
entry: entry:
%fsqrt = call double @llvm.experimental.constrained.sqrt.f64( %fsqrt = call double @llvm.experimental.constrained.sqrt.f64(
double %a, double %a,
metadata !"round.dynamic", metadata !"round.dynamic",
metadata !"fpexcept.strict") metadata !"fpexcept.strict") #0
ret double %fsqrt ret double %fsqrt
} }
; Test an illegal value for the rounding mode argument. ; Test an illegal value for the rounding mode argument.
; CHECK2: invalid rounding mode argument ; CHECK2: invalid rounding mode argument
;T2: define double @f2(double %a, double %b) { ;T2: define double @f2(double %a, double %b) #0 {
;T2: entry: ;T2: entry:
;T2: %fadd = call double @llvm.experimental.constrained.fadd.f64( ;T2: %fadd = call double @llvm.experimental.constrained.fadd.f64(
;T2: double %a, double %b, ;T2: double %a, double %b,
;T2: metadata !"round.dynomite", ;T2: metadata !"round.dynomite",
;T2: metadata !"fpexcept.strict") ;T2: metadata !"fpexcept.strict") #0
;T2: ret double %fadd ;T2: ret double %fadd
;T2: } ;T2: }
; Test an illegal value for the exception behavior argument. ; Test an illegal value for the exception behavior argument.
; CHECK3: invalid exception behavior argument ; CHECK3: invalid exception behavior argument
;T3: define double @f3(double %a, double %b) { ;T3: define double @f3(double %a, double %b) #0 {
;T3: entry: ;T3: entry:
;T3: %fadd = call double @llvm.experimental.constrained.fadd.f64( ;T3: %fadd = call double @llvm.experimental.constrained.fadd.f64(
;T3: double %a, double %b, ;T3: double %a, double %b,
;T3: metadata !"round.dynamic", ;T3: metadata !"round.dynamic",
;T3: metadata !"fpexcept.restrict") ;T3: metadata !"fpexcept.restrict") #0
;T3: ret double %fadd ;T3: ret double %fadd
;T3: } ;T3: }
; Test an illegal value for the rounding mode argument. ; Test an illegal value for the rounding mode argument.
; CHECK4: invalid rounding mode argument ; CHECK4: invalid rounding mode argument
;T4: define double @f4(double %a) { ;T4: define double @f4(double %a) #0 {
;T4: entry: ;T4: entry:
;T4: %fadd = call double @llvm.experimental.constrained.sqrt.f64( ;T4: %fadd = call double @llvm.experimental.constrained.sqrt.f64(
;T4: double %a, ;T4: double %a,
;T4: metadata !"round.dynomite", ;T4: metadata !"round.dynomite",
;T4: metadata !"fpexcept.strict") ;T4: metadata !"fpexcept.strict") #0
;T4: ret double %fadd ;T4: ret double %fadd
;T4: } ;T4: }
; Test an illegal value for the exception behavior argument. ; Test an illegal value for the exception behavior argument.
; CHECK5: invalid exception behavior argument ; CHECK5: invalid exception behavior argument
;T5: define double @f5(double %a) { ;T5: define double @f5(double %a) #0 {
;T5: entry: ;T5: entry:
;T5: %fadd = call double @llvm.experimental.constrained.sqrt.f64( ;T5: %fadd = call double @llvm.experimental.constrained.sqrt.f64(
;T5: double %a, ;T5: double %a,
;T5: metadata !"round.dynamic", ;T5: metadata !"round.dynamic",
;T5: metadata !"fpexcept.restrict") ;T5: metadata !"fpexcept.restrict") #0
;T5: ret double %fadd ;T5: ret double %fadd
;T5: } ;T5: }
attributes #0 = { strictfp }