[ARM] Select VFMA

[samtebbs]

Summary

This patch adds patterns to select the MVE instructions VFMA.f16 and VFMA.f32.

[dmgreen]

Remember to upload with context! It makes the reviews easier to read.

llvm/lib/Target/ARM/ARMInstrMVE.td

2604

I think this is near VADD? Do you mind moving it up to near VFMA, to keep things together.

2606

Also I think it's better to use MQPR, over QPR

llvm/test/CodeGen/ARM/vfma.ll

2

Can you move this test to test/CodeGen/Thumb2/mve-vfma.ll? Just to be with the others

24

These lines can go, as a little bit of a cleanup.

25

As can the #1 on the end of these.

[dmgreen]

Nice one. LGTM

[samtebbs]

Committed as https://reviews.llvm.org/rG7ca980edcd76a83320306bafe07978e5db1bed3b

llvm/lib/Target/ARM/ARMInstrMVE.td

             (v4f32 (MVE_VADDf32 (v4f32 MQPR:$val1), (v4f32 MQPR:$val2)))>;
   def : Pat<(v8f16 (fadd (v8f16 MQPR:$val1), (v8f16 MQPR:$val2))),
             (v8f16 (MVE_VADDf16 (v8f16 MQPR:$val1), (v8f16 MQPR:$val2)))>;
+  def : Pat<(v8f16 (fma (v8f16 QPR:$src1), (v8f16 QPR:$src2), (v8f16 QPR:$src3))),
+            (v8f16 (MVE_VFMAf16 $src3, $src1, $src2))>;
+  def : Pat<(v4f32 (fma (v4f32 QPR:$src1), (v4f32 QPR:$src2), (v4f32 QPR:$src3))),
+            (v4f32 (MVE_VFMAf32 $src3, $src1, $src2))>;
 }
 
 def MVE_VSUBf32 : MVE_VADDSUBFMA_fp<"vsub", "f32", 0b0, 0b0, 0b1, 0b1>;

llvm/test/CodeGen/ARM/vfma.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv8.1m.main-arm-none-eabi -mattr=+mve.fp %s -o - | FileCheck %s
+
+define arm_aapcs_vfpcc <4 x float> @fma_v4f32(<4 x float> %dst, <4 x float> %s1, <4 x float> %s2) {
+; CHECK-LABEL: fma_v4f32:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    vfma.f32 q0, q1, q2
+; CHECK-NEXT:    bx lr
+entry:
+  %0 = tail call fast <4 x float> @llvm.fma.v4f32(<4 x float> %s1, <4 x float> %s2, <4 x float> %dst)
+  ret <4 x float> %0
+}
+
+define arm_aapcs_vfpcc <8 x half> @fma_v8f16(<8 x half> %dst, <8 x half> %s1, <8 x half> %s2) {
+; CHECK-LABEL: fma_v8f16:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    vfma.f16 q0, q1, q2
+; CHECK-NEXT:    bx lr
+entry:
+  %0 = tail call fast <8 x half> @llvm.fma.v8f16(<8 x half> %s1, <8 x half> %s2, <8 x half> %dst)
+  ret <8 x half> %0
+}
+
+; Function Attrs: nounwind readnone speculatable
+declare <4 x float> @llvm.fma.v4f32(<4 x float>, <4 x float>, <4 x float>) #1
+; Function Attrs: nounwind readnone speculatable
+declare <8 x half> @llvm.fma.v8f16(<8 x half>, <8 x half>, <8 x half>) #1