Adds the SVE vector and predicate registers to the list of known registers.
erichkeane sdesmalen rengolin
- rL366878: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
rG2b290885d947: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
rC366878: [SVE][Inline-Asm] Add support to specify SVE registers in the clobber list
rL367432: Merging r366878 and r367301:
rG5f32370064ad: Merging r366878 and r367301:
Functionally the patch looks good, but the title suggests this adds full inline-asm support for SVE (which would require the ACLE types proposed in D62960, as well as other changes), where this patch only adds support to specify SVE registers in the clobber list.
nit: there is no reason to have a different code-style for code and tests (curly brace is on next line here).
nit: The asm/instructions here don't really need to make sense (as in: they are not executed), so you can combine all three tests into one, as long as the instructions are valid and z0, p0, z31 and z15 are used.
- Removed typo fixes from this patch
- Consolidated the tests in aarch64-sve-inline-asm.c into one test & fixed formatting
- Added a test without +sve to ensure we get the correct diagnostic
Without the -emit-llvm part this test invokes (and tests the diagnostic of) the compiler. I don't think this is what we want. At the same time, this code should probably still continue match the z and p registers even if the target feature is not given, and thus leave it to LLVM to determine whether the use of these registers makes sense or not. So removing -target-feature +sve from the RUN line should be sufficient here. @rovka do you agree?
There is no variable linked to t in this inline asm, so you can remove this clause.