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[PowerPC][Peephole] Combine extsw and sldi after instruction selection
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Authored by lkail on Jun 25 2019, 10:44 PM.

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Summary

extsw and sldi are supposed to be combined if they are in the same BB in instruction selection phase. This patch handles the case where extsw and sldi are not in the same BB.

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rL LLVM

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lkail created this revision.Jun 25 2019, 10:44 PM
Herald added a project: Restricted Project. · View Herald TranscriptJun 25 2019, 10:44 PM
lkail edited the summary of this revision. (Show Details)Jun 25 2019, 10:46 PM
lkail edited the summary of this revision. (Show Details)
lkail updated this revision to Diff 206984.Jun 27 2019, 6:51 PM

Updated the patch to reflect recent changes.

lkail added a comment.Jul 1 2019, 2:47 AM

Gentle ping.

hfinkel added inline comments.Jul 8 2019, 10:01 AM
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
1404 ↗(On Diff #206984)

Should we also erase SrcMI?

lkail marked an inline comment as done.Jul 8 2019, 6:45 PM
lkail added inline comments.
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
1404 ↗(On Diff #206984)

Yes. We can erase SrcMI here, also we can leave it to DCE pass. I have no idea which one is preferable.

hfinkel added inline comments.Jul 8 2019, 7:04 PM
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
1404 ↗(On Diff #206984)

Might as well do it here.

lkail updated this revision to Diff 208576.Jul 8 2019, 7:47 PM
lkail marked an inline comment as done.
lkail added inline comments.
llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
1404 ↗(On Diff #206984)

Done.

hfinkel accepted this revision.Jul 8 2019, 7:52 PM

LGTM

This revision is now accepted and ready to land.Jul 8 2019, 7:52 PM
This revision was automatically updated to reflect the committed changes.