[LLD][ELF][ARM] Synthesise missing .ARM.exidx sections.

[peter.smith]

Summary

When ARM exceptions are used executable sections have an associated .ARM.exidx section containing unwind information for the executable section. The linker combines these .ARM.exidx sections into a single table ordered by the address of the sections they describe. When an exception is thrown the unwinder looks up the unwinding information by binary searching the table. The .ARM.exidx section contains an table of 8-byte entries of theform:

| PREL31 relocation to function start | Unwind instructions |

The range of addresses covered by the table entry is terminated by the next table entry. This allows consecutive table entries that are identical to be merged, leaving a single large range of PC values matching the same set of unwinding information. Unfortunately if an executable section does not have an associated .ARM.exidx section but is placed after an executable section with unwinding information it can "inherit" the unwind information of the previous table entry instead of terminating it. To fix this problem the linker generates an EXIDX_CANTUNWIND entry for all executable sections without .ARM.exidx sections. I've followed the ld.gold high level behaviour here:

• Generate EXIDX_CANTUNWIND sections only when there is a .ARM.exidx OutputSection.
• Only generate EXIDX_CANTUNWIND sections for executable, non-0 sized non-synthetic sections.
• We want consecutive linker generated EXIDX_CANTUNWIND sections to be merged as if they were from InputFiles.

The implementation extends the sentinel section concept to an arbitrary InputSection. This permits the terminating SentinelSection to be merged into a previous EXIDX_CANTUNWIND entry, although I haven't done that in this patch to limit the number of changes.

Fixes pr40277 https://bugs.llvm.org/show_bug.cgi?id=40277 which has been blocking a project from moving to LLD on Arm.

[grimar]

Few suggestions about the code/style are below.

ELF/SyntheticSections.h

937

Could you extend the comment? Without reading the patch description it
is probably not clear what is EXIDX_CANTUNWIND entry and why
normal and terminating entries are required.

949

Could it be inlined in the constructor?

RawData = { ... };

getSize() seems could either return a constant or RawData.size() then it seems.

ELF/Writer.cpp

1479

Dep->Type & SHT_ARM_EXIDX

1483

This would probably look simpler a bit if was inversed + early return was used:

if (!IS->Live || IS->kind() == InputSectionBase::Synthetic ||
            !(IS->Flags & SHF_EXECINSTR) || !IS->getSize())
return false;
...

Also, so you need IS->Live? I would expect input sections included in output sections to be live.

1490

You do not need to wrap for in curly bracers.

1518

assert(Sentinel->IsSentinel);

[peter.smith]

Thanks for the comments. I will upload another diff in a few minutes.

ELF/SyntheticSections.h

937

Sure have done so. This was a valuable exercise as I remembered the precise reason we had to have a terminating sentinel (libunwind bug).

949

Not easily as RawData is a member of a base class. I could add another constructor for SyntheticSection that forwards Data to InputSection but I'm not sure it is worth it. Given that all sections will get the same value I've made it a static.

ELF/Writer.cpp

1483

I do as I'm iterating through InputSections and not the contents of the OutputSection. As it happens I found that adding the Sections at this point breaks LinkerScript Symbol assignment. I've moved the addition to the same place as the existing sentinel and I've made a modification to arm-exidx-sentinel-and-assignment.s so that it fails if I don't.

[peter.smith]

Uploaded new diff to address review comments, main changes:

• Added expanded comment explaining why we need these sections.
• Moved the addition of the synthetic sections to where we add the sentinel and added test that fails if we don't.

[ruiu]

ELF/SyntheticSections.cpp

3051

You are assigning a nullptr to a boolean member.

Who sets IsSentinel to true? Looks like there's no code doing that.

[peter.smith]

I think what I have there is correct but it obviously could be clearer. I've added some alternatives inline.

ELF/SyntheticSections.cpp

3051

I don't think I am as the == will have higher precedence than the =. However I should find another way of expressing it. The simplest way is to put some parentheses around so that it is IsSentinel = (Link == nullptr);

What I need is a way of distinguishing between the Sentinel (so I can write the address of the end of the section). We do know that at at construction time as the Sentinel won't have a Section to link to at construction time as we don't know what it will be yet, in all other cases we do know. Alternatives:

• 2 constructors, One with no argument (IsSentinel = True), One with an InputSection * argument (IsSentinel = False). This does duplicate quite a bit of code though.
• Set IsSentinel = true when we assign the highest InputSection to be the Sentinel Section Link.

Any preferences?

[ruiu]

ELF/SyntheticSections.cpp

3051

Apologies, I misread == as =. I'm reading this patch again.

[ruiu]

We used to handle .ARM.exidx sections as regular sections with a sentinel section that is synthesized and added to the end. We later added code to merge contiguous .ARM.exidx sections, and now this patch is adding sentinels at various points. At this point, maybe it is easier to handle .ARM.exidx as a single synthetic section just like MergeInputSection? That synthetic section removes all input section whose name is .ARM.exidx from the input section list and add itself to the input section. That design gives you more flexibility than the current design, as the intermediate data representation doesn't have to be an InputSection.

[ruiu]

If we define a synthetic ARM.exidx section which consumes all .ARM.exidx sections and replace them with itself, we can perhaps remove SHF_ORDER and other features that we add for .ARM.exidx sections. If there's no other use of the features, I'd like to remove them.

(We saw this pattern many times: some special section such as .ARM.exidx needs special handling by the linker, and that's implemented using a generic mechanism such as SHF_ORDER, but it later turned out that that generic mechanism does not cover all corner cases, so we ended up having a complex generic feature *and* a target-aware feature. In many cases, it should have been easier to implement as a special feature from the beginning.)

[pcc]

SHF_LINK_ORDER is used by the sanitizers.

[peter.smith]

The LLVM associated symbol metadata uses SHF_LINK_ORDER (https://llvm.org/docs/LangRef.html#associated-metadata) and I think this is used by the at least some of the sanitizers. I think it would be difficult to get rid of completely.

I think it could be possible to implement .ARM.exidx as a single SyntheticSection as the unwinder requires there to be only one contiguous range. I'm not sure whether it would be considerably better than what we have now. I can think of a couple of ways to implement it:

• Have the .ARM.exidx synthetic section be in effect a container for all .ARM.exidx InputSections, with a finalize() that does the sythesize entry, equivalent of SHF_LINK_ORDER and compression. This would in effect move some of the code out of Writer.cpp and into SyntheticSections.cpp but much of it would be the same. Instead of making a small number of Synthetic .ARM.exidx sections we'd create a single one, then write some code to filter all the InputSections into it.
• Do something more radical like copying the contents of all .ARM.exidx sections along with an abstraction of the relocations (all the same type) into a giant buffer or table structure. We'd then sort the table, compress it and handle the relocations in writeTo() like we do with the PLT sections.

I can't immediately think that either one of those would be much better that what we have. If either of those or any other idea sounds plausible I can write a prototype to see what it looks like, I'd prefer to only do that if an approach sounds appealing though?

[george.burgess.iv]

Thank you all for helping with this!

Friendly ping :)

(Looks like subscribing on its own no longer generates emails? If it does, apologies about the double ping)

[peter.smith]

At the moment I'm happy with the current implementation assuming that the .ARM.exidx sections from input objects are treated are modelled as InputSections. If I'm going to need to rewrite all of it as a single synthetic section I can do it, but that is quite a bit of work and there isn't a guarantee it will be any better. Would it be possible to take this patch for the benefit of the teams waiting on the PR, and I'll work on a replacement? If it turns out to be better we can switch to it?

[peter.smith]

In D58047#1397285, @ruiu wrote:

We used to handle .ARM.exidx sections as regular sections with a sentinel section that is synthesized and added to the end. We later added code to merge contiguous .ARM.exidx sections, and now this patch is adding sentinels at various points. At this point, maybe it is easier to handle .ARM.exidx as a single synthetic section just like MergeInputSection? That synthetic section removes all input section whose name is .ARM.exidx from the input section list and add itself to the input section. That design gives you more flexibility than the current design, as the intermediate data representation doesn't have to be an InputSection.

I've submitted D59216 to show what that would look like. I'd like to keep this open until there is an idea of which approach is preferable.

[peter.smith]

Abandoned in favour of D59216

ELF/InputSection.cpp

if (Hdr->ch_type != ELFCOMPRESS_ZLIB) {
     return;
   }
 
   UncompressedSize = Hdr->ch_size;
   RawData = RawData.slice(sizeof(*Hdr));
 }
 
 InputSection *InputSectionBase::getLinkOrderDep() const {
+  // Synthetic LinkOrder dependency stores Section directly.
+  if (auto *ARMExidx = dyn_cast<ARMExidxSyntheticSection>(this))
+    return ARMExidx->LinkSec;
   assert(Link);
   assert(Flags & SHF_LINK_ORDER);
   return cast<InputSection>(File->getSections()[Link]);
 }
 
 // Find a function symbol that encloses a given location.
 template <class ELFT>
 Defined *InputSectionBase::getEnclosingFunction(uint64_t Offset) {

ELF/SyntheticSections.h

 // ftp://www.linux-mips.org/pub/linux/mips/doc/ABI/mipsabi.pdf
 class MipsRldMapSection : public SyntheticSection {
 public:
   MipsRldMapSection();
   size_t getSize() const override { return Config->Wordsize; }
   void writeTo(uint8_t *Buf) override {}
 };
 
-class ARMExidxSentinelSection : public SyntheticSection {
-public:
-  ARMExidxSentinelSection();
-  size_t getSize() const override { return 8; }
+// Represent a Linker generated EXIDX_CANTUNWIND entry. There are two
+// cases:
+// Terminating sentinel entry; IsSentinel = true, LinkSec = nullptr until
+// all InputSections are sorted.
+// Normal entry for a known Section; IsSentinel = false, LinkSec = Section.
+class ARMExidxSyntheticSection : public SyntheticSection {
+public:
+  // Use LinkSec = nullptr to create terminating sentinel entry.
+  ARMExidxSyntheticSection(InputSection *LinkSec);
+  size_t getSize() const override { return sizeof(Data); }
   void writeTo(uint8_t *Buf) override;
   bool empty() const override;
 
   static bool classof(const SectionBase *D);
 
-  // The last section referenced by a regular .ARM.exidx section.
-  // It is found and filled in Writer<ELFT>::resolveShfLinkOrder().
-  // The sentinel points at the end of that section.
-  InputSection *Highest = nullptr;
+  // We only need to represent a single EXIDX_CANTUNWIND entry.
+  uint8_t Data[8] = {0, 0, 0, 0,  // PREL31 to target
+                     1, 0, 0, 0}; // EXIDX_CANTUNWIND
+
+  InputSection *LinkSec;
+  bool IsSentinel;
 };
 
 // A container for one or more linker generated thunks. Instances of these
 // thunks including ARM interworking and Mips LA25 PI to non-PI thunks.
 class ThunkSection : public SyntheticSection {
 public:
   // ThunkSection in OS, with desired OutSecOff of Off
   ThunkSection(OutputSection *OS, uint64_t Off);

ELF/SyntheticSections.cpp

void elf::mergeSections() {
   std::vector<InputSectionBase *> &V = InputSections;
   V.erase(std::remove(V.begin(), V.end(), nullptr), V.end());
 }
 
 MipsRldMapSection::MipsRldMapSection()
     : SyntheticSection(SHF_ALLOC | SHF_WRITE, SHT_PROGBITS, Config->Wordsize,
                        ".rld_map") {}
 
-ARMExidxSentinelSection::ARMExidxSentinelSection()
+ARMExidxSyntheticSection::ARMExidxSyntheticSection(InputSection *Link)
     : SyntheticSection(SHF_ALLOC | SHF_LINK_ORDER, SHT_ARM_EXIDX,
-                       Config->Wordsize, ".ARM.exidx") {}
+                       Config->Wordsize, ".ARM.exidx"),
+      LinkSec(Link) {
+  IsSentinel = Link == nullptr;
+  RawData = Data;
+}
 
-// Write a terminating sentinel entry to the end of the .ARM.exidx table.
-// This section will have been sorted last in the .ARM.exidx table.
+// Write a EXIDX_CANTUNWIND entry to the .ARM.exidx table. This will either be
+// a terminating sentinel entry or a synthetic entry for a code section that
+// had no exception tables.
+// The sentinel section will have been sorted last in the .ARM.exidx table.
 // This table entry will have the form:
 // | PREL31 upper bound of code that has exception tables | EXIDX_CANTUNWIND |
 // The sentinel must have the PREL31 value of an address higher than any
 // address described by any other table entry.
-void ARMExidxSentinelSection::writeTo(uint8_t *Buf) {
-  assert(Highest);
-  uint64_t S = Highest->getVA(Highest->getSize());
+// A synthetic table entry will have the form:
+// | PREL31 start of LinkSec | EXIDX_CANTUNWIND |
+void ARMExidxSyntheticSection::writeTo(uint8_t *Buf) {
+  uint64_t S = IsSentinel ? LinkSec->getVA(LinkSec->getSize()) : LinkSec->getVA();
   uint64_t P = getVA();
   Target->relocateOne(Buf, R_ARM_PREL31, S - P);
   write32le(Buf + 4, 1);
 }
 
 // The sentinel has to be removed if there are no other .ARM.exidx entries.
-bool ARMExidxSentinelSection::empty() const {
+bool ARMExidxSyntheticSection::empty() const {
   for (InputSection *IS : getInputSections(getParent()))
-    if (!isa<ARMExidxSentinelSection>(IS))
+    if (!isa<ARMExidxSyntheticSection>(IS))
       return false;
   return true;
 }
 
-bool ARMExidxSentinelSection::classof(const SectionBase *D) {
+bool ARMExidxSyntheticSection::classof(const SectionBase *D) {
   return D->kind() == InputSectionBase::Synthetic && D->Type == SHT_ARM_EXIDX;
 }
 
 ThunkSection::ThunkSection(OutputSection *OS, uint64_t Off)
     : SyntheticSection(SHF_ALLOC | SHF_EXECINSTR, SHT_PROGBITS,
                        Config->Wordsize, ".text.thunk") {
   this->Parent = OS;
   this->OutSecOff = Off;

ELF/Writer.cpp

if (In.SymTabShndx)
     Add(In.SymTabShndx);
   Add(In.ShStrTab);
   if (In.StrTab)
     Add(In.StrTab);
 
   if (Config->EMachine == EM_ARM && !Config->Relocatable)
     // Add a sentinel to terminate .ARM.exidx. It helps an unwinder
     // to find the exact address range of the last entry.
-    Add(make<ARMExidxSentinelSection>());
+    Add(make<ARMExidxSyntheticSection>(nullptr));
 }
 
 // The main function of the writer.
 template <class ELFT> void Writer<ELFT>::run() {
   // Create linker-synthesized sections such as .got or .plt.
   // Such sections are of type input section.
   createSyntheticSections<ELFT>();
 
while (NonScriptI != E) {
     std::rotate(Pos, NonScriptI, End);
     NonScriptI = End;
   }
 
   Script->adjustSectionsAfterSorting();
 }
 
 static bool compareByFilePosition(InputSection *A, InputSection *B) {
-  // Synthetic, i. e. a sentinel section, should go last.
-  if (A->kind() == InputSectionBase::Synthetic ||
-      B->kind() == InputSectionBase::Synthetic)
-    return A->kind() != InputSectionBase::Synthetic;
-
   InputSection *LA = A->getLinkOrderDep();
   InputSection *LB = B->getLinkOrderDep();
+  // There is a single synthetic sentinel section that must go last.
+  // getLinkOrderDep() returns nullptr for it.
+  if (LA == nullptr || LB == nullptr)
+    return LA != nullptr;
+
   OutputSection *AOut = LA->getParent();
   OutputSection *BOut = LB->getParent();
 
   if (AOut != BOut)
     return AOut->SectionIndex < BOut->SectionIndex;
   return LA->OutSecOff < LB->OutSecOff;
 }
 
static bool isDuplicateArmExidxSec(InputSection *Prev, InputSection *Cur) {
   return true;
 }
 
 template <class ELFT> void Writer<ELFT>::resolveShfLinkOrder() {
   for (OutputSection *Sec : OutputSections) {
     if (!(Sec->Flags & SHF_LINK_ORDER))
       continue;
 
+    if (!Config->Relocatable && Config->EMachine == EM_ARM &&
+        Sec->Type == SHT_ARM_EXIDX) {
+      // We are creating an Output .ARM.exidx section, create a cantunwind
+      // section for every executable section without a .ARM.exidx section.
+      // This prevents an executable section getting the unwind instructions
+      // from the previous table entry.
+      auto ExecWithNoARMExidx = [](InputSection *IS) {
+        if (IS->Live && IS->kind() != InputSectionBase::Synthetic &&
+            (IS->Flags & SHF_EXECINSTR) && IS->getSize() > 0) {
+          for (InputSection *Dep : IS->DependentSections)
+            if (Dep->Type & (SHT_ARM_EXIDX))
+              return false;
+          return true;
+        }
+        return false;
+      };
+
+      for (InputSectionBase *ISB : InputSections) {
+        if (auto *IS = dyn_cast<InputSection>(ISB))
+          if (ExecWithNoARMExidx(IS))
+            Sec->addSection(make<ARMExidxSyntheticSection>(IS));
+      }
+    }
+
     // Link order may be distributed across several InputSectionDescriptions
     // but sort must consider them all at once.
     std::vector<InputSection **> ScriptSections;
     std::vector<InputSection *> Sections;
     for (BaseCommand *Base : Sec->SectionCommands) {
       if (auto *ISD = dyn_cast<InputSectionDescription>(Base)) {
         for (InputSection *&IS : ISD->Sections) {
           ScriptSections.push_back(&IS);
           Sections.push_back(IS);
         }
       }
     }
     std::stable_sort(Sections.begin(), Sections.end(), compareByFilePosition);
 
     if (!Config->Relocatable && Config->EMachine == EM_ARM &&
         Sec->Type == SHT_ARM_EXIDX) {
 
-      if (auto *Sentinel = dyn_cast<ARMExidxSentinelSection>(Sections.back())) {
+      if (auto *Sentinel =
+              dyn_cast<ARMExidxSyntheticSection>(Sections.back())) {
         assert(Sections.size() >= 2 &&
                "We should create a sentinel section only if there are "
                "alive regular exidx sections.");
 
         // The last executable section is required to fill the sentinel.
         // Remember it here so that we don't have to find it again.
-        Sentinel->Highest = Sections[Sections.size() - 2]->getLinkOrderDep();
+        assert(Sentinel->IsSentinel == true);
+        Sentinel->LinkSec = Sections[Sections.size() - 2]->getLinkOrderDep();
       }
 
       // The EHABI for the Arm Architecture permits consecutive identical
       // table entries to be merged. We use a simple implementation that
       // removes a .ARM.exidx Input Section if it can be merged into the
       // previous one. This does not require any rewriting of InputSection
       // contents but misses opportunities for fine grained deduplication
       // where only a subset of the InputSection contents can be merged.

test/ELF/arm-exidx-add-missing.s

+// REQUIRES: arm
+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi --arm-add-build-attributes %s -o %t
+// RUN: ld-lld %t --no-merge-exidx-entries -o %t2
+// RUN: llvm-objdump -s %t2 | FileCheck %s
+// RUN: ld-lld %t -o %t3
+// RUN: llvm-objdump -s %t3 | FileCheck %s -check-prefix=CHECK-MERGE
+
+// The ARM.exidx section is a table of 8-byte entries of the form:
+// | PREL31 Relocation to start of function | Unwinding information |
+// The range of addresses covered by the table entry is terminated by the
+// next table entry. This means that an executable section without a .ARM.exidx
+// section does not terminate the range of addresses. To fix this the linker
+// synthesises an EXIDX_CANTUNWIND entry for each section wihout a .ARM.exidx
+// section.
+
+        .syntax unified
+
+        // Expect inline unwind instructions
+        .section .text.01, "ax", %progbits
+        .global f1
+f1:
+        .fnstart
+        bx lr
+        .save {r7, lr}
+        .setfp r7, sp, #0
+        .fnend
+
+        // Expect no unwind information from assembler. The linker must
+        // synthesise an EXIDX_CANTUNWIND entry to prevent an exception
+        // thrown through f2 from matching against the unwind instructions
+        // for f1.
+        .section .text.02, "ax", %progbits
+        .global f2
+f2:
+        bx lr
+
+
+        // Expect 1 EXIDX_CANTUNWIND entry that can be merged into the linker
+        // generated EXIDX_CANTUNWIND as if the assembler had generated it.
+        .section .text.03, "ax",%progbits
+        .global f3
+f3:
+        .fnstart
+        bx lr
+        .cantunwind
+        .fnend
+
+        // Dummy implementation of personality routines to satisfy reference
+        // from exception tables, linker will generate EXIDX_CANTUNWIND.
+        .section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
+        .global __aeabi_unwind_cpp_pr0
+__aeabi_unwind_cpp_pr0:
+        bx lr
+
+// f1, f2
+// CHECK:      100d4 2c0f0000 08849780 280f0000 01000000
+// f3, __aeabi_unwind_cpp_pr0
+// CHECK-NEXT: 100e4 240f0000 01000000 200f0000 01000000
+// sentinel
+// CHECK-NEXT: 100f4 1c0f0000 01000000
+
+// f1, (f2, f3, __aeabi_unwind_cpp_pr0)
+// CHECK-MERGE:      100d4 2c0f0000 08849780 280f0000 01000000
+// sentinel
+// CHECK-MERGE-NEXT: 100e4 2c0f0000 01000000
+

test/ELF/arm-exidx-canunwind.s

 // REQUIRES: arm
-// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
-// RUN: ld.lld %t -o %t2 2>&1
+// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: ld.lld %t -o %t2
 // RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
 // RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EXIDX %s
 // RUN: llvm-readobj --program-headers --sections %t2 | FileCheck -check-prefix=CHECK-PT %s
 
 // Test that inline unwinding table entries and references to .ARM.extab
 // entries survive the re-ordering of the .ARM.exidx section
 
  .syntax unified

 // CHECK-NEXT:    1100c:       1e ff 2f e1     bx      lr
 // CHECK:      func2:
 // CHECK-NEXT:    11010:       1e ff 2f e1     bx      lr
 // CHECK:      __gxx_personality_v0:
 // CHECK-NEXT:    11014:       1e ff 2f e1     bx      lr
 // CHECK:      __aeabi_unwind_cpp_pr0:
 // CHECK-NEXT:    11018:       1e ff 2f e1     bx      lr
 
-// CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + f38 = 1100c = func1 (inline unwinding data)
-// 100dc + f34 = 11010 = func2 (100e0 + c = 100ec = .ARM.extab entry)
-// CHECK-EXIDX-NEXT: 100d4 380f0000 08849780 340f0000 0c000000
-// 100e4 + f30 = 11014 = terminate = func2 + sizeof(func2)
-// CHECK-EXIDX-NEXT: 100e4 300f0000 01000000
-// CHECK-EXIDX-NEXT: Contents of section .ARM.extab:
-// 100ec + f28 = 11014 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 100ec 280f0000 b0b0b000 00000000
+// 100d4 + f2c = 11000 = main (linker generated cantunwind)
+// 100dc + f30 = 1100c = func1 (inline unwinding data)
+// CHECK-EXIDX:      100d4 2c0f0000 01000000 300f0000 08849780
+// 100e4 + f2c = 11010 = func2 (100e8 + 14 = 100fc = .ARM.extab entry)
+// 100ec + f28 = 11014 = __gcc_personality_v0 (linker generated cantunwind)
+// CHECK-EXIDX-NEXT: 100e4 2c0f0000 14000000 280f0000 01000000
+// 100f4 + f28 = 1101c = sentinel
+// CHECK-EXIDX-NEXT: 100f4 280f0000 01000000
 
 // CHECK-PT:          Name: .ARM.exidx
 // CHECK-PT-NEXT:     Type: SHT_ARM_EXIDX (0x70000001)
 // CHECK-PT-NEXT:     Flags [
 // CHECK-PT-NEXT:       SHF_ALLOC
 // CHECK-PT-NEXT:       SHF_LINK_ORDER
 // CHECK-PT-NEXT:     ]
 // CHECK-PT-NEXT:     Address: 0x100D4
 // CHECK-PT-NEXT:     Offset: 0xD4
-// CHECK-PT-NEXT:     Size: 24
+// CHECK-PT-NEXT:     Size: 40
 
 // CHECK-PT:          Type: PT_ARM_EXIDX (0x70000001)
 // CHECK-PT-NEXT:     Offset: 0xD4
 // CHECK-PT-NEXT:     VirtualAddress: 0x100D4
 // CHECK-PT-NEXT:     PhysicalAddress: 0x100D4
-// CHECK-PT-NEXT:     FileSize: 24
-// CHECK-PT-NEXT:     MemSize: 24
+// CHECK-PT-NEXT:     FileSize: 40
+// CHECK-PT-NEXT:     MemSize: 40
 // CHECK-PT-NEXT:     Flags [ (0x4)
 // CHECK-PT-NEXT:       PF_R (0x4)
 // CHECK-PT-NEXT:     ]
 // CHECK-PT-NEXT:     Alignment: 4
 // CHECK-PT-NEXT:   }

test/ELF/arm-exidx-dedup.s

 // REQUIRES: arm
-// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t --no-merge-exidx-entries -o %t2
 // RUN: llvm-objdump -s %t2 | FileCheck --check-prefix CHECK-DUPS %s
 // RUN: ld.lld %t -o %t3
 // RUN: llvm-objdump -s %t3 | FileCheck %s
+
 // Test that lld can at least remove duplicate .ARM.exidx sections. A more
 // fine grained implementation will be able to remove duplicate entries within
 // a .ARM.exidx section.
 
 // With duplicate entries
 // CHECK-DUPS: Contents of section .ARM.exidx:
-// CHECK-DUPS-NEXT:  100d4 2c0f0000 01000000 280f0000 01000000
-// CHECK-DUPS-NEXT:  100e4 240f0000 01000000 200f0000 01000000
-// CHECK-DUPS-NEXT:  100f4 1c0f0000 08849780 180f0000 08849780
-// CHECK-DUPS-NEXT:  10104 140f0000 08849780 100f0000 14000000
-// CHECK-DUPS-NEXT:  10114 0c0f0000 18000000 080f0000 01000000
+// CHECK-DUPS-NEXT: 100d4 2c0f0000 01000000 280f0000 01000000
+// CHECK-DUPS-NEXT: 100e4 240f0000 01000000 200f0000 01000000
+// CHECK-DUPS-NEXT: 100f4 1c0f0000 08849780 180f0000 08849780
+// CHECK-DUPS-NEXT: 10104 140f0000 08849780 100f0000 24000000
+// CHECK-DUPS-NEXT: 10114 0c0f0000 28000000 080f0000 01000000
+// CHECK-DUPS-NEXT: 10124 040f0000 01000000 000f0000 01000000
 // CHECK-DUPS-NEXT: Contents of section .ARM.extab:
 
 // After duplicate entry removal
 // CHECK: Contents of section .ARM.exidx:
-// CHECK-NEXT:  100d4 2c0f0000 01000000 340f0000 08849780
-// CHECK-NEXT:  100e4 380f0000 14000000 340f0000 18000000
-// CHECK-NEXT:  100f4 300f0000 01000000
+// CHECK-NEXT: 100d4 2c0f0000 01000000 340f0000 08849780
+// CHECK-NEXT: 100e4 380f0000 1c000000 340f0000 20000000
+// CHECK-NEXT: 100f4 300f0000 01000000 300f0000 01000000
 // CHECK-NEXT: Contents of section .ARM.extab:
         .syntax unified
 
         // Expect 1 EXIDX_CANTUNWIND entry.
         .section .text.00, "ax", %progbits
         .globl _start
 _start:
         .fnstart

 f8:
         .fnstart
         bx lr
         .personality __gxx_personality_v0
         .handlerdata
         .long 0
         .fnend
 
- // Dummy implementation of personality routines to satisfy reference from
- // exception tables
+// Expect Linker generated EXIDX_CANTUNWIND tables
         .section .text.__gcc_personality_v0, "ax", %progbits
         .global __gxx_personality_v0
 __gxx_personality_v0:
         bx lr
 
         .section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
         .global __aeabi_unwind_cpp_pr0
 __aeabi_unwind_cpp_pr0:
         bx lr

test/ELF/arm-exidx-gc.s

 // REQUIRES: arm
-// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: llvm-mc -filetype=obj --arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld %t --no-merge-exidx-entries -o %t2 --gc-sections 2>&1
 // RUN: llvm-objdump -d -triple=armv7a-none-linux-gnueabi %t2 | FileCheck %s
 // RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EXIDX %s
 
 // Test the behavior of .ARM.exidx sections under garbage collection
 // A .ARM.exidx section is live if it has a relocation to a live executable
 // section.
 // A .ARM.exidx section may have a relocation to a .ARM.extab section, if the

 
 // GC should have removed table entries for unusedfunc1, unusedfunc2
 // and __gxx_personality_v1
 // CHECK-NOT: unusedfunc1
 // CHECK-NOT: unusedfunc2
 // CHECK-NOT: __gxx_personality_v1
 
 // CHECK-EXIDX: Contents of section .ARM.exidx:
-// 100d4 + f38 = 1100c = func1
-// 100dc + f34 = 11010 = func2 (100e0 + 1c = 100fc = .ARM.extab)
-// CHECK-EXIDX-NEXT: 100d4 380f0000 08849780 340f0000 1c000000
-// 100e4 + f30 = 11014 = __gxx_personality_v0
-// 100ec + f2c = 11018 = __aeabi_unwind_cpp_pr0
-// CHECK-EXIDX-NEXT: 100e4 300f0000 01000000 2c0f0000 01000000
-// 100f4 + f28 = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
-// CHECK-EXIDX-NEXT: 100f4 280f0000 01000000
+// 100d4 + f2c = 11000
+// 100dc + f30 = 1100c = func1
+// CHECK-EXIDX-NEXT: 100d4 2c0f0000 01000000 300f0000 08849780
+// 100e4 + f2c = 11010 = func2 (100e8 + 1c = 10104 = .ARM.extab)
+// 100ec + f28 = 11014 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 100e4 2c0f0000 1c000000 280f0000 01000000
+// 100f4 + f24 = 11018 = __aeabi_unwind_cpp_pr0
+// 100fc + f20 = 1101c = __aeabi_unwind_cpp_pr0 + sizeof(__aeabi_unwind_cpp_pr0)
+// CHECK-EXIDX-NEXT: 100f4 240f0000 01000000 200f0000 01000000
 // CHECK-EXIDX-NEXT: Contents of section .ARM.extab:
-// 100fc + f18 = 11014 = __gxx_personality_v0
-// CHECK-EXIDX-NEXT: 100fc 180f0000 b0b0b000
+// 10104 + f10 = 11014 = __gxx_personality_v0
+// CHECK-EXIDX-NEXT: 10104 100f0000 b0b0b000

test/ELF/arm-exidx-no-add-missing.s

+// REQUIRES: arm
+// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi --arm-add-build-attributes %s -o %t
+// RUN: ld-lld %t -o %t2
+// RUN: llvm-objdump -s %t2 | FileCheck %s
+
+// We do not want to generate missing EXIDX_CANTUNWIND entries if there are no
+// input .ARM.exidx sections.
+
+// CHECK-NOT: .ARM.exidx
+        .syntax unified
+        .text
+  .globl _start
+  .type _start, %function
+_start:
+  bx lr
+

test/ELF/arm-exidx-shared.s

 // REQUIRES: arm
-// RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux-gnueabi %s -o %t
+// RUN: llvm-mc -filetype=obj -arm-add-build-attributes -triple=armv7a-none-linux-gnueabi %s -o %t
 // RUN: ld.lld --hash-style=sysv %t --shared -o %t2 2>&1
 // RUN: llvm-readobj --relocations %t2 | FileCheck %s
 // RUN: llvm-objdump -s -triple=armv7a-none-linux-gnueabi %t2 | FileCheck -check-prefix=CHECK-EXTAB %s
 
 // Check that the relative R_ARM_PREL31 relocation can access a PLT entry
 // for when the personality routine is referenced from a shared library.
 // Also check that the R_ARM_NONE no-op relocation can be used in a shared
 // library.

 __aeabi_unwind_cpp_pr0:
  bx lr
 
 // CHECK: Relocations [
 // CHECK-NEXT:   Section {{.*}} .rel.plt {
 // CHECK-NEXT:     0x200C R_ARM_JUMP_SLOT __gxx_personality_v0
 
 // CHECK-EXTAB: Contents of section .ARM.extab:
-// 0x0210 + 0x0e20 = 0x1030 = __gxx_personality_v0(PLT)
-// CHECK-EXTAB-NEXT:  0210 200e0000 b0b0b000 00000000
+// 0x0218 + 0x0e18 = 0x1030 = __gxx_personality_v0(PLT)
+// CHECK-EXTAB-NEXT:  0218 180e0000 b0b0b000 00000000