This is an archive of the discontinued LLVM Phabricator instance.

[AArch64] Support reserving x1-7 registers.
ClosedPublic

Authored by trong on Jun 25 2018, 8:06 PM.

Details

Summary

Reserving registers x1-7 is used to support CONFIG_ARM64_LSE_ATOMICS in Linux kernel. This change adds support for reserving registers x1 through x7.

Diff Detail

Event Timeline

trong created this revision.Jun 25 2018, 8:06 PM
nickdesaulniers accepted this revision.Sep 10 2018, 10:13 AM

Thanks for the other half of this feature!

test/Driver/aarch64-fixed-x-register.c
35

Is it worth checking a combination of these flags together work as expected (since I think you added tests that do that to llvm)?

This revision is now accepted and ready to land.Sep 10 2018, 10:13 AM
trong updated this revision to Diff 165132.Sep 12 2018, 12:41 PM

Added test cases for combination of -ffixed flags.

trong marked an inline comment as done.Sep 12 2018, 12:42 PM
nickdesaulniers accepted this revision.Sep 12 2018, 4:02 PM

Great work Tri, thank you!

This revision was automatically updated to reflect the committed changes.
test/Driver/aarch64-fixed-x-register.c