Debug var, expr and loc were only supported for non-fixed stack objects.
This patch adds the following fields to the "fixedStack:" entries, and renames the ones from "stack:" to:
- debug-info-variable
- debug-info-expression
- debug-info-location
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| Differential D46032
[MIR] Add support for debug metadata for fixed stack objects ClosedPublic Authored by thegameg on Apr 24 2018, 3:54 PM.
Details Summary Debug var, expr and loc were only supported for non-fixed stack objects. This patch adds the following fields to the "fixedStack:" entries, and renames the ones from "stack:" to:
Diff Detail
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thegameg marked 2 inline comments as done. Comment Actions
thegameg marked 2 inline comments as done. Comment ActionsAdd comment for int Slot;.
Comment Actions
Alright, fair enough. Thanks Francis, this LGTM. This revision is now accepted and ready to land.Apr 25 2018, 8:27 AM Closed by commit rL330859: [MIR] Add support for debug metadata for fixed stack objects (authored by thegameg). · Explain WhyApr 25 2018, 12:01 PM This revision was automatically updated to reflect the committed changes.
Revision Contents
Diff 143981 llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h
llvm/trunk/include/llvm/CodeGen/MachineFunction.h
llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp
llvm/trunk/lib/CodeGen/MIRPrinter.cpp
llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
llvm/trunk/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
llvm/trunk/test/CodeGen/AArch64/GlobalISel/fp128-legalize-crash-pr35690.mir
llvm/trunk/test/CodeGen/AArch64/GlobalISel/select-gv-cmodel-large.mir
llvm/trunk/test/CodeGen/AArch64/reverse-csr-restore-seq.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-atomics.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-1.mir
llvm/trunk/test/CodeGen/AMDGPU/memory-legalizer-multiple-mem-operands-nontemporal-2.mir
llvm/trunk/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
llvm/trunk/test/CodeGen/AMDGPU/twoaddr-mad.mir
llvm/trunk/test/CodeGen/AMDGPU/undefined-physreg-sgpr-spill.mir
llvm/trunk/test/CodeGen/AMDGPU/vop-shrink-frame-index.mir
llvm/trunk/test/CodeGen/ARM/fp16-litpool2-arm.mir
llvm/trunk/test/CodeGen/ARM/fp16-litpool3-arm.mir
llvm/trunk/test/CodeGen/MIR/AArch64/mirCanonCopyCopyProp.mir
llvm/trunk/test/CodeGen/MIR/AArch64/mirCanonIdempotent.mir
llvm/trunk/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
llvm/trunk/test/CodeGen/MIR/X86/callee-saved-info.mir
llvm/trunk/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
llvm/trunk/test/CodeGen/MIR/X86/fixed-stack-di.mir
llvm/trunk/test/CodeGen/MIR/X86/invalid-metadata-node-type.mir
llvm/trunk/test/CodeGen/MIR/X86/spill-slot-fixed-stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/stack-object-debug-info.mir
llvm/trunk/test/CodeGen/MIR/X86/stack-objects.mir
llvm/trunk/test/CodeGen/MIR/X86/variable-sized-stack-objects.mir
llvm/trunk/test/CodeGen/Mips/micromips-eva.mir
llvm/trunk/test/CodeGen/Mips/micromips-short-delay-slot.mir
llvm/trunk/test/CodeGen/Mips/msa/emergency-spill.mir
llvm/trunk/test/CodeGen/PowerPC/convert-rr-to-ri-instrs.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x32-select-frameIndex.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86-select-frameIndex.mir
llvm/trunk/test/CodeGen/X86/GlobalISel/x86_64-select-frameIndex.mir
llvm/trunk/test/CodeGen/X86/fixed-stack-di-mir.ll
llvm/trunk/test/CodeGen/X86/movtopush.mir
llvm/trunk/test/CodeGen/X86/pr30821.mir
llvm/trunk/test/DebugInfo/MIR/AArch64/implicit-def-dead-scope.mir
llvm/trunk/test/DebugInfo/MIR/Mips/last-inst-bundled.mir
llvm/trunk/test/DebugInfo/MIR/X86/kill-after-spill.mir
llvm/trunk/test/DebugInfo/X86/live-debug-vars-dse.mir
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