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[AArch64][SVE] Asm: Add AND_ZI instructions and aliases
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Authored by sdesmalen on Jan 19 2018, 5:40 AM.

Details

Summary

Adds support for the SVE AND instruction with vector and logical-immediate operands, and their corresponding aliases.

Diff Detail

Repository
rL LLVM

Event Timeline

sdesmalen created this revision.Jan 19 2018, 5:40 AM
fhahn added inline comments.Feb 5 2018, 6:11 AM
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
1666 ↗(On Diff #130594)

Is this exactly the same as above?

lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h
769 ↗(On Diff #130594)

I think the logic here could be made slightly clearer using std::all_of

sdesmalen updated this revision to Diff 132823.Feb 5 2018, 6:57 AM
sdesmalen marked an inline comment as done.
  • Use 'all_of' instead of a loop to check that all elements in an array are the same.
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
1666 ↗(On Diff #130594)

The same (tied) operand is added twice to the instruction, see line 470.

fhahn accepted this revision.Feb 6 2018, 3:30 AM

LGTM

lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
1666 ↗(On Diff #130594)

Ah thanks. That might be worth a comment.

This revision is now accepted and ready to land.Feb 6 2018, 3:30 AM
This revision was automatically updated to reflect the committed changes.