[LiveDebugValues] recognize spilled register that is killed in instruction after the spill

[NikolaPrica]

Summary

Current condition for spill instruction recognition in LiveDebugValues does not recognize case when register is spilled and killed in next instruction.

[aprantl]

Thanks! Couple of comments inline.

lib/CodeGen/LiveDebugValues.cpp

439

please run your patch through clang-format to fix up the indentation

445

perhaps write this as auto NextI = std::next(MI); ?

452

This looks like it is *almost* the same code as on line 434. Would it make sense to factor this into a separate function or lambda?

test/DebugInfo/X86/kill-after-spill.ll

1 ↗

(On Diff #126904)

This test is really long, could it be further reduced?

4 ↗

(On Diff #126904)

For Machine passes, it is usually preferable to write MIR tests.

To convert this into MIR, run

llc -stop-before=livedebugvalues -o -

and then in the test do

RUN: llc -run-pass=livedebugvalues

[NikolaPrica]

I wasn't able to produce simpler test example. I've deleted some of IR instructions from previous test. Deletion of any other instruction from IR would bypass the problem.

Thank you for your comments.

[rnk]

lib/CodeGen/LiveDebugValues.cpp

431–433

Probably simpler as return MO.isKill();.

[aprantl]

lib/CodeGen/LiveDebugValues.cpp

450

Isn't that a no-op?

[aprantl]

Hmm.. I just try to apply your patch to trunk, but the testcase doesn't parse for me. Do I need a specific revision of LLVM?

lib/CodeGen/LiveDebugValues.cpp

442

whether

test/DebugInfo/X86/kill-after-spill.mir

2

this now needs to go into test/DebugInfo/MIR/X86/kill-after-spill.mir

[NikolaPrica]

Please try it now.

[aprantl]

Thanks, I can run the test now. Unfortunately it looks like the test is not yet sufficient (see inline comment).

lib/CodeGen/LiveDebugValues.cpp

450

The test still passes when I comment out line 449-450. Could you add coverage for these two lines, too?

[NikolaPrica]

lib/CodeGen/LiveDebugValues.cpp

450

I'm not sure what are you asking. Do you think I should add test coverage for this particular condition on 449. If you do, only what I could think of is changing MIR test example in order to hit condition on line 449. It would go something like this then:

   
%r12d = MOV32rr %r15d
MOV32mr %rbp, 1, %noreg, -48, %noreg, renamable %r15d :: (store 4 into %stack.0)
%edi = MOV32rr killed %r12d

Then this wouldn't be recognized as spill instruction but it could be mentioned in test that this is changed in testing purpose.

Or you are thinking of dispatching condition on 449? I've tried to describe particular situation from MIR with conditions from lines 449 and 448. But this situation could be described as spill instruction after which we expect that copy operation is done and that spill register is killed in the next instruction. Said like that then we don't need condition from line 449.

[aprantl]

lib/CodeGen/LiveDebugValues.cpp

445

Perhaps add a comment here why we are skipping here?

449

Perhaps add a comment here why we are breaking out of the loop here?

450

I'm asking for 100% test coverage for the patch. If a patch is adding new functionality, that functionality should be tested, so (1) we know that it works as intended and (2) future generations of LLVM developers won't be tempted to remove it "because it has no effect (on the testsuite)".
It's fine to add a second testcase to the patch if that makes it easier. Thanks!

[NikolaPrica]

This comment was removed by NikolaPrica.

[wolfgangp]

lib/CodeGen/LiveDebugValues.cpp

452

If I read the code correctly, it would identify *any* instruction that stores a register to the stack as a spill instruction. The lambda sets "Reg" in line 439 unconditionally and the following code just checks whether "Reg" is used and killed, but doesn't set it back to 0 if it is not, so line 455 would always return true.

Was this the intent? If so, we wouldn't need to look at the next instruction at all.

I wrote the code originally to be very conservative in the identification of a spill, perhaps too conservative.

test/DebugInfo/X86/kill-after-spill.mir

5

Typo: instruction

Also, please end the sentence with a full stop!

[NikolaPrica]

MBB.instr_end() changed to MBB.end()

[aprantl]

I'll defer to Wolfgang here.

[bjope]

I do not quite get it why the case when the register is killed in the subsequent instructions is so interesting.
Is this some kind of heuristic just to cover one specific scenario (then I think the summary, and future commit message should mention that, and also add some code comments describing what is going on here).

I mean, what makes this situation with a kill in the subsequent instruction different from a situation when there is one or more instructions in between, such as

A: spills register x
B: an MI not using or defining x
C: last use of x (kill x)

With you solution the result would differ depending on how instruction B and C are scheduled. That seems a little bit hacky to me, and it would at least be worth mentioning that the solution is some kind of heuristic (or that there is a technical debt left).

lib/CodeGen/LiveDebugValues.cpp

452

Isn't it still weird to use Reg here. The getRegIfKilled call on line 439 can return false without setting Reg (due to the operand not being a use, or not even being a register).

test/DebugInfo/MIR/X86/kill-after-spill.mir

13 ↗

(On Diff #128325)

typo: instruction

[bjope]

lib/CodeGen/LiveDebugValues.cpp

444

In case of bundles this will move to the next instruction inside the bundle (unless it is the last instruction in the bundle)?
That seems weird. One reason is that the result would depend on the order of the bundled instructions.

Is perhaps the intent to look at the next BUNDLE instruction in case of MI being inside a bundle?
If so then I guess something like this would do the trick:

auto NextI = std::next(MachineBasicBlock::const_iterator::getAtBundleBegin(MI.getIterator()));

There could ofcourse be parallel uses of "Reg" in the same bundle, and the KILL marking could perhaps be on one of those instructions. So if MI is bundled, perhaps you need to analyse all the parallel instructions (and the instructions in the next bundle)?

The situation when there is another instruction in the same bundle that defines "Reg" is perhaps also interesting when it comes to additional test cases. But in that case I guess there should be a KILL marking for "Reg" already in the spilling store instruction (or in the BUNDLE head).

Some test cases involving bundles would not hurt.

[wolfgangp]

I agree that this is a solution to a specific case. I would be OK with it going in for now (after addressing the remaining review comments) with a FIXME comment added to provide a more comprehensive solution later, i.e. one that addresses bundles and kills in instructions further down the chain, as Bjorn suggested.

lib/CodeGen/LiveDebugValues.cpp

452

The getRegIfKilled call on line 439 can return false without setting Reg (due to the operand not being a use, or not even being a register).

Yes, Reg can be undefined in that case. Perhaps it should be set to 0 in the lambda when it's not a use or a register.

[wolfgangp]

lib/CodeGen/LiveDebugValues.cpp

436

I would prefer if the name of the lambda would reflect that we are returning a boolean quantity, i.e. whether the operand is a killed register or not. The register itself is returned as a side-effect, so something like 'isKilledReg()' instead of 'getKilledReg()' would sound a bit more consistent to me.

442

I don't believe we need the 'else' now.

450

We don't need to initialize RegNext here, I think.

[bjope]

In D41226#969976, @wolfgangp wrote:

I agree that this is a solution to a specific case. I would be OK with it going in for now (after addressing the remaining review comments) with a FIXME comment added to provide a more comprehensive solution later, i.e. one that addresses bundles and kills in instructions further down the chain, as Bjorn suggested.

Ok, that is fine with me. The FIXME tells me that the current solution is a deliberate choice (without the FIXME the code looks incomplete, and it is hard to tell what kind of scenarios the author was aiming for). Thanks!

[wolfgangp]

lib/CodeGen/LiveDebugValues.cpp

436

I'd still prefer to call the lambda 'isKilledReg()' but I leave it up to you.

[dongAxis1944]

llvm/trunk/lib/CodeGen/LiveDebugValues.cpp

429 ↗

(On Diff #129947)

@wolfgangp hello, I have a question about that why the register of MI must be marked, "killed"?

Considering the following case:

MOV32mr $rsp, 1, $noreg, 8, $noreg, $r9d :: (store 4 into %stack.3)
...
DBG_VALUE $rsp, 0, !"fuck", !DIExpression(DW_OP_plus_uconst, 8), debug-location !960; llvm-project/build_release/bin/test.cpp:0 line no:14 indirect
...
MOVSDmr $rsp, 1, $noreg, 8, $noreg, killed renamable $xmm0 :: (store 8 into %stack.3)

Because the r9d is not marked kill, the LLVM will not know the value of r9d is on %stack.3.

Any ideas?

[jmorse]

llvm/trunk/lib/CodeGen/LiveDebugValues.cpp

429 ↗

(On Diff #129947)

Note Bjorns comment at https://reviews.llvm.org/D41226#969343 asking something similar -- this code is mostly a heuristic to catch a common case, where a variable is spilt then restored over a function call for example. It's not guaranteed to catch everything, and we would end up having to follow multiple locations per variable if we did.

(Shameless plug: my LiveDebugValues rewrite should get this right, see https://lists.llvm.org/pipermail/llvm-dev/2020-June/142368.html . I've paused landing it for a bit, but will continue shortly).

lib/CodeGen/LiveDebugValues.cpp

if (!MI.hasOneMemOperand())
     return false;
 
   // To identify a spill instruction, use the same criteria as in AsmPrinter.
   if (!((TII->isStoreToStackSlotPostFE(MI, FI) ||
          TII->hasStoreToStackSlot(MI, MMO, FI)) &&
         FrameInfo.isSpillSlotObjectIndex(FI)))
     return false;
 
+  auto getRegIfKilled = [&](const MachineOperand MO, unsigned &Reg) {
+    Reg = MO.getReg();
+    return MO.isKill();
+  };
+
   // In a spill instruction generated by the InlineSpiller the spilled register
   // has its kill flag set. Return false if we don't find such a register.
   Reg = 0;
   for (const MachineOperand &MO : MI.operands()) {
-    if (MO.isReg() && MO.isUse() && MO.isKill()) {
-      Reg = MO.getReg();
+    if (MO.isReg() && MO.isUse()) {
+      if (getRegIfKilled(MO, Reg))
         break;
+      else {
+        // Check wether next instruction kills the spilled register.
+        auto NextInstr = std::next(MI.getIterator());
+        if (MI.getParent()->instr_end() == NextInstr)
+          continue;
+        unsigned RegNext = 0;
+        for (const MachineOperand &MONext : NextInstr->operands())
+          if (MONext.isReg() && getRegIfKilled(MONext, RegNext)) {
+            if (RegNext == Reg)
+              break;
+          }
+      }
     }
   }
   return Reg != 0;
 }
 
 /// A spilled register may indicate that we have to end the current range of
 /// a variable and create a new one for the spill location.
 /// We don't want to insert any instructions in transfer(), so we just create

test/DebugInfo/X86/kill-after-spill.mir

+# RUN: llc -run-pass=livedebugvalues -o - %s | FileCheck %s
+
+# This test is used to acknowledge situation when spill register is killed
+# in istruction after the spill occurs
+
+--- |
+  ; ModuleID = '<stdin>'
+  source_filename = "<stdin>"
+  target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
+  
+  %struct.firstStruct = type { i32, i8, %struct.secondStruct* }
+  %struct.secondStruct = type { i32, i8, i8* }
+  %struct.thirdStruct = type { %struct.fourthStruct, i32*, i8* }
+  %struct.fourthStruct = type { i32, i32, i32, i32 }
+  
+  @.str = private unnamed_addr constant [7 x i8] c"Error:\00", align 1
+  @firstStruct = common local_unnamed_addr global %struct.firstStruct zeroinitializer, align 8, !dbg !0
+  
+  ; Function Attrs: nounwind uwtable
+  define i32 @foo(i32 %variable2, i32 %variable1) local_unnamed_addr #0 !dbg !31 {
+  entry:
+    %const1 = bitcast i64 -9223372036854775808 to i64
+    %0 = bitcast i64 %const1 to i64
+    call void @llvm.dbg.value(metadata i32 %variable2, metadata !36, metadata !DIExpression()), !dbg !57
+    call void @llvm.dbg.value(metadata i32 %variable1, metadata !37, metadata !DIExpression()), !dbg !58
+    %call = tail call %struct.firstStruct* @func1(i32 %variable1)
+    %1 = ptrtoint %struct.firstStruct* %call to i64
+    %2 = and i64 %1, %0
+    %tobool = icmp eq i64 %2, 0
+    br i1 %tobool, label %cleanup, label %if.end
+  
+  if.end:                                           ; preds = %entry
+    %call1 = tail call %struct.thirdStruct* @func2(i32 %variable2, i32 %variable1)
+    %3 = ptrtoint %struct.thirdStruct* %call1 to i64
+    %4 = and i64 %3, -123
+    %tobool2 = icmp eq i64 %4, 0
+    br i1 %tobool2, label %if.then3, label %private.exit
+  
+  if.then3:                                         ; preds = %if.end
+    %5 = inttoptr i64 %2 to %struct.firstStruct*
+    %variableLocal11 = bitcast %struct.firstStruct* %5 to i32*
+    %6 = load i32, i32* %variableLocal11, align 8
+    %variableLocal2 = getelementptr inbounds %struct.firstStruct, %struct.firstStruct* %5, i64 0, i32 1
+    %7 = load i8, i8* %variableLocal2, align 4
+    tail call void @func3(i32 %6, i8 zeroext %7, i8 zeroext 5, i8* inttoptr (i64 or (i64 ptrtoint ([7 x i8]* @.str to i64), i64 -92238) to i8*), i32 %variable2)
+    br label %cleanup
+  
+  private.exit:                                     ; preds = %if.end
+    %8 = bitcast i64 %const1 to i64
+    %9 = ptrtoint %struct.thirdStruct* %call1 to i64
+    %10 = or i64 %9, %8
+    %11 = inttoptr i64 %10 to i8*
+    %call5.i = tail call i8* @memset(i8* %11, i32 0, i64 16)
+    %call6 = tail call i32 @func4(%struct.thirdStruct* %call1)
+    %tobool7 = icmp eq i32 %call6, 0
+    br i1 %tobool7, label %cleanup, label %if.then8
+  
+  if.then8:                                         ; preds = %private.exit
+    %12 = inttoptr i64 %2 to %struct.firstStruct*
+    tail call void @func5(%struct.thirdStruct* %call1, i32 0)
+    %rc_db = getelementptr inbounds %struct.firstStruct, %struct.firstStruct* %12, i64 0, i32 2
+    %13 = bitcast %struct.secondStruct** %rc_db to i64*
+    %14 = load i64, i64* %13, align 8
+    %tobool9 = icmp eq i64 %14, 0
+    br i1 %tobool9, label %cleanup, label %land.lhs.true
+  
+  land.lhs.true:                                    ; preds = %if.then8
+    %15 = inttoptr i64 %4 to %struct.thirdStruct*
+    %tot_perf2 = bitcast %struct.thirdStruct* %15 to i32*
+    %16 = load i32, i32* %tot_perf2, align 8
+    %tobool11 = icmp eq i32 %16, 0
+    br i1 %tobool11, label %lor.lhs.false, label %if.then14
+  
+  lor.lhs.false:                                    ; preds = %land.lhs.true
+    %17 = inttoptr i64 %4 to %struct.thirdStruct*
+    %tot_bw = getelementptr inbounds %struct.thirdStruct, %struct.thirdStruct* %17, i64 0, i32 0, i32 1
+    %18 = load i32, i32* %tot_bw, align 4
+    %tobool13 = icmp eq i32 %18, 0
+    br i1 %tobool13, label %cleanup, label %if.then14
+  
+  if.then14:                                        ; preds = %lor.lhs.false, %land.lhs.true
+    %19 = inttoptr i64 %14 to %struct.secondStruct*
+    %mc_origin = getelementptr inbounds %struct.secondStruct, %struct.secondStruct* %19, i64 0, i32 2
+    %20 = bitcast i8** %mc_origin to i64*
+    %21 = load i64, i64* %20, align 8
+    %22 = inttoptr i64 %21 to i8*
+    tail call void @func6(%struct.thirdStruct* %call1, i32 %variable1, i8* %22)
+    br label %cleanup
+  
+  cleanup:                                          ; preds = %if.then14, %lor.lhs.false, %if.then8, %private.exit, %if.then3, %entry
+    %retval.0 = phi i32 [ 0, %if.then3 ], [ 0, %entry ], [ 1, %lor.lhs.false ], [ 1, %if.then8 ], [ 1, %private.exit ], [ 1, %if.then14 ]
+    ret i32 %retval.0
+  }
+  
+  declare %struct.firstStruct* @func1(i32) local_unnamed_addr
+  
+  declare %struct.thirdStruct* @func2(i32, i32) local_unnamed_addr
+  
+  declare void @func3(i32, i8 zeroext, i8 zeroext, i8*, i32) local_unnamed_addr
+  
+  declare i32 @func4(%struct.thirdStruct*) local_unnamed_addr
+  
+  declare void @func5(%struct.thirdStruct*, i32) local_unnamed_addr
+  
+  declare void @func6(%struct.thirdStruct*, i32, i8*) local_unnamed_addr
+  
+  declare i8* @__memset_to_buf(i64, i8*, i32, i64) local_unnamed_addr
+  
+  declare i8* @memset(i8*, i32, i64) local_unnamed_addr
+  
+  ; Function Attrs: nounwind readnone speculatable
+  declare i64 @llvm.objectsize.i64.p0i8(i8*, i1, i1) #1
+  
+  ; Function Attrs: nounwind readnone speculatable
+  declare void @llvm.dbg.value(metadata, metadata, metadata) #1
+  
+  ; Function Attrs: nounwind
+  declare void @llvm.stackprotector(i8*, i8**) #2
+  
+  attributes #0 = { nounwind uwtable "no-frame-pointer-elim-non-leaf" }
+  attributes #1 = { nounwind readnone speculatable }
+  attributes #2 = { nounwind }
+  
+  !llvm.dbg.cu = !{!2}
+  !llvm.module.flags = !{!27, !28, !29}
+  !llvm.ident = !{!30}
+  
+  !0 = !DIGlobalVariableExpression(var: !1, expr: !DIExpression())
+  !1 = distinct !DIGlobalVariable(name: "firstStruct", scope: !2, file: !3, line: 23, type: !11, isLocal: false, isDefinition: true)
+  !2 = distinct !DICompileUnit(language: DW_LANG_C99, file: !3, producer: "clang version 4.0.0", isOptimized: true, runtimeVersion: 0, emissionKind: FullDebug, enums: !4, retainedTypes: !5, globals: !10)
+  !3 = !DIFile(filename: "inlineSpillerTest.c", directory: "/")
+  !4 = !{}
+  !5 = !{!6, !7}
+  !6 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
+  !7 = !DIDerivedType(tag: DW_TAG_typedef, name: "size_t", file: !8, line: 98, baseType: !9)
+  !8 = !DIFile(filename: "/tmp.h", directory: "/tmp")
+  !9 = !DIBasicType(name: "long long unsigned int", size: 64, encoding: DW_ATE_unsigned)
+  !10 = !{!0}
+  !11 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "firstStruct", file: !3, line: 18, size: 128, elements: !12)
+  !12 = !{!13, !16, !19}
+  !13 = !DIDerivedType(tag: DW_TAG_member, name: "elem1", scope: !11, file: !3, line: 20, baseType: !14, size: 32)
+  !14 = !DIDerivedType(tag: DW_TAG_typedef, name: "uint32", file: !3, line: 4, baseType: !15)
+  !15 = !DIBasicType(name: "unsigned int", size: 32, encoding: DW_ATE_unsigned)
+  !16 = !DIDerivedType(tag: DW_TAG_member, name: "elem2", scope: !11, file: !3, line: 21, baseType: !17, size: 8, offset: 32)
+  !17 = !DIDerivedType(tag: DW_TAG_typedef, name: "uint8", file: !3, line: 5, baseType: !18)
+  !18 = !DIBasicType(name: "unsigned char", size: 8, encoding: DW_ATE_unsigned_char)
+  !19 = !DIDerivedType(tag: DW_TAG_member, name: "elem3", scope: !11, file: !3, line: 22, baseType: !20, size: 64, offset: 64)
+  !20 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !21, size: 64)
+  !21 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "secondStruct", file: !3, line: 11, size: 128, elements: !22)
+  !22 = !{!23, !24, !25}
+  !23 = !DIDerivedType(tag: DW_TAG_member, name: "structMember", scope: !21, file: !3, line: 13, baseType: !14, size: 32)
+  !24 = !DIDerivedType(tag: DW_TAG_member, name: "elem4", scope: !21, file: !3, line: 14, baseType: !17, size: 8, offset: 32)
+  !25 = !DIDerivedType(tag: DW_TAG_member, name: "elem5", scope: !21, file: !3, line: 15, baseType: !26, size: 64, offset: 64)
+  !26 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: null, size: 64)
+  !27 = !{i32 2, !"Dwarf Version", i32 4}
+  !28 = !{i32 2, !"Debug Info Version", i32 3}
+  !29 = !{i32 7, !"PIC Level", i32 2}
+  !30 = !{!"clang version 4.0.0 "}
+  !31 = distinct !DISubprogram(name: "foo", scope: !3, file: !3, line: 50, type: !32, isLocal: false, isDefinition: true, scopeLine: 52, flags: DIFlagPrototyped, isOptimized: true, unit: !2, variables: !35)
+  !32 = !DISubroutineType(types: !33)
+  !33 = !{!34, !14, !14}
+  !34 = !DIDerivedType(tag: DW_TAG_typedef, name: "boolean", file: !3, line: 6, baseType: !6)
+  !35 = !{!36, !37, !38, !54, !55}
+  !36 = !DILocalVariable(name: "variable2", arg: 1, scope: !31, file: !3, line: 50, type: !14)
+  !37 = !DILocalVariable(name: "variable1", arg: 2, scope: !31, file: !3, line: 51, type: !14)
+  !38 = !DILocalVariable(name: "localVariable5", scope: !31, file: !3, line: 53, type: !39)
+  !39 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !40, size: 64)
+  !40 = !DIDerivedType(tag: DW_TAG_typedef, name: "thirdStruct_", file: !3, line: 37, baseType: !41)
+  !41 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "thirdStruct", file: !3, line: 32, size: 256, elements: !42)
+  !42 = !{!43, !51, !53}
+  !43 = !DIDerivedType(tag: DW_TAG_member, name: "elem6", scope: !41, file: !3, line: 34, baseType: !44, size: 128)
+  !44 = !DIDerivedType(tag: DW_TAG_typedef, name: "fourthStruct_", file: !3, line: 30, baseType: !45)
+  !45 = distinct !DICompositeType(tag: DW_TAG_structure_type, name: "fourthStruct", file: !3, line: 25, size: 128, elements: !46)
+  !46 = !{!47, !48, !49, !50}
+  !47 = !DIDerivedType(tag: DW_TAG_member, name: "elem7", scope: !45, file: !3, line: 26, baseType: !14, size: 32)
+  !48 = !DIDerivedType(tag: DW_TAG_member, name: "elem8", scope: !45, file: !3, line: 27, baseType: !14, size: 32, offset: 32)
+  !49 = !DIDerivedType(tag: DW_TAG_member, name: "elem9", scope: !45, file: !3, line: 28, baseType: !34, size: 32, offset: 64)
+  !50 = !DIDerivedType(tag: DW_TAG_member, name: "elem10", scope: !45, file: !3, line: 29, baseType: !34, size: 32, offset: 96)
+  !51 = !DIDerivedType(tag: DW_TAG_member, name: "elem11", scope: !41, file: !3, line: 35, baseType: !52, size: 64, offset: 128)
+  !52 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !6, size: 64)
+  !53 = !DIDerivedType(tag: DW_TAG_member, name: "elem12", scope: !41, file: !3, line: 36, baseType: !26, size: 64, offset: 192)
+  !54 = !DILocalVariable(name: "variable5", scope: !31, file: !3, line: 54, type: !34)
+  !55 = !DILocalVariable(name: "variable6", scope: !31, file: !3, line: 55, type: !56)
+  !56 = !DIDerivedType(tag: DW_TAG_pointer_type, baseType: !11, size: 64)
+  !57 = !DILocation(line: 50, column: 34, scope: !31)
+  !58 = !DILocation(line: 51, column: 34, scope: !31)
+
+...
+---
+name:            foo
+alignment:       4
+exposesReturnsTwice: false
+legalized:       false
+regBankSelected: false
+selected:        false
+tracksRegLiveness: true
+registers:       
+liveins:         
+  - { reg: '%edi', virtual-reg: '' }
+  - { reg: '%esi', virtual-reg: '' }
+frameInfo:       
+  isFrameAddressTaken: false
+  isReturnAddressTaken: false
+  hasStackMap:     false
+  hasPatchPoint:   false
+  stackSize:       56
+  offsetAdjustment: -8
+  maxAlignment:    4
+  adjustsStack:    true
+  hasCalls:        true
+  stackProtector:  ''
+  maxCallFrameSize: 0
+  hasOpaqueSPAdjustment: false
+  hasVAStart:      false
+  hasMustTailInVarArgFunc: false
+  savePoint:       ''
+  restorePoint:    ''
+fixedStack:      
+  - { id: 0, type: spill-slot, offset: -56, size: 8, alignment: 8, stack-id: 0, 
+      callee-saved-register: '%rbx', callee-saved-restored: true }
+  - { id: 1, type: spill-slot, offset: -48, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '%r12', callee-saved-restored: true }
+  - { id: 2, type: spill-slot, offset: -40, size: 8, alignment: 8, stack-id: 0, 
+      callee-saved-register: '%r13', callee-saved-restored: true }
+  - { id: 3, type: spill-slot, offset: -32, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '%r14', callee-saved-restored: true }
+  - { id: 4, type: spill-slot, offset: -24, size: 8, alignment: 8, stack-id: 0, 
+      callee-saved-register: '%r15', callee-saved-restored: true }
+  - { id: 5, type: spill-slot, offset: -16, size: 8, alignment: 16, stack-id: 0, 
+      callee-saved-register: '', callee-saved-restored: true }
+stack:           
+  - { id: 0, name: '', type: spill-slot, offset: -64, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      di-variable: '', di-expression: '', di-location: '' }
+  - { id: 1, name: '', type: spill-slot, offset: -60, size: 4, alignment: 4, 
+      stack-id: 0, callee-saved-register: '', callee-saved-restored: true, 
+      di-variable: '', di-expression: '', di-location: '' }
+constants:       
+body:             |
+  bb.0.entry:
+    successors: %bb.9(0x30000000), %bb.1(0x50000000)
+    liveins: %edi, %esi, %r15, %r14, %r13, %r12, %rbx
+  
+    frame-setup PUSH64r killed %rbp, implicit-def %rsp, implicit %rsp
+    CFI_INSTRUCTION def_cfa_offset 16
+    CFI_INSTRUCTION offset %rbp, -16
+    %rbp = frame-setup MOV64rr %rsp
+    CFI_INSTRUCTION def_cfa_register %rbp
+    frame-setup PUSH64r killed %r15, implicit-def %rsp, implicit %rsp
+    frame-setup PUSH64r killed %r14, implicit-def %rsp, implicit %rsp
+    frame-setup PUSH64r killed %r13, implicit-def %rsp, implicit %rsp
+    frame-setup PUSH64r killed %r12, implicit-def %rsp, implicit %rsp
+    frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
+    frame-setup PUSH64r undef %rax, implicit-def %rsp, implicit %rsp
+    CFI_INSTRUCTION offset %rbx, -56
+    CFI_INSTRUCTION offset %r12, -48
+    CFI_INSTRUCTION offset %r13, -40
+    CFI_INSTRUCTION offset %r14, -32
+    CFI_INSTRUCTION offset %r15, -24
+    DBG_VALUE debug-use %edi, debug-use %noreg, !36, !DIExpression(), debug-location !57
+    DBG_VALUE debug-use %esi, debug-use %noreg, !37, !DIExpression(), debug-location !58
+    %ebx = MOV32rr %esi
+    DBG_VALUE %ebx, debug-use %noreg, !37, !DIExpression(), debug-location !58
+    %r15d = MOV32rr %edi
+    DBG_VALUE %r15d, debug-use %noreg, !36, !DIExpression(), debug-location !57
+    renamable %r14 = MOV64ri -9223372036854775808
+    %edi = MOV32rr %ebx
+    CALL64pcrel32 @func1, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit-def %rsp, implicit-def %ssp, implicit-def %rax
+    %r13 = MOV64rr %rax
+    renamable %ecx = XOR32rr undef %ecx, undef %ecx, implicit-def dead %eflags
+    renamable %r13 = AND64rr killed renamable %r13, renamable %r14, implicit-def %eflags
+    JE_1 %bb.9, implicit %eflags
+  
+  bb.1.if.end:
+    successors: %bb.2(0x30000000), %bb.3(0x50000000)
+    liveins: %ebx, %r13, %r14, %r15d
+  
+    ; CHECK: DBG_VALUE debug-use %rbp, 0, !37, !DIExpression(DW_OP_constu, 44, DW_OP_minus), debug-location !58
+    ; CHECK: DBG_VALUE debug-use %rbp, 0, !36, !DIExpression(DW_OP_constu, 48, DW_OP_minus), debug-location !57
+    MOV32mr %rbp, 1, %noreg, -48, %noreg, renamable %r15d :: (store 4 into %stack.0)
+    %edi = MOV32rr killed %r15d
+    MOV32mr %rbp, 1, %noreg, -44, %noreg, renamable %ebx :: (store 4 into %stack.1)
+    %esi = MOV32rr killed %ebx
+    CALL64pcrel32 @func2, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit %esi, implicit-def %rsp, implicit-def %ssp, implicit-def %rax
+    %r12 = MOV64rr %rax
+    %r15 = MOV64rr %r12
+    renamable %r15 = AND64ri8 killed renamable %r15, -123, implicit-def %eflags
+    JE_1 %bb.2, implicit %eflags
+  
+  bb.3.private.exit:
+    successors: %bb.9(0x30000000), %bb.4(0x50000000)
+    liveins: %r12, %r13, %r14, %r15
+  
+    renamable %r14 = OR64rr killed renamable %r14, renamable %r12, implicit-def dead %eflags
+    %esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
+    dead %edx = MOV32ri 16, implicit-def %rdx
+    %rdi = MOV64rr killed %r14
+    CALL64pcrel32 @memset, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit %rdx, implicit-def %rsp, implicit-def %ssp, implicit-def dead %rax
+    %rdi = MOV64rr %r12
+    CALL64pcrel32 @func4, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit-def %rsp, implicit-def %ssp, implicit-def %eax
+    renamable %ecx = MOV32ri 1
+    TEST32rr killed renamable %eax, renamable %eax, implicit-def %eflags
+    JE_1 %bb.9, implicit %eflags
+  
+  bb.4.if.then8:
+    successors: %bb.8(0x30000000), %bb.5(0x50000000)
+    liveins: %r12, %r13, %r15
+  
+    %esi = XOR32rr undef %esi, undef %esi, implicit-def dead %eflags
+    %rdi = MOV64rr %r12
+    CALL64pcrel32 @func5, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit-def %rsp, implicit-def %ssp
+    renamable %rax = MOV64rm killed renamable %r13, 1, %noreg, 8, %noreg :: (load 8 from %ir.13)
+    TEST64rr renamable %rax, renamable %rax, implicit-def %eflags
+    JE_1 %bb.8, implicit %eflags
+  
+  bb.5.land.lhs.true:
+    successors: %bb.6(0x30000000), %bb.7(0x50000000)
+    liveins: %rax, %r12, %r15
+  
+    CMP32mi8 renamable %r15, 1, %noreg, 0, %noreg, 0, implicit-def %eflags :: (load 4 from %ir.tot_perf2, align 8)
+    JNE_1 %bb.7, implicit %eflags
+  
+  bb.6.lor.lhs.false:
+    successors: %bb.8(0x30000000), %bb.7(0x50000000)
+    liveins: %rax, %r12, %r15
+  
+    CMP32mi8 killed renamable %r15, 1, %noreg, 4, %noreg, 0, implicit-def %eflags :: (load 4 from %ir.tot_bw)
+    JE_1 %bb.8, implicit %eflags
+  
+  bb.7.if.then14:
+    successors: %bb.8(0x80000000)
+    liveins: %rax, %r12
+  
+    renamable %rdx = MOV64rm killed renamable %rax, 1, %noreg, 8, %noreg :: (load 8 from %ir.20)
+    %rdi = MOV64rr killed %r12
+    %esi = MOV32rm %rbp, 1, %noreg, -44, %noreg :: (load 4 from %stack.1)
+    CALL64pcrel32 @func6, csr_64, implicit %rsp, implicit %ssp, implicit %rdi, implicit %esi, implicit %rdx, implicit-def %rsp, implicit-def %ssp
+  
+  bb.8.cleanup:
+    successors: %bb.9(0x80000000)
+  
+    renamable %ecx = MOV32ri 1
+    JMP_1 %bb.9
+  
+  bb.2.if.then3:
+    successors: %bb.9(0x80000000)
+    liveins: %r13
+  
+    renamable %edi = MOV32rm renamable %r13, 1, %noreg, 0, %noreg :: (load 4 from %ir.variableLocal11, align 8)
+    renamable %esi = MOVZX32rm8 killed renamable %r13, 1, %noreg, 4, %noreg :: (load 1 from %ir.variableLocal2, align 4)
+    renamable %ecx = MOV32ri @.str, implicit-def %rcx
+    renamable %rcx = OR64ri32 killed renamable %rcx, -92238, implicit-def dead %eflags
+    %edx = MOV32ri 5
+    %r8d = MOV32rm %rbp, 1, %noreg, -48, %noreg :: (load 4 from %stack.0)
+    CALL64pcrel32 @func3, csr_64, implicit %rsp, implicit %ssp, implicit %edi, implicit %esi, implicit %edx, implicit %rcx, implicit %r8d, implicit-def %rsp, implicit-def %ssp
+    renamable %ecx = XOR32rr undef %ecx, undef %ecx, implicit-def dead %eflags
+  
+  bb.9.cleanup:
+    liveins: %ecx
+  
+    %eax = MOV32rr killed %ecx
+    %rsp = ADD64ri8 %rsp, 8, implicit-def dead %eflags
+    %rbx = POP64r implicit-def %rsp, implicit %rsp
+    %r12 = POP64r implicit-def %rsp, implicit %rsp
+    %r13 = POP64r implicit-def %rsp, implicit %rsp
+    %r14 = POP64r implicit-def %rsp, implicit %rsp
+    %r15 = POP64r implicit-def %rsp, implicit %rsp
+    %rbp = POP64r implicit-def %rsp, implicit %rsp
+    RETQ %eax
+
+...