[Builtins] ARM: Fix msr assembly instruction use for Thumb2.

[manojgupta]

Summary

MSR instruction in Thumb2 does not support immediate operand.
Fix this by moving the condition for V7-M to Thumb2 since V7-M support
Thumb2 only. With this change, aeabi_cfcmp.s and aeabi_cdcmp.S files can
be assembled in Thumb2 mode. (This is split out from the review D38227).

[weimingz]

LGTM. (Let Saleem to sign off)

lib/builtins/arm/aeabi_cdcmp.S

1:
         lsls r0, r0, #31
         pop {r0-r3, pc}
 #else
         pop {r0-r3, lr}
 
         // NaN has been ruled out, so __aeabi_cdcmple can't trap
         bne __aeabi_cdcmple
 
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+#if defined(USE_THUMB_2)
         mov ip, #APSR_C
         msr APSR_nzcvq, ip
 #else
         msr CPSR_f, #APSR_C
 #endif
         JMP(lr)
 #endif
 END_COMPILERRT_FUNCTION(__aeabi_cdcmpeq)

lib/builtins/arm/aeabi_cfcmp.S

1:
         lsls r0, r0, #31
         pop {r0-r3, pc}
 #else
         pop {r0-r3, lr}
 
         // NaN has been ruled out, so __aeabi_cfcmple can't trap
         bne __aeabi_cfcmple
 
-#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__)
+#if defined(USE_THUMB_2)
         mov ip, #APSR_C
         msr APSR_nzcvq, ip
 #else
         msr CPSR_f, #APSR_C
 #endif
         JMP(lr)
 #endif
 END_COMPILERRT_FUNCTION(__aeabi_cfcmpeq)