Fixes PR34660. See the test for details on the reloc.
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273 R_AARCH64_LD_PREL_LO19
S + A - P Set a load-literal immediate value to bits [20:2] of X; check that -2^20 ≤ X < 2^20
See, for reference, also, already implemented CONDBR19 (which does the same, but for branch instructions (this is for loads).
I believe Peter Smith is the right person to review this, as he knows this part of code the most.
Just to make sure, is does the test pass when you use ld.bfd or ld.gold instead of ld.lld?
Only thing I can spot is that I think that we are missing an alignment check on the result, otherwise looks good to me as well. The address of the value to be loaded must be at least 4-byte aligned. BFD has implemented this check, for example if I change the test case a little:
ldr x8, patatino .data .zero 5 patatino:
BFD will give me t.o:(.text+0x0): relocation truncated to fit: R_AARCH64_LD_PREL_LO19 against `.data', which is BFD's rather obtuse way of reporting alignment faults. The target of the conditional branch (R_AARCH64_CONDBR19) must be an instruction, which must be 4 byte aligned for AArch64, so I think it is safe to add a check for that as well. It is harder to write a realistic test case for that one though.
You can find the details of the instruction ldr (literal) in the architecture reference manual https://developer.arm.com/products/architecture/a-profile/docs/ddi0487/latest/arm-architecture-reference-manual-armv8-for-armv8-a-architecture-profile