ELF: Reserve space for copy relocations of read-only symbols in relro.

[pcc]

Summary

When reserving copy relocation space for a shared symbol, scan the DSO's
program headers to see if the symbol is in a read-only segment. If so,
reserve space for that symbol in a new synthetic section named .bss.rel.ro
which will be covered by the relro program header.

This fixes the security issue disclosed on the binutils mailing list at:
https://sourceware.org/ml/libc-alpha/2016-12/msg00914.html

[ruiu]

Looks like ld.bfd and ld.gold have something similar already. Are they using the same section name, .bss.rel.ro?

lld/ELF/Relocations.cpp

439–446

Can you factor the new code as a function taking a SharedSymbol and returning a boolean value?

[pcc]

In D28272#636529, @ruiu wrote:

Looks like ld.bfd and ld.gold have something similar already. Are they using the same section name, .bss.rel.ro?

It looks like they are both using the name .data.rel.ro.

Relatedly, I discovered a bug in this patch. We can't use SHT_NOBITS for the new section because we need to lay out all NOBITS sections contiguously at the end of the LOAD. RELRO also needs to be contiguous (there can only be one RELRO header), so we can't have another RELRO covering part of the bss.

In principle, we could teach the linker to emit two r/w LOAD headers, one for RELRO and the other for non-RELRO, each with its own bss, but it's not clear that that would be worth it. So we might as well use SHT_PROGBITS and rename the section to .data.rel.ro to match the type. I'll upload a new patch that does that.

lld/ELF/Relocations.cpp

439–446

Will do

[pcc]

• Change section ordering as follows: non-RELRO non-NOBITS, TLS non-NOBITS, TLS NOBITS, RELRO non-NOBITS, RELRO NOBITS, non-RELRO NOBITS

[ruiu]

LGTM, but you may want to wait for a while to give Rafael to take another look.

lld/ELF/Symbols.h

297–300

Do you have to inline this function? I think you added #include "OutputSections.h" for this function, but I don't want to add a new #include to this file to avoid cyclic inclusion.

[pcc]

I committed the section ordering changes separately in r291523.

lld/ELF/OutputSections.h

 // until Writer is initialized.
 template <class ELFT> struct Out {
   typedef typename ELFT::uint uintX_t;
   typedef typename ELFT::Phdr Elf_Phdr;
 
   static uint8_t First;
   static EhOutputSection<ELFT> *EhFrame;
   static OutputSection<ELFT> *Bss;
+  static OutputSection<ELFT> *BssRelRo;
   static OutputSectionBase *Opd;
   static uint8_t *OpdBuf;
   static PhdrEntry *TlsPhdr;
   static OutputSectionBase *DebugInfo;
   static OutputSectionBase *ElfHeader;
   static OutputSectionBase *ProgramHeaders;
   static OutputSectionBase *PreinitArray;
   static OutputSectionBase *InitArray;
template <class ELFT> uint64_t getHeaderSize() {
   if (Config->OFormatBinary)
     return 0;
   return Out<ELFT>::ElfHeader->Size + Out<ELFT>::ProgramHeaders->Size;
 }
 
 template <class ELFT> uint8_t Out<ELFT>::First;
 template <class ELFT> EhOutputSection<ELFT> *Out<ELFT>::EhFrame;
 template <class ELFT> OutputSection<ELFT> *Out<ELFT>::Bss;
+template <class ELFT> OutputSection<ELFT> *Out<ELFT>::BssRelRo;
 template <class ELFT> OutputSectionBase *Out<ELFT>::Opd;
 template <class ELFT> uint8_t *Out<ELFT>::OpdBuf;
 template <class ELFT> PhdrEntry *Out<ELFT>::TlsPhdr;
 template <class ELFT> OutputSectionBase *Out<ELFT>::DebugInfo;
 template <class ELFT> OutputSectionBase *Out<ELFT>::ElfHeader;
 template <class ELFT> OutputSectionBase *Out<ELFT>::ProgramHeaders;
 template <class ELFT> OutputSectionBase *Out<ELFT>::PreinitArray;
 template <class ELFT> OutputSectionBase *Out<ELFT>::InitArray;
 template <class ELFT> OutputSectionBase *Out<ELFT>::FiniArray;
 } // namespace elf
 } // namespace lld
 
 
 #endif

lld/ELF/Relocations.cpp

template <class ELFT> static uint32_t getAlignment(SharedSymbol<ELFT> *SS) {
 
   uintX_t SecAlign = SS->file()->getSection(SS->Sym)->sh_addralign;
   uintX_t SymValue = SS->Sym.st_value;
   int TrailingZeros =
       std::min(countTrailingZeros(SecAlign), countTrailingZeros(SymValue));
   return 1 << TrailingZeros;
 }
 
-// Reserve space in .bss for copy relocation.
+template <class ELFT> static bool isReadOnly(SharedSymbol<ELFT> *SS) {
+  typedef typename ELFT::uint uintX_t;
+  typedef typename ELFT::Phdr Elf_Phdr;
+
+  // Determine if the symbol is read-only by scanning the DSO's program headers.
+  uintX_t Value = SS->Sym.st_value;
+  for (const Elf_Phdr &Phdr : check(SS->file()->getObj().program_headers()))
+    if ((Phdr.p_type == ELF::PT_LOAD || Phdr.p_type == ELF::PT_GNU_RELRO) &&
+        !(Phdr.p_flags & ELF::PF_W) && Value >= Phdr.p_vaddr &&
+        Value < Phdr.p_vaddr + Phdr.p_memsz)
+      return true;
+  return false;
+}
+
+// Reserve space in .bss or .bss.rel.ro for copy relocation.
 template <class ELFT> static void addCopyRelSymbol(SharedSymbol<ELFT> *SS) {
   typedef typename ELFT::uint uintX_t;
   typedef typename ELFT::Sym Elf_Sym;
 
   // Copy relocation against zero-sized symbol doesn't make sense.
   uintX_t SymSize = SS->template getSize<ELFT>();
   if (SymSize == 0)
     fatal("cannot create a copy relocation for symbol " + toString(*SS));
 
+  // See if this symbol is in a read-only segment. If so, preserve the symbol's
+  // memory protection by reserving space in the .bss.rel.ro section.
+  bool IsReadOnly = isReadOnly(SS);
+  OutputSection<ELFT> *CopySec =
+      IsReadOnly ? Out<ELFT>::BssRelRo : Out<ELFT>::Bss;
+
   uintX_t Alignment = getAlignment(SS);
-  uintX_t Off = alignTo(Out<ELFT>::Bss->Size, Alignment);
-  Out<ELFT>::Bss->Size = Off + SymSize;
-  Out<ELFT>::Bss->updateAlignment(Alignment);
+  uintX_t Off = alignTo(CopySec->Size, Alignment);
+  CopySec->Size = Off + SymSize;
+  CopySec->updateAlignment(Alignment);
   uintX_t Shndx = SS->Sym.st_shndx;
   uintX_t Value = SS->Sym.st_value;
   // Look through the DSO's dynamic symbol table for aliases and create a
   // dynamic symbol for each one. This causes the copy relocation to correctly
   // interpose any aliases.
   for (const Elf_Sym &S : SS->file()->getGlobalSymbols()) {
     if (S.st_shndx != Shndx || S.st_value != Value)
       continue;
     auto *Alias = dyn_cast_or_null<SharedSymbol<ELFT>>(
         Symtab<ELFT>::X->find(check(S.getName(SS->file()->getStringTable()))));
     if (!Alias)
       continue;
-    Alias->OffsetInBss = Off;
+    Alias->CopyIsInBssRelRo = IsReadOnly;
+    Alias->CopyOffset = Off;
     Alias->NeedsCopyOrPltAddr = true;
     Alias->symbol()->IsUsedInRegularObj = true;
   }
-  In<ELFT>::RelaDyn->addReloc(
-      {Target->CopyRel, Out<ELFT>::Bss, SS->OffsetInBss, false, SS, 0});
+  In<ELFT>::RelaDyn->addReloc({Target->CopyRel, CopySec, Off, false, SS, 0});
 }
 
 template <class ELFT>
 static RelExpr adjustExpr(const elf::ObjectFile<ELFT> &File, SymbolBody &Body,
                           bool IsWrite, RelExpr Expr, uint32_t Type,
                           const uint8_t *Data, InputSectionBase<ELFT> &S,
                           typename ELFT::uint RelOff) {
   bool Preemptible = isPreemptible(Body, Type);

lld/ELF/Symbols.h

 // This file defines various types of SymbolBodies.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLD_ELF_SYMBOLS_H
 #define LLD_ELF_SYMBOLS_H
 
 #include "InputSection.h"
+#include "OutputSections.h"
 #include "Strings.h"
 
 #include "lld/Core/LLVM.h"
 #include "llvm/Object/Archive.h"
 #include "llvm/Object/ELF.h"
 
 namespace lld {
 namespace elf {
 
 class ArchiveFile;
 class BitcodeFile;
 class InputFile;
 class LazyObjectFile;
 template <class ELFT> class ObjectFile;
-template <class ELFT> class OutputSection;
-class OutputSectionBase;
 template <class ELFT> class SharedFile;
 
 struct Symbol;
 
 // The base class for real symbol classes.
 class SymbolBody {
 public:
   enum Kind {
public:
   unsigned Is32BitMipsGot : 1;
 
   // True if this symbol is in the Iplt sub-section of the Plt.
   unsigned IsInIplt : 1;
 
   // True if this symbol is in the Igot sub-section of the .got.plt or .got.
   unsigned IsInIgot : 1;
 
+  // True if this is a shared symbol in a read-only segment which requires a
+  // copy relocation. This causes space for the symbol to be allocated in the
+  // .bss.rel.ro section.
+  unsigned CopyIsInBssRelRo : 1;
+
   // The following fields have the same meaning as the ELF symbol attributes.
   uint8_t Type;    // symbol type
   uint8_t StOther; // st_other field value
 
   // The Type field may also have this value. It means that we have not yet seen
   // a non-Lazy symbol with this name, so we don't know what its type is. The
   // Type field is normally set to this value for Lazy symbols unless we saw a
   // weak undefined symbol first, in which case we need to remember the original
public:
 
   SharedFile<ELFT> *file() { return (SharedFile<ELFT> *)this->File; }
 
   const Elf_Sym &Sym;
 
   // This field is a pointer to the symbol's version definition.
   const Elf_Verdef *Verdef;
 
-  // OffsetInBss is significant only when needsCopy() is true.
-  uintX_t OffsetInBss = 0;
+  // CopyOffset is significant only when needsCopy() is true.
+  uintX_t CopyOffset = 0;
 
   // If non-null the symbol has a Thunk that may be used as an alternative
   // destination for callers of this Symbol.
   Thunk<ELFT> *ThunkData = nullptr;
   bool needsCopy() const { return this->NeedsCopyOrPltAddr && !this->isFunc(); }
+
+  OutputSection<ELFT> *getBssSectionForCopy() const {
+    assert(needsCopy());
+    return CopyIsInBssRelRo ? Out<ELFT>::BssRelRo : Out<ELFT>::Bss;
+  }
 };
 
 // This class represents a symbol defined in an archive file. It is
 // created from an archive file header, and it knows how to load an
 // object file from an archive to replace itself with a defined
 // symbol. If the resolver finds both Undefined and Lazy for
 // the same name, it will ask the Lazy to load a file.
 class Lazy : public SymbolBody {

lld/ELF/Symbols.cpp

case SymbolBody::DefinedCommonKind:
     return In<ELFT>::Common->OutSec->Addr + In<ELFT>::Common->OutSecOff +
            cast<DefinedCommon>(Body).Offset;
   case SymbolBody::SharedKind: {
     auto &SS = cast<SharedSymbol<ELFT>>(Body);
     if (!SS.NeedsCopyOrPltAddr)
       return 0;
     if (SS.isFunc())
       return Body.getPltVA<ELFT>();
-    return Out<ELFT>::Bss->Addr + SS.OffsetInBss;
+    return SS.getBssSectionForCopy()->Addr + SS.CopyOffset;
   }
   case SymbolBody::UndefinedKind:
     return 0;
   case SymbolBody::LazyArchiveKind:
   case SymbolBody::LazyObjectKind:
     assert(Body.symbol()->IsUsedInRegularObj && "lazy symbol reached writer");
     return 0;
   }
   llvm_unreachable("invalid symbol kind");
 }
 
 SymbolBody::SymbolBody(Kind K, StringRefZ Name, bool IsLocal, uint8_t StOther,
                        uint8_t Type)
     : SymbolKind(K), NeedsCopyOrPltAddr(false), IsLocal(IsLocal),
       IsInGlobalMipsGot(false), Is32BitMipsGot(false), IsInIplt(false),
-      IsInIgot(false), Type(Type), StOther(StOther), Name(Name) {}
+      IsInIgot(false), CopyIsInBssRelRo(false), Type(Type), StOther(StOther),
+      Name(Name) {}
 
 // Returns true if a symbol can be replaced at load-time by a symbol
 // with the same name defined in other ELF executable or DSO.
 bool SymbolBody::isPreemptible() const {
   if (isLocal())
     return false;
 
   // Shared symbols resolve to the definition in the DSO. The exceptions are

lld/ELF/SyntheticSections.cpp

SymbolTableSection<ELFT>::getOutputSection(SymbolBody *Sym) {
   case SymbolBody::DefinedRegularKind: {
     auto &D = cast<DefinedRegular<ELFT>>(*Sym);
     if (D.Section)
       return D.Section->OutSec;
     break;
   }
   case SymbolBody::DefinedCommonKind:
     return In<ELFT>::Common->OutSec;
-  case SymbolBody::SharedKind:
-    if (cast<SharedSymbol<ELFT>>(Sym)->needsCopy())
-      return Out<ELFT>::Bss;
+  case SymbolBody::SharedKind: {
+    auto &SS = cast<SharedSymbol<ELFT>>(*Sym);
+    if (SS.needsCopy())
+      return SS.getBssSectionForCopy();
     break;
+  }
   case SymbolBody::UndefinedKind:
   case SymbolBody::LazyArchiveKind:
   case SymbolBody::LazyObjectKind:
     break;
   }
   return nullptr;
 }
 

lld/ELF/Writer.cpp

 template <class ELFT> void Writer<ELFT>::createSyntheticSections() {
   // Initialize all pointers with NULL. This is needed because
   // you can call lld::elf::main more than once as a library.
   memset(&Out<ELFT>::First, 0, sizeof(Out<ELFT>));
 
   // Create singleton output sections.
   Out<ELFT>::Bss =
       make<OutputSection<ELFT>>(".bss", SHT_NOBITS, SHF_ALLOC | SHF_WRITE);
+  Out<ELFT>::BssRelRo = make<OutputSection<ELFT>>(".bss.rel.ro", SHT_NOBITS,
+                                                  SHF_ALLOC | SHF_WRITE);
   In<ELFT>::DynStrTab = make<StringTableSection<ELFT>>(".dynstr", true);
   In<ELFT>::Dynamic = make<DynamicSection<ELFT>>();
   Out<ELFT>::EhFrame = make<EhOutputSection<ELFT>>();
   In<ELFT>::RelaDyn = make<RelocationSection<ELFT>>(
       Config->Rela ? ".rela.dyn" : ".rel.dyn", Config->ZCombreloc);
   In<ELFT>::ShStrTab = make<StringTableSection<ELFT>>(".shstrtab", false);
 
   Out<ELFT>::ElfHeader = make<OutputSectionBase>("", 0, SHF_ALLOC);
template <class ELFT> bool elf::isRelroSection(const OutputSectionBase *Sec) {
   if (Sec == In<ELFT>::GotPlt->OutSec)
     return Config->ZNow;
   if (Sec == In<ELFT>::Dynamic->OutSec)
     return true;
   if (In<ELFT>::Got && Sec == In<ELFT>::Got->OutSec)
     return true;
   if (In<ELFT>::MipsGot && Sec == In<ELFT>::MipsGot->OutSec)
     return true;
+  if (Sec == Out<ELFT>::BssRelRo)
+    return true;
   StringRef S = Sec->getName();
   return S == ".data.rel.ro" || S == ".ctors" || S == ".dtors" || S == ".jcr" ||
          S == ".eh_frame" || S == ".openbsd.randomdata";
 }
 
 template <class ELFT>
 static bool compareSectionsNonScript(const OutputSectionBase *A,
                                      const OutputSectionBase *B) {
if (!Config->SingleRoRx) {
     bool AIsExec = A->Flags & SHF_EXECINSTR;
     bool BIsExec = B->Flags & SHF_EXECINSTR;
     if (AIsExec != BIsExec)
       return BIsExec;
   }
 
   // If we got here we know that both A and B are in the same PT_LOAD.
 
-  // The TLS initialization block needs to be a single contiguous block in a R/W
-  // PT_LOAD, so stick TLS sections directly before R/W sections. The TLS NOBITS
-  // sections are placed here as they don't take up virtual address space in the
-  // PT_LOAD.
   bool AIsTls = A->Flags & SHF_TLS;
   bool BIsTls = B->Flags & SHF_TLS;
-  if (AIsTls != BIsTls)
-    return AIsTls;
-
-  // The next requirement we have is to put nobits sections last. The
-  // reason is that the only thing the dynamic linker will see about
-  // them is a p_memsz that is larger than p_filesz. Seeing that it
-  // zeros the end of the PT_LOAD, so that has to correspond to the
-  // nobits sections.
   bool AIsNoBits = A->Type == SHT_NOBITS;
   bool BIsNoBits = B->Type == SHT_NOBITS;
-  if (AIsNoBits != BIsNoBits)
-    return BIsNoBits;
 
-  // We place RelRo section before plain r/w ones.
+  // The first requirement we have is to put (non-TLS) nobits sections last. The
+  // reason is that the only thing the dynamic linker will see about them is a
+  // p_memsz that is larger than p_filesz. Seeing that it zeros the end of the
+  // PT_LOAD, so that has to correspond to the nobits sections.
+  bool AIsNonTlsNoBits = AIsNoBits && !AIsTls;
+  bool BIsNonTlsNoBits = BIsNoBits && !BIsTls;
+  if (AIsNonTlsNoBits != BIsNonTlsNoBits)
+    return BIsNonTlsNoBits;
+
+  // We place nobits RelRo sections before plain r/w ones, and non-nobits RelRo
+  // sections after r/w ones, so that the RelRo sections are contiguous.
   bool AIsRelRo = isRelroSection<ELFT>(A);
   bool BIsRelRo = isRelroSection<ELFT>(B);
   if (AIsRelRo != BIsRelRo)
-    return AIsRelRo;
+    return AIsNonTlsNoBits ? AIsRelRo : BIsRelRo;
+
+  // The TLS initialization block needs to be a single contiguous block in a R/W
+  // PT_LOAD, so stick TLS sections directly before the other RelRo R/W
+  // sections. The TLS NOBITS sections are placed here as they don't take up
+  // virtual address space in the PT_LOAD.
+  if (AIsTls != BIsTls)
+    return AIsTls;
+
+  // Within the TLS initialization block, the non-nobits sections need to appear
+  // first.
+  if (AIsNoBits != BIsNoBits)
+    return BIsNoBits;
 
   // Some architectures have additional ordering restrictions for sections
   // within the same PT_LOAD.
   if (Config->EMachine == EM_PPC64)
     return getPPC64SectionRank(A->getName()) <
            getPPC64SectionRank(B->getName());
 
   return false;
finalizeSynthetic<ELFT>(
        In<ELFT>::RelaPlt,   In<ELFT>::Plt,        In<ELFT>::Iplt,
        In<ELFT>::Plt,       In<ELFT>::EhFrameHdr, In<ELFT>::VerSym,
        In<ELFT>::VerNeed,   In<ELFT>::Dynamic});
 }
 
 template <class ELFT> void Writer<ELFT>::addPredefinedSections() {
   if (Out<ELFT>::Bss->Size > 0)
     OutputSections.push_back(Out<ELFT>::Bss);
+  if (Out<ELFT>::BssRelRo->Size > 0)
+    OutputSections.push_back(Out<ELFT>::BssRelRo);
 
   auto OS = dyn_cast_or_null<OutputSection<ELFT>>(findSection(".ARM.exidx"));
   if (OS && !OS->Sections.empty() && !Config->Relocatable)
     OS->addSection(make<ARMExidxSentinelSection<ELFT>>());
 
   addInputSec(In<ELFT>::SymTab);
   addInputSec(In<ELFT>::ShStrTab);
   addInputSec(In<ELFT>::StrTab);
if (I == OutputSections.end())
     return;
 
   // PT_ARM_EXIDX is the ARM EHABI equivalent of PT_GNU_EH_FRAME
   PhdrEntry ARMExidx(PT_ARM_EXIDX, PF_R);
   ARMExidx.add(*I);
   Phdrs.push_back(ARMExidx);
 }
 
-// The first section of each PT_LOAD and the first section after PT_GNU_RELRO
-// have to be page aligned so that the dynamic linker can set the permissions.
+// The first section of each PT_LOAD, the first section in PT_GNU_RELRO and the
+// first section after PT_GNU_RELRO have to be page aligned so that the dynamic
+// linker can set the permissions.
 template <class ELFT> void Writer<ELFT>::fixSectionAlignments() {
   for (const PhdrEntry &P : Phdrs)
     if (P.p_type == PT_LOAD && P.First)
       P.First->PageAlign = true;
 
   for (const PhdrEntry &P : Phdrs) {
     if (P.p_type != PT_GNU_RELRO)
       continue;
+    if (P.First)
+      P.First->PageAlign = true;
     // Find the first section after PT_GNU_RELRO. If it is in a PT_LOAD we
     // have to align it to a page.
     auto End = OutputSections.end();
     auto I = std::find(OutputSections.begin(), End, P.Last);
     if (I == End || (I + 1) == End)
       continue;
     OutputSectionBase *Sec = *(I + 1);
     if (needsPtLoad<ELFT>(Sec))

lld/test/ELF/Inputs/copy-rel-pie.s

+.data
 .global foo
 .type foo, @object
 .size foo, 4
 foo:
 .long 0
 
+.text
 .global bar
 .type bar, @function
 bar:

lld/test/ELF/Inputs/relocation-copy-relro.s

+.rodata
+.globl a
+.size a, 4
+.type a, @object
+a:
+.word 1
+
+.section .data.rel.ro,"aw",%progbits
+.globl b
+.size b, 4
+.type b, @object
+b:
+.word 2

lld/test/ELF/aarch64-condb-reloc.s

 #DSOREL:      Section {
 #DSOREL:        Index:
 #DSOREL:        Name: .got.plt
 #DSOREL-NEXT:   Type: SHT_PROGBITS
 #DSOREL-NEXT:   Flags [
 #DSOREL-NEXT:     SHF_ALLOC
 #DSOREL-NEXT:     SHF_WRITE
 #DSOREL-NEXT:   ]
-#DSOREL-NEXT:   Address: 0x30000
-#DSOREL-NEXT:   Offset: 0x30000
+#DSOREL-NEXT:   Address: 0x20000
+#DSOREL-NEXT:   Offset: 0x20000
 #DSOREL-NEXT:   Size: 48
 #DSOREL-NEXT:   Link: 0
 #DSOREL-NEXT:   Info: 0
 #DSOREL-NEXT:   AddressAlignment: 8
 #DSOREL-NEXT:   EntrySize: 0
 #DSOREL-NEXT:  }
 #DSOREL:      Relocations [
 #DSOREL-NEXT:  Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT:    0x30018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT:    0x30020 R_AARCH64_JUMP_SLOT _bar
-#DSOREL-NEXT:    0x30028 R_AARCH64_JUMP_SLOT _dah
+#DSOREL-NEXT:    0x20018 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT:    0x20020 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT:    0x20028 R_AARCH64_JUMP_SLOT _dah
 #DSOREL-NEXT:  }
 #DSOREL-NEXT:]
 
 #DSO:      Disassembly of section .text:
 #DSO-NEXT: _foo:
 #DSO-NEXT:     10000: {{.*}} nop
 #DSO-NEXT:     10004: {{.*}} nop
 #DSO-NEXT:     10008: {{.*}} nop
 #DSO-NEXT:     1000c: {{.*}} nop
 #DSO:      _bar:
 #DSO-NEXT:     10010: {{.*}} nop
 #DSO-NEXT:     10014: {{.*}} nop
 #DSO-NEXT:     10018: {{.*}} nop
 #DSO:      _dah:
 #DSO-NEXT:     1001c: {{.*}} nop
 #DSO-NEXT:     10020: {{.*}} nop
 #DSO:      _start:
 #DSO-NEXT:     10024: {{.*}} b.eq #44
 #DSO-NEXT:     10028: {{.*}} b.eq #56
 #DSO-NEXT:     1002c: {{.*}} b.eq #68
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-NEXT: .plt:
 #DSO-NEXT:     10030: {{.*}} stp x16, x30, [sp, #-16]!
-#DSO-NEXT:     10034: {{.*}} adrp x16, #131072
+#DSO-NEXT:     10034: {{.*}} adrp x16, #65536
 #DSO-NEXT:     10038: {{.*}} ldr x17, [x16, #16]
 #DSO-NEXT:     1003c: {{.*}} add x16, x16, #16
 #DSO-NEXT:     10040: {{.*}} br x17
 #DSO-NEXT:     10044: {{.*}} nop
 #DSO-NEXT:     10048: {{.*}} nop
 #DSO-NEXT:     1004c: {{.*}} nop
-#DSO-NEXT:     10050: {{.*}} adrp x16, #131072
+#DSO-NEXT:     10050: {{.*}} adrp x16, #65536
 #DSO-NEXT:     10054: {{.*}} ldr x17, [x16, #24]
 #DSO-NEXT:     10058: {{.*}} add x16, x16, #24
 #DSO-NEXT:     1005c: {{.*}} br x17
-#DSO-NEXT:     10060: {{.*}} adrp x16, #131072
+#DSO-NEXT:     10060: {{.*}} adrp x16, #65536
 #DSO-NEXT:     10064: {{.*}} ldr x17, [x16, #32]
 #DSO-NEXT:     10068: {{.*}} add x16, x16, #32
 #DSO-NEXT:     1006c: {{.*}} br x17
-#DSO-NEXT:     10070: {{.*}} adrp x16, #131072
+#DSO-NEXT:     10070: {{.*}} adrp x16, #65536
 #DSO-NEXT:     10074: {{.*}} ldr x17, [x16, #40]
 #DSO-NEXT:     10078: {{.*}} add x16, x16, #40
 #DSO-NEXT:     1007c: {{.*}} br x17
 
 .globl _start
 _start:
  b.eq _foo
  b.eq _bar
  b.eq _dah

lld/test/ELF/aarch64-gnu-ifunc-plt.s

 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %S/Inputs/shared2.s -o %t1.o
 // RUN: ld.lld %t1.o --shared -o %t.so
 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux-gnu %s -o %t.o
 // RUN: ld.lld %t.so %t.o -o %tout
 // RUN: llvm-objdump -d %tout | FileCheck %s --check-prefix=DISASM
 // RUN: llvm-objdump -s %tout | FileCheck %s --check-prefix=GOTPLT
 // RUN: llvm-readobj -r -dynamic-table %tout | FileCheck %s
 // REQUIRES: aarch64
 
 // Check that the IRELATIVE relocations are after the JUMP_SLOT in the plt
 // CHECK: Relocations [
 // CHECK-NEXT:   Section (4) .rela.plt {
-// CHECK:     0x40018 R_AARCH64_JUMP_SLOT bar2 0x0
-// CHECK-NEXT:     0x40020 R_AARCH64_JUMP_SLOT zed2 0x0
-// CHECK-NEXT:     0x40028 R_AARCH64_IRELATIVE - 0x20000
-// CHECK-NEXT:     0x40030 R_AARCH64_IRELATIVE - 0x20004
+// CHECK:     0x30018 R_AARCH64_JUMP_SLOT bar2 0x0
+// CHECK-NEXT:     0x30020 R_AARCH64_JUMP_SLOT zed2 0x0
+// CHECK-NEXT:     0x30028 R_AARCH64_IRELATIVE - 0x20000
+// CHECK-NEXT:     0x30030 R_AARCH64_IRELATIVE - 0x20004
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // Check that .got.plt entries point back to PLT header
 // GOTPLT: Contents of section .got.plt:
-// GOTPLT-NEXT:  40000 00000000 00000000 00000000 00000000
-// GOTPLT-NEXT:  40010 00000000 00000000 20000200 00000000
-// GOTPLT-NEXT:  40020 20000200 00000000 20000200 00000000
-// GOTPLT-NEXT:  40030 20000200 00000000
+// GOTPLT-NEXT:  30000 00000000 00000000 00000000 00000000
+// GOTPLT-NEXT:  30010 00000000 00000000 20000200 00000000
+// GOTPLT-NEXT:  30020 20000200 00000000 20000200 00000000
+// GOTPLT-NEXT:  30030 20000200 00000000
 
 // Check that the PLTRELSZ tag includes the IRELATIVE relocations
 // CHECK: DynamicSection [
 // CHECK:   0x0000000000000002 PLTRELSZ             96 (bytes)
 
 // Check that a PLT header is written and the ifunc entries appear last
 // DISASM: Disassembly of section .text:
 // DISASM-NEXT: foo:
-// DISASM-NEXT:    20000:       c0 03 5f d6     ret
+// DISASM-NEXT:    20000: {{.*}} ret
 // DISASM:      bar:
-// DISASM-NEXT:    20004:       c0 03 5f d6     ret
+// DISASM-NEXT:    20004: {{.*}} ret
 // DISASM:      _start:
-// DISASM-NEXT:    20008:       16 00 00 94     bl      #88
-// DISASM-NEXT:    2000c:       19 00 00 94     bl      #100
-// DISASM-NEXT:    20010:       0c 00 00 94     bl      #48
-// DISASM-NEXT:    20014:       0f 00 00 94     bl      #60
+// DISASM-NEXT:    20008: {{.*}} bl      #88
+// DISASM-NEXT:    2000c: {{.*}} bl      #100
+// DISASM-NEXT:    20010: {{.*}} bl      #48
+// DISASM-NEXT:    20014: {{.*}} bl      #60
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-NEXT: .plt:
-// DISASM-NEXT:    20020:       f0 7b bf a9     stp     x16, x30, [sp, #-16]!
-// DISASM-NEXT:    20024:       10 01 00 90     adrp    x16, #131072
-// DISASM-NEXT:    20028:       11 0a 40 f9     ldr     x17, [x16, #16]
-// DISASM-NEXT:    2002c:       10 42 00 91     add     x16, x16, #16
-// DISASM-NEXT:    20030:       20 02 1f d6     br      x17
-// DISASM-NEXT:    20034:       1f 20 03 d5     nop
-// DISASM-NEXT:    20038:       1f 20 03 d5     nop
-// DISASM-NEXT:    2003c:       1f 20 03 d5     nop
-// DISASM-NEXT:    20040:       10 01 00 90     adrp    x16, #131072
-// DISASM-NEXT:    20044:       11 0e 40 f9     ldr     x17, [x16, #24]
-// DISASM-NEXT:    20048:       10 62 00 91     add     x16, x16, #24
-// DISASM-NEXT:    2004c:       20 02 1f d6     br      x17
-// DISASM-NEXT:    20050:       10 01 00 90     adrp    x16, #131072
-// DISASM-NEXT:    20054:       11 12 40 f9     ldr     x17, [x16, #32]
-// DISASM-NEXT:    20058:       10 82 00 91     add     x16, x16, #32
-// DISASM-NEXT:    2005c:       20 02 1f d6     br      x17
-// DISASM-NEXT:    20060:       10 01 00 90     adrp    x16, #131072
-// DISASM-NEXT:    20064:       11 16 40 f9     ldr     x17, [x16, #40]
-// DISASM-NEXT:    20068:       10 a2 00 91     add     x16, x16, #40
-// DISASM-NEXT:    2006c:       20 02 1f d6     br      x17
-// DISASM-NEXT:    20070:       10 01 00 90     adrp    x16, #131072
-// DISASM-NEXT:    20074:       11 1a 40 f9     ldr     x17, [x16, #48]
-// DISASM-NEXT:    20078:       10 c2 00 91     add     x16, x16, #48
-// DISASM-NEXT:    2007c:       20 02 1f d6     br      x17
+// DISASM-NEXT:    20020: {{.*}} stp     x16, x30, [sp, #-16]!
+// DISASM-NEXT:    20024: {{.*}} adrp    x16, #65536
+// DISASM-NEXT:    20028: {{.*}} ldr     x17, [x16, #16]
+// DISASM-NEXT:    2002c: {{.*}} add     x16, x16, #16
+// DISASM-NEXT:    20030: {{.*}} br      x17
+// DISASM-NEXT:    20034: {{.*}} nop
+// DISASM-NEXT:    20038: {{.*}} nop
+// DISASM-NEXT:    2003c: {{.*}} nop
+// DISASM-NEXT:    20040: {{.*}} adrp    x16, #65536
+// DISASM-NEXT:    20044: {{.*}} ldr     x17, [x16, #24]
+// DISASM-NEXT:    20048: {{.*}} add     x16, x16, #24
+// DISASM-NEXT:    2004c: {{.*}} br      x17
+// DISASM-NEXT:    20050: {{.*}} adrp    x16, #65536
+// DISASM-NEXT:    20054: {{.*}} ldr     x17, [x16, #32]
+// DISASM-NEXT:    20058: {{.*}} add     x16, x16, #32
+// DISASM-NEXT:    2005c: {{.*}} br      x17
+// DISASM-NEXT:    20060: {{.*}} adrp    x16, #65536
+// DISASM-NEXT:    20064: {{.*}} ldr     x17, [x16, #40]
+// DISASM-NEXT:    20068: {{.*}} add     x16, x16, #40
+// DISASM-NEXT:    2006c: {{.*}} br      x17
+// DISASM-NEXT:    20070: {{.*}} adrp    x16, #65536
+// DISASM-NEXT:    20074: {{.*}} ldr     x17, [x16, #48]
+// DISASM-NEXT:    20078: {{.*}} add     x16, x16, #48
+// DISASM-NEXT:    2007c: {{.*}} br      x17
 
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  ret
 
 .type bar STT_GNU_IFUNC

lld/test/ELF/aarch64-tstbr14-reloc.s

 #DSOREL:      Section {
 #DSOREL:        Index:
 #DSOREL:        Name: .got.plt
 #DSOREL-NEXT:   Type: SHT_PROGBITS
 #DSOREL-NEXT:   Flags [
 #DSOREL-NEXT:     SHF_ALLOC
 #DSOREL-NEXT:     SHF_WRITE
 #DSOREL-NEXT:   ]
-#DSOREL-NEXT:   Address: 0x30000
-#DSOREL-NEXT:   Offset: 0x30000
+#DSOREL-NEXT:   Address: 0x20000
+#DSOREL-NEXT:   Offset: 0x20000
 #DSOREL-NEXT:   Size: 40
 #DSOREL-NEXT:   Link: 0
 #DSOREL-NEXT:   Info: 0
 #DSOREL-NEXT:   AddressAlignment: 8
 #DSOREL-NEXT:   EntrySize: 0
 #DSOREL-NEXT:  }
 #DSOREL:      Relocations [
 #DSOREL-NEXT:  Section ({{.*}}) .rela.plt {
-#DSOREL-NEXT:    0x30018 R_AARCH64_JUMP_SLOT _foo
-#DSOREL-NEXT:    0x30020 R_AARCH64_JUMP_SLOT _bar
+#DSOREL-NEXT:    0x20018 R_AARCH64_JUMP_SLOT _foo
+#DSOREL-NEXT:    0x20020 R_AARCH64_JUMP_SLOT _bar
 #DSOREL-NEXT:  }
 #DSOREL-NEXT:]
 
 #DSO:      Disassembly of section .text:
 #DSO-NEXT: _foo:
 #DSO-NEXT:  10000: {{.*}} nop
 #DSO-NEXT:  10004: {{.*}} nop
 #DSO-NEXT:  10008: {{.*}} nop

 # 0x10028 + 56 = 0x10060 = PLT[2]
 #DSO-NEXT:  1001c: {{.*}} tbnz w3, #15, #52
 #DSO-NEXT:  10020: {{.*}} tbnz w3, #15, #64
 #DSO-NEXT:  10024: {{.*}} tbz x6, #45, #44
 #DSO-NEXT:  10028: {{.*}} tbz x6, #45, #56
 #DSO-NEXT: Disassembly of section .plt:
 #DSO-NEXT: .plt:
 #DSO-NEXT:  10030: {{.*}} stp x16, x30, [sp, #-16]!
-#DSO-NEXT:  10034: {{.*}} adrp x16, #131072
+#DSO-NEXT:  10034: {{.*}} adrp x16, #65536
 #DSO-NEXT:  10038: {{.*}} ldr x17, [x16, #16]
 #DSO-NEXT:  1003c: {{.*}} add x16, x16, #16
 #DSO-NEXT:  10040: {{.*}} br x17
 #DSO-NEXT:  10044: {{.*}} nop
 #DSO-NEXT:  10048: {{.*}} nop
 #DSO-NEXT:  1004c: {{.*}} nop
-#DSO-NEXT:  10050: {{.*}} adrp x16, #131072
+#DSO-NEXT:  10050: {{.*}} adrp x16, #65536
 #DSO-NEXT:  10054: {{.*}} ldr x17, [x16, #24]
 #DSO-NEXT:  10058: {{.*}} add x16, x16, #24
 #DSO-NEXT:  1005c: {{.*}} br x17
-#DSO-NEXT:  10060: {{.*}} adrp x16, #131072
+#DSO-NEXT:  10060: {{.*}} adrp x16, #65536
 #DSO-NEXT:  10064: {{.*}} ldr x17, [x16, #32]
 #DSO-NEXT:  10068: {{.*}} add x16, x16, #32
 #DSO-NEXT:  1006c: {{.*}} br x17
 
 .globl _start
 _start:
  tbnz w3, #15, _foo
  tbnz w3, #15, _bar
  tbz x6, #45, _foo
  tbz x6, #45, _bar

lld/test/ELF/amdgpu-relocs.s

 # CHECK-NEXT: R_AMDGPU_ABS64 weak_var2 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var0 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var1 0x0
 # CHECK-NEXT: R_AMDGPU_ABS64 weakref_alias_var2 0x0
 # CHECK-NEXT: }
 # CHECK-NEXT: ]
 
 # OBJDUMP: Contents of section nonalloc:
-# OBJDUMP-NEXT: 0000 00000000 14380000 00000000 18340000
-# OBJDUMP-NEXT: 00000000 1c300000
+# OBJDUMP-NEXT: 0000 00000000 04480000 00000000 08440000
+# OBJDUMP-NEXT: 00000000 0c400000

lld/test/ELF/arm-abs32-dyn.s

  .data
  .word foo
  .word bar
 
 // RUN: ld.lld -shared -o %t.so %t.o
 // RUN: llvm-readobj -symbols -dyn-relocations %t.so | FileCheck %s
 
 // CHECK:      Dynamic Relocations {
-// CHECK-NEXT:   0x2004 R_ARM_RELATIVE
-// CHECK-NEXT:   0x2000 R_ARM_ABS32 foo 0x0
+// CHECK-NEXT:   0x1004 R_ARM_RELATIVE
+// CHECK-NEXT:   0x1000 R_ARM_ABS32 foo 0x0
 // CHECK-NEXT: }
 
 // CHECK:      Symbols [
 // CHECK:        Symbol {
 // CHECK:          Name: bar
 // CHECK-NEXT:     Value: 0x1000
 
 // CHECK:        Symbol {
 // CHECK:          Name: foo
 // CHECK-NEXT:     Value: 0x1000

lld/test/ELF/arm-exidx-shared.s

 
  .section .text.__aeabi_unwind_cpp_pr0, "ax", %progbits
  .global __aeabi_unwind_cpp_pr0
 __aeabi_unwind_cpp_pr0:
  bx lr
 
 // CHECK: Relocations [
 // CHECK-NEXT:   Section (6) .rel.plt {
-// CHECK-NEXT:     0x300C R_ARM_JUMP_SLOT __gxx_personality_v0
+// CHECK-NEXT:     0x200C R_ARM_JUMP_SLOT __gxx_personality_v0
 
 // CHECK-EXTAB: Contents of section .ARM.extab.text.func2:
 // 014c + 0ed8 = 0x1024 = __gxx_personality_v0(PLT)
 // CHECK-EXTAB-NEXT:  014c d80e0000 b0b0b000 00000000

lld/test/ELF/arm-fpic-got.s

 
 // CHECK: Section {
 // CHECK:    Name: .got
 // CHECK-NEXT:    Type: SHT_PROGBITS
 // CHECK-NEXT:      Flags [
 // CHECK-NEXT:      SHF_ALLOC
 // CHECK-NEXT:      SHF_WRITE
 // CHECK-NEXT:    ]
-// CHECK-NEXT:    Address: 0x12000
+// CHECK-NEXT:    Address: 0x13000
 // CHECK-NEXT:    Offset:
 // CHECK-NEXT:    Size: 4
 // CHECK-NEXT:    Link:
 // CHECK-NEXT:    Info:
 // CHECK-NEXT:    AddressAlignment: 4
 // CHECK-NEXT:    EntrySize:
 
 // SYMBOLS:    Name: val
-// SYMBOLS-NEXT:    Value: 0x13000
+// SYMBOLS-NEXT:    Value: 0x12000
 // SYMBOLS-NEXT:    Size: 4
 // SYMBOLS-NEXT:    Binding: Global
 // SYMBOLS-NEXT:    Type: Object
 // SYMBOLS-NEXT:    Other:
 // SYMBOLS-NEXT:    Section: .data
 
 // CODE: Disassembly of section .text:
 // CODE-NEXT: _start:
 // CODE-NEXT:   11000:  08 00 9f e5     ldr     r0, [pc, #8]
 // CODE-NEXT:   11004:  00 00 9f e7     ldr     r0, [pc, r0]
 // CODE-NEXT:   11008:  00 00 90 e5     ldr     r0, [r0]
 // CODE-NEXT:   1100c:  1e ff 2f e1     bx      lr
 // CODE: $d.1:
-// 0x11004 + 0x0ff4 + 8 = 0x12000 = .got
-// CODE-NEXT:   11010:  f4 0f 00 00
+// 0x11004 + 0x1ff4 + 8 = 0x13000 = .got
+// CODE-NEXT:   11010:  f4 1f 00 00

lld/test/ELF/arm-gnu-ifunc-plt.s

 // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf %S/Inputs/arm-shared.s -o %t1.o
 // RUN: ld.lld %t1.o --shared -o %t.so
 // RUN: llvm-mc -filetype=obj -triple=armv7a-linux-gnueabihf %s -o %t.o
 // RUN: ld.lld %t.so %t.o -o %tout
 // RUN: llvm-objdump -triple=armv7a-linux-gnueabihf -d %tout | FileCheck %s --check-prefix=DISASM
 // RUN: llvm-objdump -s %tout | FileCheck %s --check-prefix=GOTPLT
 // RUN: llvm-readobj -r -dynamic-table %tout | FileCheck %s
 // REQUIRES: arm
 
 // Check that the IRELATIVE relocations are last in the .got
 // CHECK: Relocations [
 // CHECK-NEXT:   Section (4) .rel.dyn {
-// CHECK-NEXT:     0x12078 R_ARM_GLOB_DAT bar2 0x0
-// CHECK-NEXT:     0x1207C R_ARM_GLOB_DAT zed2 0x0
-// CHECK-NEXT:     0x12080 R_ARM_IRELATIVE - 0x0
-// CHECK-NEXT:     0x12084 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT:     0x13078 R_ARM_GLOB_DAT bar2 0x0
+// CHECK-NEXT:     0x1307C R_ARM_GLOB_DAT zed2 0x0
+// CHECK-NEXT:     0x13080 R_ARM_IRELATIVE - 0x0
+// CHECK-NEXT:     0x13084 R_ARM_IRELATIVE - 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT:   Section (5) .rel.plt {
-// CHECK-NEXT:     0x1300C R_ARM_JUMP_SLOT bar2 0x0
-// CHECK-NEXT:     0x13010 R_ARM_JUMP_SLOT zed2 0x0
+// CHECK-NEXT:     0x1200C R_ARM_JUMP_SLOT bar2 0x0
+// CHECK-NEXT:     0x12010 R_ARM_JUMP_SLOT zed2 0x0
 // CHECK-NEXT:   }
 // CHECK-NEXT: ]
 
 // Check that the GOT entries refer back to the ifunc resolver
+// GOTPLT: Contents of section .got.plt:
+// GOTPLT-NEXT:  12000 00000000 00000000 00000000 20100100
+// GOTPLT-NEXT:  12010 20100100
 // GOTPLT: Contents of section .got:
-// GOTPLT-NEXT:  12078 00000000 00000000 00100100 04100100
-// GOTPLT-NEXT: Contents of section .got.plt:
-// GOTPLT-NEXT:  13000 00000000 00000000 00000000 20100100
-// GOTPLT-NEXT:  13010 20100100
+// GOTPLT-NEXT:  13078 00000000 00000000 00100100 04100100
 
 // DISASM: Disassembly of section .text:
 // DISASM-NEXT: foo:
 // DISASM-NEXT:    11000:       1e ff 2f e1     bx      lr
 // DISASM: bar:
 // DISASM-NEXT:    11004:       1e ff 2f e1     bx      lr
 // DISASM:      _start:
 // DISASM-NEXT:    11008:       14 00 00 eb     bl      #80
 // DISASM-NEXT:    1100c:       17 00 00 eb     bl      #92
 // DISASM:         11010:       00 00 00 00     .word   0x00000000
 // DISASM-NEXT:    11014:       04 00 00 00     .word   0x00000004
 // DISASM:         11018:       05 00 00 eb     bl      #20
 // DISASM-NEXT:    1101c:       08 00 00 eb     bl      #32
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-NEXT: .plt:
 // DISASM-NEXT:    11020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // DISASM-NEXT:    11024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // DISASM-NEXT:    11028:       0e e0 8f e0     add     lr, pc, lr
 // DISASM-NEXT:    1102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// DISASM-NEXT:    11030:       d0 1f 00 00
+// DISASM-NEXT:    11030:       d0 0f 00 00
 // DISASM-NEXT:    11034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11038:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    1103c:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    11040:       cc 1f 00 00
+// DISASM-NEXT:    11040:       cc 0f 00 00
 // DISASM-NEXT:    11044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11048:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    1104c:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    11050:       c0 1f 00 00
+// DISASM-NEXT:    11050:       c0 0f 00 00
 // Alignment to 16 byte boundary not strictly necessary on ARM, but harmless
 // DISASM-NEXT:    11054:       00 00 00 00     andeq   r0, r0, r0
 // DISASM-NEXT:    11058:       00 00 00 00     andeq   r0, r0, r0
 // DISASM-NEXT:    1105c:       00 00 00 00     andeq   r0, r0, r0
 // DISASM-NEXT:    11060:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11064:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    11068:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    1106c:       14 10 00 00
+// DISASM-NEXT:    1106c:       14 20 00 00
 // DISASM-NEXT:    11070:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DISASM-NEXT:    11074:       0f c0 8c e0     add     r12, r12, pc
 // DISASM-NEXT:    11078:       00 f0 9c e5     ldr     pc, [r12]
-// DISASM-NEXT:    1107c:       08 10 00 00
+// DISASM-NEXT:    1107c:       08 20 00 00
 
 
 .syntax unified
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  bx lr

lld/test/ELF/arm-pie-relative.s

 
  .data
  .global sym
 sym:
  .word 0
 
 // CHECK:      Relocations [
 // CHECK-NEXT:   Section (4) .rel.dyn {
-// CHECK-NEXT:     0x2058 R_ARM_RELATIVE
+// CHECK-NEXT:     0x3058 R_ARM_RELATIVE
 
 // GOT: Contents of section .got:
-// GOT-NEXT:  2058 00300000
+// GOT-NEXT:  3058 00200000

lld/test/ELF/arm-plt-reloc.s

 // S(0x1054) - P(0x1014) + A(-8) = 0x38 = 56
 // DSO-NEXT:    1014:        0e 00 00 0a    beq     #56
 // DSO: Disassembly of section .plt:
 // DSO-NEXT:.plt:
 // DSO-NEXT:    1020:        04 e0 2d e5    str     lr, [sp, #-4]!
 // DSO-NEXT:    1024:        04 e0 9f e5    ldr     lr, [pc, #4]
 // DSO-NEXT:    1028:        0e e0 8f e0    add     lr, pc, lr
 // DSO-NEXT:    102c:        08 f0 be e5    ldr     pc, [lr, #8]!
-// 0x1028 + 8 + 1fd0 = 0x3000
-// DSO-NEXT:    1030:        d0 1f 00 00
+// 0x1028 + 8 + 0fd0 = 0x2000
+// DSO-NEXT:    1030:        d0 0f 00 00
 // DSO-NEXT:    1034:        04 c0 9f e5    ldr     r12, [pc, #4]
 // DSO-NEXT:    1038:        0f c0 8c e0    add     r12, r12, pc
 // DSO-NEXT:    103c:        00 f0 9c e5    ldr     pc, [r12]
-// 0x1038 + 8 + 1fcc = 0x300c
-// DSO-NEXT:    1040:        cc 1f 00 00
+// 0x1038 + 8 + 0fcc = 0x200c
+// DSO-NEXT:    1040:        cc 0f 00 00
 // DSO-NEXT:    1044:        04 c0 9f e5    ldr     r12, [pc, #4]
 // DSO-NEXT:    1048:        0f c0 8c e0    add     r12, r12, pc
 // DSO-NEXT:    104c:        00 f0 9c e5    ldr     pc, [r12]
-// 0x1048 + 8 + 1fc0 = 0x3010
-// DSO-NEXT:    1050:        c0 1f 00 00
+// 0x1048 + 8 + 0fc0 = 0x2010
+// DSO-NEXT:    1050:        c0 0f 00 00
 // DSO-NEXT:    1054:        04 c0 9f e5    ldr     r12, [pc, #4]
 // DSO-NEXT:    1058:        0f c0 8c e0    add     r12, r12, pc
 // DSO-NEXT:    105c:        00 f0 9c e5    ldr     pc, [r12]
-// 0x1058 + 8 + 1fb4 = 0x3014
-// DSO-NEXT:    1060:       b4 1f 00 00
+// 0x1058 + 8 + 0fb4 = 0x2014
+// DSO-NEXT:    1060:       b4 0f 00 00
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]
-// DSOREL-NEXT:    Address: 0x3000
+// DSOREL-NEXT:    Address: 0x2000
 // DSOREL-NEXT:    Offset:
 // DSOREL-NEXT:    Size: 24
 // DSOREL-NEXT:    Link:
 // DSOREL-NEXT:    Info:
 // DSOREL-NEXT:    AddressAlignment: 4
 // DSOREL-NEXT:    EntrySize:
 // DSOREL:  Relocations [
 // DSOREL-NEXT:  Section (4) .rel.plt {
-// DSOREL-NEXT:    0x300C R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT:    0x3010 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT:    0x3014 R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT:    0x200C R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT:    0x2010 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT:    0x2014 R_ARM_JUMP_SLOT func3 0x0

lld/test/ELF/arm-thumb-interwork-shared.s

 // CHECK-NEXT:     101e:       60 47   bx      r12
 
 // PLT: Disassembly of section .plt:
 // PLT-NEXT: .plt:
 // PLT:          1020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // PLT-NEXT:     1024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // PLT-NEXT:     1028:       0e e0 8f e0     add     lr, pc, lr
 // PLT-NEXT:     102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// PLT-NEXT:     1030:       d0 1f 00 00
+// PLT-NEXT:     1030:       d0 0f 00 00
 // PLT-NEXT:     1034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // PLT-NEXT:     1038:       0f c0 8c e0     add     r12, r12, pc
 // PLT-NEXT:     103c:       00 f0 9c e5     ldr     pc, [r12]
-// PLT-NEXT:     1040:       cc 1f 00 00
+// PLT-NEXT:     1040:       cc 0f 00 00
 // PLT-NEXT:     1044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // PLT-NEXT:     1048:       0f c0 8c e0     add     r12, r12, pc
 // PLT-NEXT:     104c:       00 f0 9c e5     ldr     pc, [r12]
-// PLT-NEXT:     1050:       c0 1f 00 00
+// PLT-NEXT:     1050:       c0 0f 00 00

lld/test/ELF/arm-thumb-plt-reloc.s

 // 0x1010 + 0x40 + 4 = 0x1054 = PLT func3
 // DSOTHUMB-NEXT:    1010:       00 f0 20 e8     blx     #64
 // DSOARM: Disassembly of section .plt:
 // DSOARM: .plt:
 // DSOARM-NEXT:    1020:       04 e0 2d e5     str     lr, [sp, #-4]!
 // DSOARM-NEXT:    1024:       04 e0 9f e5     ldr     lr, [pc, #4]
 // DSOARM-NEXT:    1028:       0e e0 8f e0     add     lr, pc, lr
 // DSOARM-NEXT:    102c:       08 f0 be e5     ldr     pc, [lr, #8]!
-// DSOARM-NEXT:    1030:       d0 1f 00 00
-// 0x1028 + 8 + 1fd0 = 0x3000
+// DSOARM-NEXT:    1030:       d0 0f 00 00
+// 0x1028 + 8 + 0fd0 = 0x2000
 // DSOARM-NEXT:    1034:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1038:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    103c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1040:       cc 1f 00 00
-// 0x1038 + 8 + 1fcc = 0x300c
+// DSOARM-NEXT:    1040:       cc 0f 00 00
+// 0x1038 + 8 + 0fcc = 0x200c
 // DSOARM-NEXT:    1044:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1048:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    104c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1050:       c0 1f 00 00
-// 0x1048 + 8 + 1fc0 = 0x3010
+// DSOARM-NEXT:    1050:       c0 0f 00 00
+// 0x1048 + 8 + 0fc0 = 0x2010
 // DSOARM-NEXT:    1054:       04 c0 9f e5     ldr     r12, [pc, #4]
 // DSOARM-NEXT:    1058:       0f c0 8c e0     add     r12, r12, pc
 // DSOARM-NEXT:    105c:       00 f0 9c e5     ldr     pc, [r12]
-// DSOARM-NEXT:    1060:       b4 1f 00 00
-// 0x1058 + 8 + 1fb4 = 0x3014
+// DSOARM-NEXT:    1060:       b4 0f 00 00
+// 0x1058 + 8 + 0fb4 = 0x2014
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]
-// DSOREL-NEXT:    Address: 0x3000
+// DSOREL-NEXT:    Address: 0x2000
 // DSOREL-NEXT:    Offset:
 // DSOREL-NEXT:    Size: 24
 // DSOREL-NEXT:    Link:
 // DSOREL-NEXT:    Info:
 // DSOREL-NEXT:    AddressAlignment: 4
 // DSOREL-NEXT:    EntrySize:
 // DSOREL:  Relocations [
 // DSOREL-NEXT:  Section (4) .rel.plt {
-// DSOREL-NEXT:    0x300C R_ARM_JUMP_SLOT func1 0x0
-// DSOREL-NEXT:    0x3010 R_ARM_JUMP_SLOT func2 0x0
-// DSOREL-NEXT:    0x3014 R_ARM_JUMP_SLOT func3 0x0
+// DSOREL-NEXT:    0x200C R_ARM_JUMP_SLOT func1 0x0
+// DSOREL-NEXT:    0x2010 R_ARM_JUMP_SLOT func2 0x0
+// DSOREL-NEXT:    0x2014 R_ARM_JUMP_SLOT func3 0x0

lld/test/ELF/arm-tls-norelax-gd-ie.s

 .L0:
  .globl __tls_get_addr
  bl __tls_get_addr
  bx lr
  .p2align 2
  .Lt0: .word   y(TLSGD) + (. - .L0 - 8)
 
 // CHECK: Dynamic Relocations {
-// CHECK-NEXT:   0x12078 R_ARM_TLS_DTPMOD32 y
-// CHECK-NEXT:   0x1207C R_ARM_TLS_DTPOFF32 y
-// CHECK-NEXT:   0x1300C R_ARM_JUMP_SLOT __tls_get_addr
+// CHECK-NEXT:   0x13078 R_ARM_TLS_DTPMOD32 y
+// CHECK-NEXT:   0x1307C R_ARM_TLS_DTPOFF32 y
+// CHECK-NEXT:   0x1200C R_ARM_JUMP_SLOT __tls_get_addr

lld/test/ELF/arm-tls-norelax-gd-le.s

 .section       .tbss,"awT",%nobits
  .p2align  2
 x:
  .space 4
  .type  x, %object
 
 // CHECK:       Contents of section .got:
 // Module index is always 1 for executable
-// CHECK-NEXT:  12060 01000000 00000000
+// CHECK-NEXT:  13060 01000000 00000000
 

lld/test/ELF/arm-tls-norelax-ie-le.s

  .word 0x1
  .globl x2
  .section       .tbss,"awT",%nobits
  .type  x1, %object
 x2:
  .space 4
  .type x2, %object
 
-// CHECK: Contents of section .got
+// CHECK: Contents of section .got:
 // x1 at offset 8 from TP, x2 at offset c from TP. Offsets include TCB size of 8
-// CHECK-NEXT: 12064 08000000 0c000000
+// CHECK-NEXT: 13064 08000000 0c000000

lld/test/ELF/arm-tls-norelax-ld-le.s

  .space  4
  .section        .tdata,"awT",%progbits
  .p2align  2
  .type   x, %object
 x:
  .word   10
 
 // CHECK: Contents of section .got:
-// CHECK-NEXT:  12064 01000000 00000000
+// CHECK-NEXT:  13064 01000000 00000000

lld/test/ELF/relocation-copy-relro.s

+// REQUIRES: x86
+// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %s -o %t.o
+// RUN: llvm-mc -filetype=obj -triple=x86_64-pc-linux %p/Inputs/relocation-copy-relro.s -o %t2.o
+// RUN: ld.lld -shared %t2.o -o %t.so
+// RUN: ld.lld %t.o %t.so -o %t3
+// RUN: llvm-readobj -program-headers -s -r %t3 | FileCheck %s
+
+// CHECK:        Index: 7
+// CHECK-NEXT:   Name: .data.rel.ro (48)
+// CHECK-NEXT:   Type: SHT_PROGBITS (0x1)
+// CHECK-NEXT:   Flags [ (0x3)
+// CHECK-NEXT:     SHF_ALLOC (0x2)
+// CHECK-NEXT:     SHF_WRITE (0x1)
+// CHECK-NEXT:   ]
+// CHECK-NEXT:   Address: 0x2020B0
+// CHECK-NEXT:   Offset: 0x20B0
+// CHECK-NEXT:   Size: 8
+
+// CHECK: 0x2020B0 R_X86_64_COPY a 0x0
+// CHECK: 0x2020B4 R_X86_64_COPY b 0x0
+
+// CHECK:      Type: PT_GNU_RELRO (0x6474E552)
+// CHECK-NEXT: Offset: 0x2000
+// CHECK-NEXT: VirtualAddress: 0x202000
+// CHECK-NEXT: PhysicalAddress: 0x202000
+// CHECK-NEXT: FileSize: 184
+// CHECK-NEXT: MemSize: 4096
+
+.text
+.global _start
+_start:
+movl $1, a
+movl $2, b