[clang][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, __sptr, __uptr for aarch64

[a_vorobev]

Summary

This is frontend patch for the issue : 62536 . This patch adds -p270:32:32-p271:32:32-p272:64:64 to the aarch64 data layout string, which are used in X86 for implementing mixed pointer sizes. This patch also changes the datalayout string in aarch64 backend target, because the datalayout specified in the frontend has to match the backend target datalayout.

Additionally, the patch adds changes to clang/basic/target/aarch64 for the correct size of the pointer and its address in the IR. The address spaces: 270,271 and 271 already choised in X86 platform.

[akhuang]

I think this looks good to me. I remember I also had to make this change to accept old datalayout strings https://reviews.llvm.org/D67631.

[rnk]

+@efriedma, since I think we had that ongoing thread about what to do with i128 alignment in data layout. Is this a reasonable way to handle the datalayout migration?

[efriedma]

If you don't have autoupgrade, that means you can't link IR built with older versions of LLVM to IR built with newer versions. llvm::UpgradeDataLayoutString is designed to fix this incompatibility. It's probably worth doing here given that it's relatively straightforward.

The issue with the i128 datalayout ugrade isn't the datalayout string itself, it's that the datalayout change affects existing code in a non-trivial way. That isn't really an issue here: there shouldn't be any existing AArch64 IR using address-space 270, so changing its meaning won't have any effect.

clang/lib/Basic/Targets/AArch64.h

 #include "OSTargets.h"
 #include "clang/Basic/TargetBuiltins.h"
 #include "llvm/TargetParser/AArch64TargetParser.h"
 #include <optional>
 
 namespace clang {
 namespace targets {
 
+static const unsigned ARM64AddrSpaceMap[] = {
+    0,   // Default
+    0,   // opencl_global
+    0,   // opencl_local
+    0,   // opencl_constant
+    0,   // opencl_private
+    0,   // opencl_generic
+    0,   // opencl_global_device
+    0,   // opencl_global_host
+    0,   // cuda_device
+    0,   // cuda_constant
+    0,   // cuda_shared
+    0,   // sycl_global
+    0,   // sycl_global_device
+    0,   // sycl_global_host
+    0,   // sycl_local
+    0,   // sycl_private
+    270, // ptr32_sptr
+    271, // ptr32_uptr
+    272, // ptr64
+    0,   // hlsl_groupshared
+    // Wasm address space values for this target are dummy values,
+    // as it is only enabled for Wasm targets.
+    20, // wasm_funcref
+};
+
 class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
   virtual void setDataLayout() = 0;
   static const TargetInfo::GCCRegAlias GCCRegAliases[];
   static const char *const GCCRegNames[];
 
   enum FPUModeEnum {
     FPUMode = (1 << 0),
     NeonMode = (1 << 1),
     SveMode = (1 << 2),
   };
 
+  enum AddrSpace { ptr32_sptr = 270, ptr32_uptr = 271, ptr64 = 272 };
+
   unsigned FPU = FPUMode;
   bool HasCRC = false;
   bool HasAES = false;
   bool HasSHA2 = false;
   bool HasSHA3 = false;
   bool HasSM4 = false;
   bool HasUnaligned = true;
   bool HasFullFP16 = false;
public:
   }
 
   int getEHDataRegisterNumber(unsigned RegNo) const override;
 
   const char *getBFloat16Mangling() const override { return "u6__bf16"; };
   bool hasInt128Type() const override;
 
   bool hasBitIntType() const override { return true; }
+
+  uint64_t getPointerWidthV(LangAS AddrSpace) const override {
+    if (AddrSpace == LangAS::ptr32_sptr || AddrSpace == LangAS::ptr32_uptr)
+      return 32;
+    if (AddrSpace == LangAS::ptr64)
+      return 64;
+    return PointerWidth;
+  }
+
+  uint64_t getPointerAlignV(LangAS AddrSpace) const override {
+    return getPointerWidthV(AddrSpace);
+  }
+
 };
 
 class LLVM_LIBRARY_VISIBILITY AArch64leTargetInfo : public AArch64TargetInfo {
 public:
   AArch64leTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
 
   void getTargetDefines(const LangOptions &Opts,
                             MacroBuilder &Builder) const override;

clang/lib/Basic/Targets/AArch64.cpp

AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple &Triple,
   } else {
     if (!getTriple().isOSDarwin() && !getTriple().isOSNetBSD())
       WCharType = UnsignedInt;
 
     Int64Type = SignedLong;
     IntMaxType = SignedLong;
   }
 
+   AddrSpaceMap = &ARM64AddrSpaceMap;
+
   // All AArch64 implementations support ARMv8 FP, which makes half a legal type.
   HasLegalHalfType = true;
   HalfArgsAndReturns = true;
   HasFloat16 = true;
   HasStrictFP = true;
 
   if (Triple.isArch64Bit())
     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;

 
 AArch64leTargetInfo::AArch64leTargetInfo(const llvm::Triple &Triple,
                                          const TargetOptions &Opts)
     : AArch64TargetInfo(Triple, Opts) {}
 
 void AArch64leTargetInfo::setDataLayout() {
   if (getTriple().isOSBinFormatMachO()) {
     if(getTriple().isArch32Bit())
-      resetDataLayout("e-m:o-p:32:32-i64:64-i128:128-n32:64-S128", "_");
+      resetDataLayout("e-m:o-p:32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128", "_");
     else
-      resetDataLayout("e-m:o-i64:64-i128:128-n32:64-S128", "_");
+      resetDataLayout("e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128", "_");
   } else
-    resetDataLayout("e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
+    resetDataLayout("e-m:e-i8:8:32-i16:16:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128");
 }
 
 void AArch64leTargetInfo::getTargetDefines(const LangOptions &Opts,
                                            MacroBuilder &Builder) const {
   Builder.defineMacro("__AARCH64EL__");
   AArch64TargetInfo::getTargetDefines(Opts, Builder);
 }
 
 AArch64beTargetInfo::AArch64beTargetInfo(const llvm::Triple &Triple,
                                          const TargetOptions &Opts)
     : AArch64TargetInfo(Triple, Opts) {}
 
 void AArch64beTargetInfo::getTargetDefines(const LangOptions &Opts,
                                            MacroBuilder &Builder) const {
   Builder.defineMacro("__AARCH64EB__");
   Builder.defineMacro("__AARCH_BIG_ENDIAN");
   Builder.defineMacro("__ARM_BIG_ENDIAN");
   AArch64TargetInfo::getTargetDefines(Opts, Builder);
 }
 
 void AArch64beTargetInfo::setDataLayout() {
   assert(!getTriple().isOSBinFormatMachO());
-  resetDataLayout("E-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128");
+  resetDataLayout("E-m:e-i8:8:32-i16:16:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128");
 }
 
 WindowsARM64TargetInfo::WindowsARM64TargetInfo(const llvm::Triple &Triple,
                                                const TargetOptions &Opts)
     : WindowsTargetInfo<AArch64leTargetInfo>(Triple, Opts), Triple(Triple) {
 
   // This is an LLP64 platform.
   // int:4, long:4, long long:8, long double:8.
   IntWidth = IntAlign = 32;
   LongWidth = LongAlign = 32;
   DoubleAlign = LongLongAlign = 64;
   LongDoubleWidth = LongDoubleAlign = 64;
   LongDoubleFormat = &llvm::APFloat::IEEEdouble();
   IntMaxType = SignedLongLong;
   Int64Type = SignedLongLong;
   SizeType = UnsignedLongLong;
   PtrDiffType = SignedLongLong;
   IntPtrType = SignedLongLong;
 }
 
 void WindowsARM64TargetInfo::setDataLayout() {
   resetDataLayout(Triple.isOSBinFormatMachO()
-                      ? "e-m:o-i64:64-i128:128-n32:64-S128"
-                      : "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128",
+                      ? "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128"
+                      : "e-m:w-p:64:64-i32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128",
                   Triple.isOSBinFormatMachO() ? "_" : "");
 }
 
 TargetInfo::BuiltinVaListKind
 WindowsARM64TargetInfo::getBuiltinVaListKind() const {
   return TargetInfo::CharPtrBuiltinVaList;
 }
 

clang/test/CodeGen/ms-mixed-ptr-sizes.c

 // RUN: %clang_cc1 -triple x86_64-windows-msvc -fms-extensions -emit-llvm -O2 < %s | FileCheck %s --check-prefixes=X64,ALL
 // RUN: %clang_cc1 -triple i386-pc-win32 -fms-extensions -emit-llvm -O2 < %s | FileCheck %s --check-prefixes=X86,ALL
+// RUN: %clang_cc1 -triple aarch64-unknown-linux-gnu -fms-extensions -emit-llvm -O2 < %s | FileCheck %s --check-prefixes=AARCH64,ALL
 
 struct Foo {
   int * __ptr32 p32;
   int * __ptr64 p64;
 };
 void use_foo(struct Foo *f);
 void test_sign_ext(struct Foo *f, int * __ptr32 __sptr i) {
 // X64-LABEL: define dso_local void @test_sign_ext({{.*}}ptr addrspace(270) noundef %i)
 // X86-LABEL: define dso_local void @test_sign_ext(ptr noundef %f, ptr noundef %i)
+// AARCH64-LABEL: define dso_local void @test_sign_ext({{.*}}ptr addrspace(270) noundef %i) local_unnamed_addr #0
 // X64: %{{.+}} = addrspacecast ptr addrspace(270) %i to ptr
 // X86: %{{.+}} = addrspacecast ptr %i to ptr addrspace(272)
+// AARCH64: %{{.+}} = addrspacecast ptr addrspace(270) %i to ptr
   f->p64 = i;
   use_foo(f);
 }
 void test_zero_ext(struct Foo *f, int * __ptr32 __uptr i) {
 // X64-LABEL: define dso_local void @test_zero_ext({{.*}}ptr addrspace(271) noundef %i)
 // X86-LABEL: define dso_local void @test_zero_ext({{.*}}ptr addrspace(271) noundef %i)
+// AARCH64-LABEL: define dso_local void @test_zero_ext({{.*}}ptr addrspace(271) noundef %i) local_unnamed_addr #0
 // X64: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr
 // X86: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr addrspace(272)
+// AARCH64: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr
   f->p64 = i;
   use_foo(f);
 }
 void test_trunc(struct Foo *f, int * __ptr64 i) {
 // X64-LABEL: define dso_local void @test_trunc(ptr noundef %f, ptr noundef %i)
 // X86-LABEL: define dso_local void @test_trunc({{.*}}ptr addrspace(272) noundef %i)
+// AARCH64-LABEL: define dso_local void @test_trunc(ptr noundef %f, ptr noundef %i) local_unnamed_addr #0
 // X64: %{{.+}} = addrspacecast ptr %i to ptr addrspace(270)
 // X86: %{{.+}} = addrspacecast ptr addrspace(272) %i to ptr
+// AARCH64: %{{.+}} = addrspacecast ptr %i to ptr addrspace(270)
   f->p32 = i;
   use_foo(f);
 }
 void test_noop(struct Foo *f, int * __ptr32 i) {
 // X64-LABEL: define dso_local void @test_noop({{.*}}ptr addrspace(270) noundef %i)
 // X86-LABEL: define dso_local void @test_noop({{.*}}ptr noundef %i)
+// AARCH64-LABEL: define dso_local void @test_noop({{.*}}ptr addrspace(270) noundef %i) local_unnamed_addr #0
 // X64-NOT: addrspacecast
 // X86-NOT: addrspacecast
+// AARCH64-NOT: addrspacecast
   f->p32 = i;
   use_foo(f);
 }
 
 void test_other(struct Foo *f, __attribute__((address_space(10))) int *i) {
 // X64-LABEL: define dso_local void @test_other({{.*}}ptr addrspace(10) noundef %i)
 // X86-LABEL: define dso_local void @test_other({{.*}}ptr addrspace(10) noundef %i)
+// AARCH64-LABEL: define dso_local void @test_other({{.*}}ptr addrspace(10) noundef %i) local_unnamed_addr #0
 // X64: %{{.+}} = addrspacecast ptr addrspace(10) %i to ptr addrspace(270)
 // X86: %{{.+}} = addrspacecast ptr addrspace(10) %i to ptr
+// AARCH64: %{{.+}} = addrspacecast ptr addrspace(10) %i to ptr addrspace(270)
   f->p32 = (int * __ptr32)i;
   use_foo(f);
 }
 
 int test_compare1(int *__ptr32 __uptr i, int *__ptr64 j) {
   // ALL-LABEL: define dso_local i32 @test_compare1
   // X64: %{{.+}} = addrspacecast ptr %j to ptr addrspace(271)
   // X64: %cmp = icmp eq ptr addrspace(271) %{{.+}}, %i
   // X86: %{{.+}} = addrspacecast ptr addrspace(272) %j to ptr addrspace(271)
   // X86: %cmp = icmp eq ptr addrspace(271) %{{.+}}, %i
+  // AARCH64: %{{.+}} = addrspacecast ptr %j to ptr addrspace(271)
+  // AARCH64: %cmp = icmp eq ptr addrspace(271) %{{.+}}, %i
   return (i == j);
 }
 
 int test_compare2(int *__ptr32 __sptr i, int *__ptr64 j) {
   // ALL-LABEL: define dso_local i32 @test_compare2
   // X64: %{{.+}} = addrspacecast ptr %j to ptr addrspace(270)
   // X64: %cmp = icmp eq ptr addrspace(270) %{{.+}}, %i
   // X86: %{{.+}} = addrspacecast ptr addrspace(272) %j to ptr
   // X86: %cmp = icmp eq ptr %{{.+}}, %i
+  // AARCH64: %{{.+}} = addrspacecast ptr %j to ptr addrspace(270)
+  // AARCH64: %cmp = icmp eq ptr addrspace(270) %{{.+}}, %i
   return (i == j);
 }
 
 int test_compare3(int *__ptr32 __uptr i, int *__ptr64 j) {
   // ALL-LABEL: define dso_local i32 @test_compare3
   // X64: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr
   // X64: %cmp = icmp eq ptr %{{.+}}, %j
   // X86: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr addrspace(272)
   // X86: %cmp = icmp eq ptr addrspace(272) %{{.+}}, %j
+  // AARCH64: %{{.+}} = addrspacecast ptr addrspace(271) %i to ptr
+  // AARCH64: %cmp = icmp eq ptr %{{.+}}, %j
   return (j == i);
 }
 
 int test_compare4(int *__ptr32 __sptr i, int *__ptr64 j) {
   // ALL-LABEL: define dso_local i32 @test_compare4
   // X64: %{{.+}} = addrspacecast ptr addrspace(270) %i to ptr
   // X64: %cmp = icmp eq ptr %{{.+}}, %j
   // X86: %{{.+}} = addrspacecast ptr %i to ptr addrspace(272)
   // X86: %cmp = icmp eq ptr addrspace(272) %{{.+}}, %j
+  // AARCH64: %{{.+}} = addrspacecast ptr addrspace(270) %i to ptr
+  // AARCH64: %cmp = icmp eq ptr %{{.+}}, %j
   return (j == i);
 }

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

 }
 
 // Helper function to build a DataLayout string
 static std::string computeDataLayout(const Triple &TT,
                                      const MCTargetOptions &Options,
                                      bool LittleEndian) {
   if (TT.isOSBinFormatMachO()) {
     if (TT.getArch() == Triple::aarch64_32)
-      return "e-m:o-p:32:32-i64:64-i128:128-n32:64-S128";
-    return "e-m:o-i64:64-i128:128-n32:64-S128";
+       return "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128";
+    return "e-m:o-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128";
   }
   if (TT.isOSBinFormatCOFF())
-    return "e-m:w-p:64:64-i32:32-i64:64-i128:128-n32:64-S128";
+    return "e-m:w-i32:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128";
   std::string Endian = LittleEndian ? "e" : "E";
   std::string Ptr32 = TT.getEnvironment() == Triple::GNUILP32 ? "-p:32:32" : "";
   return Endian + "-m:e" + Ptr32 +
-         "-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128";
+         "-i8:8:32-i16:16:32-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-n32:64-S128";
 }
 
 static StringRef computeDefaultCPU(const Triple &TT, StringRef CPU) {
   if (CPU.empty() && TT.isArm64e())
     return "apple-a12";
   return CPU;
 }