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Differential D156776

[X86] Add more tests for `isKnownNeverZero`;
ClosedPublic

Authored by goldstein.w.n on Aug 1 2023, 12:33 AM.

Details

Reviewers
RKSimon
pengfei
Commits
rG2937d03e49be: [X86] Add more tests for `isKnownNeverZero`;

Diff Detail

Unit TestsFailed

TimeTest
60,070 msx64 debian > MLIR.Examples/standalone::test.toy

Event Timeline

goldstein.w.n created this revision.Aug 1 2023, 12:33 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 1 2023, 12:33 AM
goldstein.w.n requested review of this revision.Aug 1 2023, 12:33 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 1 2023, 12:33 AM
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goldstein.w.n added a child revision: D156777: [SelectionDAG] Add/Improve cases in `isKnownNeverZero`.Aug 1 2023, 12:41 AM
goldstein.w.n added a parent revision: D156775: [X86] Add tests for `isKnownToBeAPowerOfTwo`; NFC.
Harbormaster completed remote builds in B249408: Diff 545940.Aug 1 2023, 1:28 AM
goldstein.w.n updated this revision to Diff 546508.Aug 2 2023, 9:32 AM

Rebase

goldstein.w.n updated this revision to Diff 546511.Aug 2 2023, 9:34 AM

Rebase

Harbormaster completed remote builds in B249809: Diff 546511.Aug 2 2023, 1:15 PM
goldstein.w.n updated this revision to Diff 546920.Aug 3 2023, 10:16 AM

Rebase

Harbormaster completed remote builds in B250110: Diff 546920.Aug 3 2023, 12:16 PM
RKSimon accepted this revision.Aug 4 2023, 6:09 AM

LGTM

This revision is now accepted and ready to land.Aug 4 2023, 6:09 AM
goldstein.w.n updated this revision to Diff 547249.Aug 4 2023, 9:25 AM

Rebase

Harbormaster completed remote builds in B250351: Diff 547249.Aug 4 2023, 11:32 AM
goldstein.w.n updated this revision to Diff 550535.Aug 15 2023, 4:33 PM

Rebase

Harbormaster completed remote builds in B252791: Diff 550535.Aug 15 2023, 8:40 PM
This revision was landed with ongoing or failed builds.Aug 15 2023, 11:59 PM
Closed by commit rG2937d03e49be: [X86] Add more tests for `isKnownNeverZero`; (authored by goldstein.w.n). · Explain Why
This revision was automatically updated to reflect the committed changes.
goldstein.w.n added a commit: rG2937d03e49be: [X86] Add more tests for `isKnownNeverZero`;.

Revision Contents

PathSize
llvm/
test/
CodeGen/
X86/
158 lines

Diff 546920

llvm/test/CodeGen/X86/known-never-zero.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK ; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=CHECK
;; Use cttz to test if we properly prove never-zero. There is a very ;; Use cttz to test if we properly prove never-zero. There is a very
;; simple transform from cttz -> cttz_zero_undef if its operand is ;; simple transform from cttz -> cttz_zero_undef if its operand is
;; known never zero. ;; known never zero.
declare i32 @llvm.cttz.i32(i32, i1) declare i32 @llvm.cttz.i32(i32, i1)
declare i32 @llvm.uadd.sat.i32(i32, i32) declare i32 @llvm.uadd.sat.i32(i32, i32)
declare i32 @llvm.umax.i32(i32, i32) declare i32 @llvm.umax.i32(i32, i32)
declare i32 @llvm.umin.i32(i32, i32) declare i32 @llvm.umin.i32(i32, i32)
declare i32 @llvm.smin.i32(i32, i32)
declare i32 @llvm.smax.i32(i32, i32)
declare i32 @llvm.bswap.i32(i32) declare i32 @llvm.bswap.i32(i32)
declare i32 @llvm.bitreverse.i32(i32) declare i32 @llvm.bitreverse.i32(i32)
declare i32 @llvm.ctpop.i32(i32) declare i32 @llvm.ctpop.i32(i32)
declare i32 @llvm.abs.i32(i32, i1) declare i32 @llvm.abs.i32(i32, i1)
declare i32 @llvm.fshl.i32(i32, i32, i32) declare i32 @llvm.fshl.i32(i32, i32, i32)
declare i32 @llvm.fshr.i32(i32, i32, i32) declare i32 @llvm.fshr.i32(i32, i32, i32)
define i32 @or_known_nonzero(i32 %x) { define i32 @or_known_nonzero(i32 %x) {
▲ Show 20 Lines • Show All 222 Lines • ▼ Show 20 Lines
; CHECK-NEXT: .LBB13_1: ; CHECK-NEXT: .LBB13_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = call i32 @llvm.umin.i32(i32 %x, i32 54) %z = call i32 @llvm.umin.i32(i32 %x, i32 54)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @smin_known_nonzero(i32 %xx, i32 %yy) {
; CHECK-LABEL: smin_known_nonzero:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: movl $4, %eax
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: addl $4, %esi
; CHECK-NEXT: cmpl %esi, %eax
; CHECK-NEXT: cmovll %eax, %esi
; CHECK-NEXT: bsfl %esi, %ecx
; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: cmovnel %ecx, %eax
; CHECK-NEXT: retq
%x = shl nuw i32 4, %xx
%y = add nuw nsw i32 %yy, 4
%z = call i32 @llvm.smin.i32(i32 %x, i32 %y)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r
}
define i32 @smin_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: smin_maybe_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $54, %edi
; CHECK-NEXT: movl $54, %eax
; CHECK-NEXT: cmovll %edi, %eax
; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB15_1
; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq
; CHECK-NEXT: .LBB15_1:
; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq
%z = call i32 @llvm.smin.i32(i32 %x, i32 54)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r
}
define i32 @smax_known_nonzero(i32 %xx, i32 %yy) {
; CHECK-LABEL: smax_known_nonzero:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: movl $4, %eax
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shll %cl, %eax
; CHECK-NEXT: addl $4, %esi
; CHECK-NEXT: cmpl %esi, %eax
; CHECK-NEXT: cmovgl %eax, %esi
; CHECK-NEXT: bsfl %esi, %ecx
; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: cmovnel %ecx, %eax
; CHECK-NEXT: retq
%x = shl nuw i32 4, %xx
%y = add nuw nsw i32 %yy, 4
%z = call i32 @llvm.smax.i32(i32 %x, i32 %y)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r
}
define i32 @smax_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: smax_maybe_zero:
; CHECK: # %bb.0:
; CHECK-NEXT: cmpl $55, %edi
; CHECK-NEXT: movl $54, %eax
; CHECK-NEXT: cmovgel %edi, %eax
; CHECK-NEXT: bsfl %eax, %ecx
; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: cmovnel %ecx, %eax
; CHECK-NEXT: retq
%z = call i32 @llvm.smax.i32(i32 %x, i32 54)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r
}
define i32 @rotr_known_nonzero(i32 %xx, i32 %y) { define i32 @rotr_known_nonzero(i32 %xx, i32 %y) {
; CHECK-LABEL: rotr_known_nonzero: ; CHECK-LABEL: rotr_known_nonzero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: orl $256, %edi # imm = 0x100 ; CHECK-NEXT: orl $256, %edi # imm = 0x100
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: rorl %cl, %edi ; CHECK-NEXT: rorl %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB14_1 ; CHECK-NEXT: je .LBB18_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB14_1: ; CHECK-NEXT: .LBB18_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%x = or i32 %xx, 256 %x = or i32 %xx, 256
%shr = lshr i32 %x, %y %shr = lshr i32 %x, %y
%sub = sub i32 32, %y %sub = sub i32 32, %y
%shl = shl i32 %x, %sub %shl = shl i32 %x, %sub
%z = or i32 %shl, %shr %z = or i32 %shl, %shr
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @rotr_maybe_zero(i32 %x, i32 %y) { define i32 @rotr_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: rotr_maybe_zero: ; CHECK-LABEL: rotr_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: rorl %cl, %edi ; CHECK-NEXT: rorl %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB15_1 ; CHECK-NEXT: je .LBB19_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB15_1: ; CHECK-NEXT: .LBB19_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%shr = lshr i32 %x, %y %shr = lshr i32 %x, %y
%sub = sub i32 32, %y %sub = sub i32 32, %y
%shl = shl i32 %x, %sub %shl = shl i32 %x, %sub
%z = or i32 %shl, %shr %z = or i32 %shl, %shr
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
Show All 16 Lines
define i32 @rotr_with_fshr_maybe_zero(i32 %x, i32 %y) { define i32 @rotr_with_fshr_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: rotr_with_fshr_maybe_zero: ; CHECK-LABEL: rotr_with_fshr_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: rorl %cl, %edi ; CHECK-NEXT: rorl %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB17_1 ; CHECK-NEXT: je .LBB21_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB17_1: ; CHECK-NEXT: .LBB21_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 %y) %z = call i32 @llvm.fshr.i32(i32 %x, i32 %x, i32 %y)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @rotl_known_nonzero(i32 %xx, i32 %y) { define i32 @rotl_known_nonzero(i32 %xx, i32 %y) {
; CHECK-LABEL: rotl_known_nonzero: ; CHECK-LABEL: rotl_known_nonzero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: orl $256, %edi # imm = 0x100 ; CHECK-NEXT: orl $256, %edi # imm = 0x100
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: roll %cl, %edi ; CHECK-NEXT: roll %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB18_1 ; CHECK-NEXT: je .LBB22_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB18_1: ; CHECK-NEXT: .LBB22_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%x = or i32 %xx, 256 %x = or i32 %xx, 256
%shl = shl i32 %x, %y %shl = shl i32 %x, %y
%sub = sub i32 32, %y %sub = sub i32 32, %y
%shr = lshr i32 %x, %sub %shr = lshr i32 %x, %sub
%z = or i32 %shr, %shl %z = or i32 %shr, %shl
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @rotl_maybe_zero(i32 %x, i32 %y) { define i32 @rotl_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: rotl_maybe_zero: ; CHECK-LABEL: rotl_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: roll %cl, %edi ; CHECK-NEXT: roll %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB19_1 ; CHECK-NEXT: je .LBB23_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB19_1: ; CHECK-NEXT: .LBB23_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%shl = shl i32 %x, %y %shl = shl i32 %x, %y
%sub = sub i32 32, %y %sub = sub i32 32, %y
%shr = lshr i32 %x, %sub %shr = lshr i32 %x, %sub
%z = or i32 %shr, %shl %z = or i32 %shr, %shl
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
Show All 16 Lines
define i32 @rotl_with_fshl_maybe_zero(i32 %x, i32 %y) { define i32 @rotl_with_fshl_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: rotl_with_fshl_maybe_zero: ; CHECK-LABEL: rotl_with_fshl_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %esi, %ecx ; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: roll %cl, %edi ; CHECK-NEXT: roll %cl, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB21_1 ; CHECK-NEXT: je .LBB25_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB21_1: ; CHECK-NEXT: .LBB25_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %y) %z = call i32 @llvm.fshl.i32(i32 %x, i32 %x, i32 %y)
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @sra_known_nonzero_sign_bit_set(i32 %x) { define i32 @sra_known_nonzero_sign_bit_set(i32 %x) {
Show All 27 Lines
define i32 @sra_maybe_zero(i32 %x, i32 %y) { define i32 @sra_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: sra_maybe_zero: ; CHECK-LABEL: sra_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %ecx ; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: sarl %cl, %esi ; CHECK-NEXT: sarl %cl, %esi
; CHECK-NEXT: testl %esi, %esi ; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB24_1 ; CHECK-NEXT: je .LBB28_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %esi, %eax ; CHECK-NEXT: rep bsfl %esi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB24_1: ; CHECK-NEXT: .LBB28_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = ashr exact i32 %y, %x %z = ashr exact i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @srl_known_nonzero_sign_bit_set(i32 %x) { define i32 @srl_known_nonzero_sign_bit_set(i32 %x) {
Show All 27 Lines
define i32 @srl_maybe_zero(i32 %x, i32 %y) { define i32 @srl_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: srl_maybe_zero: ; CHECK-LABEL: srl_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %ecx ; CHECK-NEXT: movl %edi, %ecx
; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx ; CHECK-NEXT: # kill: def $cl killed $cl killed $ecx
; CHECK-NEXT: shrl %cl, %esi ; CHECK-NEXT: shrl %cl, %esi
; CHECK-NEXT: testl %esi, %esi ; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB27_1 ; CHECK-NEXT: je .LBB31_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %esi, %eax ; CHECK-NEXT: rep bsfl %esi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB27_1: ; CHECK-NEXT: .LBB31_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = lshr exact i32 %y, %x %z = lshr exact i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @udiv_known_nonzero(i32 %xx, i32 %y) { define i32 @udiv_known_nonzero(i32 %xx, i32 %y) {
Show All 13 Lines
define i32 @udiv_maybe_zero(i32 %x, i32 %y) { define i32 @udiv_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: udiv_maybe_zero: ; CHECK-LABEL: udiv_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: xorl %edx, %edx ; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: divl %esi ; CHECK-NEXT: divl %esi
; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB29_1 ; CHECK-NEXT: je .LBB33_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB29_1: ; CHECK-NEXT: .LBB33_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = udiv exact i32 %x, %y %z = udiv exact i32 %x, %y
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @sdiv_known_nonzero(i32 %xx, i32 %y) { define i32 @sdiv_known_nonzero(i32 %xx, i32 %y) {
Show All 13 Lines
define i32 @sdiv_maybe_zero(i32 %x, i32 %y) { define i32 @sdiv_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: sdiv_maybe_zero: ; CHECK-LABEL: sdiv_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: cltd ; CHECK-NEXT: cltd
; CHECK-NEXT: idivl %esi ; CHECK-NEXT: idivl %esi
; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB31_1 ; CHECK-NEXT: je .LBB35_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB31_1: ; CHECK-NEXT: .LBB35_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = sdiv exact i32 %x, %y %z = sdiv exact i32 %x, %y
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @add_known_nonzero(i32 %xx, i32 %y) { define i32 @add_known_nonzero(i32 %xx, i32 %y) {
Show All 9 Lines; CHECK-NEXT: retq
ret i32 %r ret i32 %r
} }
define i32 @add_maybe_zero(i32 %xx, i32 %y) { define i32 @add_maybe_zero(i32 %xx, i32 %y) {
; CHECK-LABEL: add_maybe_zero: ; CHECK-LABEL: add_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orl $1, %edi ; CHECK-NEXT: orl $1, %edi
; CHECK-NEXT: addl %esi, %edi ; CHECK-NEXT: addl %esi, %edi
; CHECK-NEXT: je .LBB33_1 ; CHECK-NEXT: je .LBB37_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB33_1: ; CHECK-NEXT: .LBB37_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%x = or i32 %xx, 1 %x = or i32 %xx, 1
%z = add nsw i32 %x, %y %z = add nsw i32 %x, %y
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
Show All 30 Lines
} }
define i32 @sub_maybe_zero(i32 %x) { define i32 @sub_maybe_zero(i32 %x) {
; CHECK-LABEL: sub_maybe_zero: ; CHECK-LABEL: sub_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax ; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: orl $64, %eax ; CHECK-NEXT: orl $64, %eax
; CHECK-NEXT: subl %edi, %eax ; CHECK-NEXT: subl %edi, %eax
; CHECK-NEXT: je .LBB36_1 ; CHECK-NEXT: je .LBB40_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB36_1: ; CHECK-NEXT: .LBB40_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%y = or i32 %x, 64 %y = or i32 %x, 64
%z = sub i32 %y, %x %z = sub i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @sub_maybe_zero2(i32 %x) { define i32 @sub_maybe_zero2(i32 %x) {
; CHECK-LABEL: sub_maybe_zero2: ; CHECK-LABEL: sub_maybe_zero2:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: negl %edi ; CHECK-NEXT: negl %edi
; CHECK-NEXT: je .LBB37_1 ; CHECK-NEXT: je .LBB41_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB37_1: ; CHECK-NEXT: .LBB41_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = sub i32 0, %x %z = sub i32 0, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @mul_known_nonzero_nsw(i32 %x, i32 %yy) { define i32 @mul_known_nonzero_nsw(i32 %x, i32 %yy) {
; CHECK-LABEL: mul_known_nonzero_nsw: ; CHECK-LABEL: mul_known_nonzero_nsw:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orl $256, %esi # imm = 0x100 ; CHECK-NEXT: orl $256, %esi # imm = 0x100
; CHECK-NEXT: imull %edi, %esi ; CHECK-NEXT: imull %edi, %esi
; CHECK-NEXT: testl %esi, %esi ; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB38_1 ; CHECK-NEXT: je .LBB42_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %esi, %eax ; CHECK-NEXT: rep bsfl %esi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB38_1: ; CHECK-NEXT: .LBB42_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%y = or i32 %yy, 256 %y = or i32 %yy, 256
%z = mul nsw i32 %y, %x %z = mul nsw i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @mul_known_nonzero_nuw(i32 %x, i32 %yy) { define i32 @mul_known_nonzero_nuw(i32 %x, i32 %yy) {
; CHECK-LABEL: mul_known_nonzero_nuw: ; CHECK-LABEL: mul_known_nonzero_nuw:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: orl $256, %esi # imm = 0x100 ; CHECK-NEXT: orl $256, %esi # imm = 0x100
; CHECK-NEXT: imull %edi, %esi ; CHECK-NEXT: imull %edi, %esi
; CHECK-NEXT: testl %esi, %esi ; CHECK-NEXT: testl %esi, %esi
; CHECK-NEXT: je .LBB39_1 ; CHECK-NEXT: je .LBB43_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %esi, %eax ; CHECK-NEXT: rep bsfl %esi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB39_1: ; CHECK-NEXT: .LBB43_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%y = or i32 %yy, 256 %y = or i32 %yy, 256
%z = mul nuw i32 %y, %x %z = mul nuw i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @mul_maybe_zero(i32 %x, i32 %y) { define i32 @mul_maybe_zero(i32 %x, i32 %y) {
; CHECK-LABEL: mul_maybe_zero: ; CHECK-LABEL: mul_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: imull %esi, %edi ; CHECK-NEXT: imull %esi, %edi
; CHECK-NEXT: testl %edi, %edi ; CHECK-NEXT: testl %edi, %edi
; CHECK-NEXT: je .LBB40_1 ; CHECK-NEXT: je .LBB44_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %edi, %eax ; CHECK-NEXT: rep bsfl %edi, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB40_1: ; CHECK-NEXT: .LBB44_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = mul nuw nsw i32 %y, %x %z = mul nuw nsw i32 %y, %x
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @bitcast_known_nonzero(<2 x i16> %xx) { define i32 @bitcast_known_nonzero(<2 x i16> %xx) {
Show All 16 Lines; CHECK-NEXT: retq
ret i32 %r ret i32 %r
} }
define i32 @bitcast_maybe_zero(<2 x i16> %x) { define i32 @bitcast_maybe_zero(<2 x i16> %x) {
; CHECK-LABEL: bitcast_maybe_zero: ; CHECK-LABEL: bitcast_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movd %xmm0, %eax ; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB42_1 ; CHECK-NEXT: je .LBB46_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB42_1: ; CHECK-NEXT: .LBB46_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = bitcast <2 x i16> %x to i32 %z = bitcast <2 x i16> %x to i32
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @bitcast_from_float(float %x) { define i32 @bitcast_from_float(float %x) {
; CHECK-LABEL: bitcast_from_float: ; CHECK-LABEL: bitcast_from_float:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: movd %xmm0, %eax ; CHECK-NEXT: movd %xmm0, %eax
; CHECK-NEXT: testl %eax, %eax ; CHECK-NEXT: testl %eax, %eax
; CHECK-NEXT: je .LBB43_1 ; CHECK-NEXT: je .LBB47_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB43_1: ; CHECK-NEXT: .LBB47_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = bitcast float %x to i32 %z = bitcast float %x to i32
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @zext_known_nonzero(i16 %xx) { define i32 @zext_known_nonzero(i16 %xx) {
Show All 11 Lines; CHECK-NEXT: retq
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @zext_maybe_zero(i16 %x) { define i32 @zext_maybe_zero(i16 %x) {
; CHECK-LABEL: zext_maybe_zero: ; CHECK-LABEL: zext_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: testw %di, %di ; CHECK-NEXT: testw %di, %di
; CHECK-NEXT: je .LBB45_1 ; CHECK-NEXT: je .LBB49_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: movzwl %di, %eax ; CHECK-NEXT: movzwl %di, %eax
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB45_1: ; CHECK-NEXT: .LBB49_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = zext i16 %x to i32 %z = zext i16 %x to i32
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @sext_known_nonzero(i16 %xx) { define i32 @sext_known_nonzero(i16 %xx) {
Show All 11 Lines; CHECK-NEXT: retq
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }
define i32 @sext_maybe_zero(i16 %x) { define i32 @sext_maybe_zero(i16 %x) {
; CHECK-LABEL: sext_maybe_zero: ; CHECK-LABEL: sext_maybe_zero:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: testw %di, %di ; CHECK-NEXT: testw %di, %di
; CHECK-NEXT: je .LBB47_1 ; CHECK-NEXT: je .LBB51_1
; CHECK-NEXT: # %bb.2: # %cond.false ; CHECK-NEXT: # %bb.2: # %cond.false
; CHECK-NEXT: movswl %di, %eax ; CHECK-NEXT: movswl %di, %eax
; CHECK-NEXT: rep bsfl %eax, %eax ; CHECK-NEXT: rep bsfl %eax, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
; CHECK-NEXT: .LBB47_1: ; CHECK-NEXT: .LBB51_1:
; CHECK-NEXT: movl $32, %eax ; CHECK-NEXT: movl $32, %eax
; CHECK-NEXT: retq ; CHECK-NEXT: retq
%z = sext i16 %x to i32 %z = sext i16 %x to i32
%r = call i32 @llvm.cttz.i32(i32 %z, i1 false) %r = call i32 @llvm.cttz.i32(i32 %z, i1 false)
ret i32 %r ret i32 %r
} }