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Differential D156404

[RISCV] Use x0 in vsetvli when avl is equal to vlmax.
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Authored by jacquesguan on Jul 27 2023, 2:30 AM.

Details

Reviewers
craig.topper
asb
luismarques
frasercrmck
Commits
rGb7408ebbb7d8: [RISCV] Use x0 in vsetvli when avl is equal to vlmax.
Summary

We could use x0 form in vsetvli when we already know the vlmax and avl is equal to it.

Diff Detail

Event Timeline

jacquesguan created this revision.Jul 27 2023, 2:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 27 2023, 2:30 AM
Herald added subscribers: jobnoorman, luke, VincentWu and 25 others. · View Herald Transcript
jacquesguan requested review of this revision.Jul 27 2023, 2:30 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 27 2023, 2:30 AM
Herald added subscribers: llvm-commits, wangpc, eopXD, MaskRay. · View Herald Transcript
Harbormaster completed remote builds in B248476: Diff 544662.Jul 27 2023, 3:31 AM
luke added a comment.Jul 27 2023, 5:19 AM

Makes sense to me

llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
5–11

Small typo

craig.topper added inline comments.Jul 27 2023, 10:22 AM
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
557
const unsigned VLEN = Subtarget->getRealMinVLen();
if (VLEN == Subtarget->getRealMaxVLen()) {
jacquesguan updated this revision to Diff 545050.Jul 28 2023, 1:22 AM

address comment.

jacquesguan marked 2 inline comments as done.Jul 28 2023, 1:30 AM
jacquesguan added inline comments.
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
557

Done.

llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll
5–11

Done.

Harbormaster completed remote builds in B248776: Diff 545050.Jul 28 2023, 1:53 AM
craig.topper accepted this revision.Jul 28 2023, 9:16 AM

LGTM

This revision is now accepted and ready to land.Jul 28 2023, 9:16 AM
Closed by commit rGb7408ebbb7d8: [RISCV] Use x0 in vsetvli when avl is equal to vlmax. (authored by jacquesguan). · Explain WhyJul 30 2023, 6:49 PM
This revision was automatically updated to reflect the committed changes.
jacquesguan marked 2 inline comments as done.
jacquesguan added a commit: rGb7408ebbb7d8: [RISCV] Use x0 in vsetvli when avl is equal to vlmax..

Revision Contents

PathSize
llvm/
lib/
Target/
RISCV/
6 lines
test/
CodeGen/
RISCV/
rvv/
25 lines

Diff 545498

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Show First 20 Lines • Show All 546 Lines • ▼ Show 20 Lines RISCVII::VLMUL VLMul = static_cast<RISCVII::VLMUL>(
Node->getConstantOperandVal(Offset + 1) & 0x7); Node->getConstantOperandVal(Offset + 1) & 0x7);
unsigned VTypeI = RISCVVType::encodeVTYPE(VLMul, SEW, /*TailAgnostic*/ true, unsigned VTypeI = RISCVVType::encodeVTYPE(VLMul, SEW, /*TailAgnostic*/ true,
/*MaskAgnostic*/ true); /*MaskAgnostic*/ true);
SDValue VTypeIOp = CurDAG->getTargetConstant(VTypeI, DL, XLenVT); SDValue VTypeIOp = CurDAG->getTargetConstant(VTypeI, DL, XLenVT);
SDValue VLOperand; SDValue VLOperand;
unsigned Opcode = RISCV::PseudoVSETVLI; unsigned Opcode = RISCV::PseudoVSETVLI;
if (auto *C = dyn_cast<ConstantSDNode>(Node->getOperand(1))) {
const unsigned VLEN = Subtarget->getRealMinVLen();
if (VLEN == Subtarget->getRealMaxVLen())
craig.topperUnsubmitted
Done
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const unsigned VLEN = Subtarget->getRealMinVLen();
if (VLEN == Subtarget->getRealMaxVLen()) {
craig.topper: ``` const unsigned VLEN = Subtarget->getRealMinVLen(); if (VLEN == Subtarget->getRealMaxVLen())…
jacquesguanAuthorUnsubmitted
Done
ReplyInline Actions

Done.

jacquesguan: Done.
if (VLEN / RISCVVType::getSEWLMULRatio(SEW, VLMul) == C->getZExtValue())
VLMax = true;
}
if (VLMax || isAllOnesConstant(Node->getOperand(1))) { if (VLMax || isAllOnesConstant(Node->getOperand(1))) {
VLOperand = CurDAG->getRegister(RISCV::X0, XLenVT); VLOperand = CurDAG->getRegister(RISCV::X0, XLenVT);
Opcode = RISCV::PseudoVSETVLIX0; Opcode = RISCV::PseudoVSETVLIX0;
} else { } else {
VLOperand = Node->getOperand(1); VLOperand = Node->getOperand(1);
if (auto *C = dyn_cast<ConstantSDNode>(VLOperand)) { if (auto *C = dyn_cast<ConstantSDNode>(VLOperand)) {
uint64_t AVL = C->getZExtValue(); uint64_t AVL = C->getZExtValue();
▲ Show 20 Lines • Show All 3,025 Lines • Show Last 20 Lines

llvm/test/CodeGen/RISCV/rvv/vsetvli-intrinsics.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \ ; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
; RUN: -verify-machineinstrs | FileCheck %s ; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKNOWN
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \ ; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
; RUN: -verify-machineinstrs | FileCheck %s ; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKNOWN
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \
; RUN: -riscv-v-vector-bits-max=128 -verify-machineinstrs \
; RUN: | FileCheck %s --check-prefixes=CHECK,VLEN128
; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
; RUN: -riscv-v-vector-bits-max=128 -verify-machineinstrs \
; RUN: | FileCheck %s --check-prefixes=CHECK,VLEN128
lukeUnsubmitted
Done
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; RUN: sed 's/iXLen/i64/g' %s | llc -mtriple=riscv64 -mattr=+v \
- ; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKONWN
+ ; RUN: -verify-machineinstrs | FileCheck %s --check-prefixes=CHECK,VLENUNKNOWN
; RUN: sed 's/iXLen/i32/g' %s | llc -mtriple=riscv32 -mattr=+v \

Small typo

luke: Small typo
jacquesguanAuthorUnsubmitted
Done
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Done.

jacquesguan: Done.
declare iXLen @llvm.riscv.vsetvli.iXLen(iXLen, iXLen, iXLen) declare iXLen @llvm.riscv.vsetvli.iXLen(iXLen, iXLen, iXLen)
declare iXLen @llvm.riscv.vsetvlimax.iXLen(iXLen, iXLen) declare iXLen @llvm.riscv.vsetvlimax.iXLen(iXLen, iXLen)
define iXLen @test_vsetvli_e8m1(iXLen %avl) nounwind { define iXLen @test_vsetvli_e8m1(iXLen %avl) nounwind {
; CHECK-LABEL: test_vsetvli_e8m1: ; CHECK-LABEL: test_vsetvli_e8m1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, a0, e8, m1, ta, ma ; CHECK-NEXT: vsetvli a0, a0, e8, m1, ta, ma
▲ Show 20 Lines • Show All 116 Lines • ▼ Show 20 Lines
define iXLen @test_vsetvli_negone_e8m1(iXLen %avl) nounwind { define iXLen @test_vsetvli_negone_e8m1(iXLen %avl) nounwind {
; CHECK-LABEL: test_vsetvli_negone_e8m1: ; CHECK-LABEL: test_vsetvli_negone_e8m1:
; CHECK: # %bb.0: ; CHECK: # %bb.0:
; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma ; CHECK-NEXT: vsetvli a0, zero, e8, m1, ta, ma
; CHECK-NEXT: ret ; CHECK-NEXT: ret
%vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen -1, iXLen 0, iXLen 0) %vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen -1, iXLen 0, iXLen 0)
ret iXLen %vl ret iXLen %vl
} }
define iXLen @test_vsetvli_eqvlmax_e8m8(iXLen %avl) nounwind {
; VLENUNKNOWN-LABEL: test_vsetvli_eqvlmax_e8m8:
; VLENUNKNOWN: # %bb.0:
; VLENUNKNOWN-NEXT: li a0, 128
; VLENUNKNOWN-NEXT: vsetvli a0, a0, e8, m8, ta, ma
; VLENUNKNOWN-NEXT: ret
;
; VLEN128-LABEL: test_vsetvli_eqvlmax_e8m8:
; VLEN128: # %bb.0:
; VLEN128-NEXT: vsetvli a0, zero, e8, m8, ta, ma
; VLEN128-NEXT: ret
%vl = call iXLen @llvm.riscv.vsetvli.iXLen(iXLen 128, iXLen 0, iXLen 3)
ret iXLen %vl
}