[llvm-objdump] -d: don't display mapping symbols as labels

[MaskRay]

Summary

Similar to D96617 for llvm-symbolizer.

This patch matches the GNU objdump -d behavior to suppress printing
labels for mapping symbols. Mapping symbol names don't convey much
information.

When --show-all-symbols (not in GNU) is specified, we still print
mapping symbols.

Note: the for (size_t SI = 0, SE = Symbols.size(); SI != SE;) loops
needs to iterate all mapping symbols, even if they are not displayed.
We use the new field IsMappingSymbol to recognize mapping symbols.
This field also enables simplification after D139131.

ELF/ARM/disassemble-all-mapping-symbols.s is enhanced to add .space 2.
If End = std::min(End, Symbols[SI].Addr); is not correctly set, we
would print a .word.

[MaskRay]

fix all tests. add mapping symbol

[MaskRay]

simplify some code from D139131 with the new field MappingSymbol

[peter.smith]

I'm OK in principle with the chage, particularly as it matches GNU objdump. I sometimes find mapping symbols useful for Assembly language when mixing Arm and Thumb in the same function, that isn't particularly common in practice though, and we can get them back with --show-all-syms.

Some minor suggestions to the code.

llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h

35

Would IsMappingSymbol be a better name. It would match the form of IsXCOFF and reads a bit better in statements like if (a.IsMappingSymbol) . Not a strong opinion though.

llvm/tools/llvm-objdump/llvm-objdump.cpp

1776

Was this change intentional?

[MaskRay]

MappingSymbol => IsMappingSymbol
remove a stray blank line

[MaskRay]

llvm/tools/llvm-objdump/llvm-objdump.cpp

1776

Not:) Fixed. I have tried several approaches for this patch, and I forgot to drop this change after abandoning my previous approaches.

[peter.smith]

Thanks. LGTM from me. Will be worth leaving some time for other reviewers to comment/object.

[jhenderson]

llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h

48–50

It's not clear to me purely from the name that FormatSpecific and IsMappingSymbol should be synonymous. Coudl this parameter simply be called IsMappingSymbol too (or possibly IsELFMappingSymbol)?

llvm/tools/llvm-objdump/llvm-objdump.cpp

1453–1455

I might be missing something obvious, but I don't see how the code below means the mapping symbol is only stored in AllSymbols if --show-all-symbols is specified?

[jobnoorman]

llvm/tools/llvm-objdump/llvm-objdump.cpp

1464

This recognizes every non-STT_SECTION symbol that has SF_FormatSpecific set with a name that starts with $[adtx] as a mapping symbol. I suppose this is correct for the currently supported targets but I see two problems with this:

• It partially duplicates the logic here
• What if some target has SF_FormatSpecific non-mapping, non-STT_SECTION symbols with the same naming pattern?

It seems to me that SF_FormatSpecific is too overloaded. Would it make sense to add a new flag, say SF_Mapping? This would also benefit a number of tools that now have duplicate the logic to recognize mapping symbols. For example, llvm-objdump and llvm-nm. Note that the detection is always slightly different which may lead to subtle bugs.

I understand that this is something that should probably not be addresses by this patch but I thought it might be a good place to start the discussion.

[MaskRay]

llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h

48–50

Sorry, I forgot to rename the parameter. Done.

llvm/tools/llvm-objdump/llvm-objdump.cpp

1464

Maybe. I think a separate SF_Mapping is clearer but likely won't simplify much. The distinction mostly matters for llvm-nm and llvm-objdump and the two tools need special handling anyway.

STT_FILE/STT_SECTION/mapping symbols are hidden in GNU nm by different means.
nm -a displays BFD_DEBUGGING symbols, e.g. STT_FILE/STT_SECTION symbols.
nm --special-syms is for mapping symbols.
For RISC-V, nm has another behavior https://sourceware.org/bugzilla/show_bug.cgi?id=27584 that we don't completely port. Actually, I don't know if filtering out .L0 in nm by default is a good behavior. In GNU nm, whether BFD is configured with RISC-V makes the behavior different as well.

[MaskRay]

rename a variable
fix a comment

[jhenderson]

LGTM. Perhaps worth a release note, and probably should wait for @jobnoorman to confirm.

[jobnoorman]

llvm/tools/llvm-objdump/llvm-objdump.cpp

1464

Thanks for the explanation @MaskRay! I might consider creating a patch for SF_Mapping in the future to see if it can simplify some things and we can continue the discussion then.

lld/test/ELF/aarch64-call26-thunk.s

 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
 // CHECK-NEXT:    210120:       bl      0x210124
 // CHECK: <__AArch64AbsLongThunk_big>:
 // CHECK-NEXT:    210124:       ldr     x16, 0x21012c
 // CHECK-NEXT:    210128:       br      x16
-// CHECK: <$d>:
 // CHECK-NEXT:    21012c:       00 00 00 00     .word   0x00000000
 // CHECK-NEXT:    210130:       10 00 00 00     .word   0x00000010
 

lld/test/ELF/aarch64-cortex-a53-843419-large.s

 // RUN: rm %t.o %t2
 // Test case for Cortex-A53 Erratum 843419 in an OutputSection exceeding
 // the maximum branch range. Both range extension thunks and patches are
 // required.                
                   
 // CHECK1:  <__AArch64AbsLongThunk_need_thunk_after_patch>:
 // CHECK1-NEXT:    210000:       58000050        ldr     x16, 0x210008
 // CHECK1-NEXT:    210004:       d61f0200        br      x16
-// CHECK1: <$d>:
 // CHECK1-NEXT:    210008:       0c 10 21 08     .word   0x0821100c
 
         .section .text.01, "ax", %progbits
         .balign 4096
         .globl _start
         .type _start, %function
 _start:
         // Expect thunk on pass 2

lld/test/ELF/aarch64-jump26-thunk.s

 
 // CHECK: Disassembly of section .text:
 // CHECK-EMPTY:
 // CHECK-NEXT: <_start>:
 // CHECK-NEXT:    210120:       b       0x210124
 // CHECK: <__AArch64AbsLongThunk_big>:
 // CHECK-NEXT:    210124:       ldr     x16, 0x21012c
 // CHECK-NEXT:    210128:       br      x16
-// CHECK: <$d>:
 // CHECK-NEXT:    21012c:       00 00 00 00     .word   0x00000000
 // CHECK-NEXT:    210130:       10 00 00 00     .word   0x00000010

lld/test/ELF/aarch64-range-thunk-extension-plt32.s

 // The word should be an offset to the range extension thunk.
 // CHECK-LABEL: <_start>:
 // CHECK-NEXT:    10000:       04 00 00 00     .word   0x00000004
 
 // The thunk redirects to the address of callee.
 // CHECK-LABEL: <__AArch64AbsLongThunk_callee>:
 // CHECK-NEXT:    10004:       ldr     x16, 0x1000c <__AArch64AbsLongThunk_callee+0x8>
 // CHECK-NEXT:    10008:       br      x16
-
-// CHECK-LABEL: <$d>:
 // CHECK-NEXT:    1000c:       00 00 00 00     .word   0x00000000
 // CHECK-NEXT:    10010:       02 00 00 00     .word   0x00000002
 
 // CHECK-LABEL: <callee>:
 // CHECK-NEXT:    200000000:      ret
 
   .section .text.1, "ax", %progbits
   .global _start

lld/test/ELF/aarch64-relocs.s

 mystr:
   .asciz "blah"
   .size mystr, 4
 
 # PAGE(S + A) - PAGE(P) = PAGE(210136) - PAGE(0x210132) = 0
 #
 # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_HI21:
 # CHECK-EMPTY:
-# CHECK-NEXT: <$x.2>:
+# CHECK-NEXT: <.R_AARCH64_ADR_PREL_PG_HI21>:
 # CHECK-NEXT:   210132:       90000001        adrp    x1, 0x210000
 
 .section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits
   add x0, x0, :lo12:.L.str
 .L.str:
   .asciz "blah"
   .size mystr, 4
 
 # S = 0x21013b, A = 0x4
 # R = (S + A) & 0xFFF = 319
 #
 # CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
 # CHECK-EMPTY:
-# CHECK-NEXT: <$x.4>:
+# CHECK-NEXT: <.R_AARCH64_ADD_ABS_LO12_NC>:
 # CHECK-NEXT:   21013b:       9104fc00        add     x0, x0, #319
 
 .section .R_AARCH64_LDST64_ABS_LO12_NC,"ax",@progbits
   ldr x28, [x27, :lo12:foo]
 foo:
   .asciz "foo"
   .size mystr, 3
 
 # S = 0x210144, A = 0x4
 # R = ((S + A) & 0xFFF) << 7 = 0x0000a400
 # 0x0000a400 | 0xf940177c = 0xf940a77c
 # CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
 # CHECK-EMPTY:
-# CHECK-NEXT: <$x.6>:
+# CHECK-NEXT: <.R_AARCH64_LDST64_ABS_LO12_NC>:
 # CHECK-NEXT:   210144:       f940a77c        ldr     x28, [x27, #328]
 
 .section .SUB,"ax",@progbits
   nop
 sub:
   nop
 
 # CHECK: Disassembly of section .SUB:
 # CHECK-EMPTY:
-# CHECK-NEXT: <$x.8>:
+# CHECK-NEXT: <.SUB>:
 # CHECK-NEXT:   21014c:       d503201f        nop
 # CHECK: <sub>:
 # CHECK-NEXT:   210150:       d503201f        nop
 
 .section .R_AARCH64_CALL26,"ax",@progbits
 call26:
         bl sub
 

lld/test/ELF/aarch64-thunk-reuse2.s

 # REQUIRES: aarch64
 # RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
 # RUN: ld.lld -pie -Ttext=0x10300 %t.o -o %t
 # RUN: llvm-objdump --no-print-imm-hex -d --no-show-raw-insn --disassemble-symbols=dest,__AArch64ADRPThunk_,high %t | FileCheck %s
 
 ## We create initial ThunkSection before the gap. Because the ThunkSection
 ## selection code isn't so precise, we may create an unused thunk there (0x10704).
 ## In the next pass we will create a ThunkSection after the gap. There used to be
 ## a bug reusing the first ThunkSection (unreachable) due to the large r_addend.
 # CHECK:       <dest>:
 # CHECK-NEXT:     10700:       ret
 # CHECK:       <__AArch64ADRPThunk_>:
 # CHECK-NEXT:     10704:       b       0x10700 <dest>
-# CHECK-EMPTY:
 # CHECK:       <__AArch64ADRPThunk_>:
 # CHECK-NEXT:   8010708:       adrp    x16, 0x10000
 # CHECK-NEXT:                  add     x16, x16, #1792
 # CHECk-NEXT:                  br      x16
 # CHECK-LABEL: <high>:
 # CHECK-NEXT:   8010714:       bl      0x8010708 <__AArch64ADRPThunk_>
 # CHECK-NEXT:                  b       0x8010708 <__AArch64ADRPThunk_>
 

lld/test/ELF/arm-bl-v4.s

_start:
   mov pc, lr
 
 // FAR-LABEL: <_start>:
 // FAR-NEXT:   1000000:       bl  0x1000008 <__ARMv5LongLdrPcThunk_target> @ imm = #0
 // FAR-NEXT:                  mov pc, lr
 // FAR-EMPTY:
 // FAR-NEXT:  <__ARMv5LongLdrPcThunk_target>:
 // FAR-NEXT:   1000008:       ldr pc, [pc, #-4]           @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4>
-// FAR-EMPTY:
-// FAR-NEXT:  <$d>:
 // FAR-NEXT:   100000c: 00 00 00 06   .word 0x06000000
 
 // FAR-EB-LABEL: <_start>:
 // FAR-EB-NEXT:   1000000:        bl  0x1000008 <__ARMv5LongLdrPcThunk_target> @ imm = #0
 // FAR-EB-NEXT:                 mov pc, lr
 // FAR-EB-EMPTY:
 // FAR-EB-NEXT:  <__ARMv5LongLdrPcThunk_target>:
 // FAR-EB-NEXT:   1000008:        ldr pc, [pc, #-4]           @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4>
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$d>:
 // FAR-EB-NEXT:   100000c: 06 00 00 00    .word 0x06000000
 
 // FAR-PIE-LABEL: <_start>:
 // FAR-PIE-NEXT:   1000000:       bl  0x1000008 <__ARMv4PILongThunk_target> @ imm = #0
 // FAR-PIE-NEXT:                  mov pc, lr
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <__ARMv4PILongThunk_target>:
 // FAR-PIE-NEXT:   1000008:       ldr r12, [pc]               @ 0x1000010 <__ARMv4PILongThunk_target+0x8>
 // FAR-PIE-NEXT:                  add pc, pc, r12
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$d>:
 // FAR-PIE-NEXT:   1000010: ec ff ff 04   .word 0x04ffffec
 
 // FAR-EB-PIE-LABEL: <_start>:
 // FAR-EB-PIE-NEXT:   1000000:        bl  0x1000008 <__ARMv4PILongThunk_target> @ imm = #0
 // FAR-EB-PIE-NEXT:                 mov pc, lr
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <__ARMv4PILongThunk_target>:
 // FAR-EB-PIE-NEXT:   1000008:        ldr r12, [pc]               @ 0x1000010 <__ARMv4PILongThunk_target+0x8>
 // FAR-EB-PIE-NEXT:                 add pc, pc, r12
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$d>:
 // FAR-EB-PIE-NEXT:   1000010: 04 ff ff ec    .word 0x04ffffec
 
 // NEAR-LABEL: <_start>:
 // NEAR-NEXT:  1000000:       bl 0x1000008 <target> @ imm = #0
 // NEAR-NEXT:                 mov pc, lr
 
 .section .high, "ax", %progbits
  .arm

lld/test/ELF/arm-bl-v4t.s

 // FAR-EMPTY:
 // FAR-LABEL: <thumb_start>:
 // FAR-NEXT:   1000008:       bl  0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #12
 // FAR-NEXT:                  bx  lr
 // FAR-NEXT:                  bmi 0xffffba                @ imm = #-88
 // FAR-EMPTY:
 // FAR-NEXT:  <__ARMv5LongLdrPcThunk_target>:
 // FAR-NEXT:   1000010:       ldr pc, [pc, #-4]           @ 0x1000014 <__ARMv5LongLdrPcThunk_target+0x4>
-// FAR-EMPTY: 
-// FAR-NEXT:  <$d>:
 // FAR-NEXT:   1000014: 00 00 00 06   .word 0x06000000
 // FAR-EMPTY:
 // FAR-NEXT:  <__Thumbv4ABSLongThunk_thumb_target>:
 // FAR-NEXT:   1000018:       bx  pc
 // FAR-NEXT:                  b 0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #-6
-// FAR-EMPTY:
-// FAR-NEXT:  <$a>:
 // FAR-NEXT:   100001c:       ldr r12, [pc]               @ 0x1000024 <__Thumbv4ABSLongThunk_thumb_target+0xc>
 // FAR-NEXT:                  bx  r12
-// FAR-EMPTY:
-// FAR-NEXT:  <$d>:
 // FAR-NEXT:   1000024: 05 00 00 06   .word 0x06000005
 
 // FAR-EB-LABEL: <_start>:
 // FAR-EB-NEXT:   1000000:        bl  0x1000010 <__ARMv5LongLdrPcThunk_target> @ imm = #8
 // FAR-EB-NEXT:                 bx  lr
 // FAR-EB-EMPTY:
 // FAR-EB-LABEL: <thumb_start>:
 // FAR-EB-NEXT:   1000008:        bl  0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #12
 // FAR-EB-NEXT:                 bx  lr
 // FAR-EB-NEXT:                 bmi 0xffffba                @ imm = #-88
 // FAR-EB-EMPTY:
 // FAR-EB-NEXT:  <__ARMv5LongLdrPcThunk_target>:
 // FAR-EB-NEXT:   1000010:        ldr pc, [pc, #-4]           @ 0x1000014 <__ARMv5LongLdrPcThunk_target+0x4>
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$d>:
 // FAR-EB-NEXT:   1000014: 06 00 00 00    .word 0x06000000
 // FAR-EB-EMPTY:
 // FAR-EB-NEXT:  <__Thumbv4ABSLongThunk_thumb_target>:
 // FAR-EB-NEXT:   1000018:        bx  pc
 // FAR-EB-NEXT:                 b 0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #-6
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$a>:
 // FAR-EB-NEXT:   100001c:        ldr r12, [pc]               @ 0x1000024 <__Thumbv4ABSLongThunk_thumb_target+0xc>
 // FAR-EB-NEXT:                 bx  r12
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$d>:
 // FAR-EB-NEXT:   1000024: 06 00 00 05    .word 0x06000005
 
 // FAR-PIE-LABEL: <_start>:
 // FAR-PIE-NEXT:   1000000:       bl  0x1000010 <__ARMv4PILongThunk_target> @ imm = #8
 // FAR-PIE-NEXT:                  bx  lr
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <thumb_start>:
 // FAR-PIE-NEXT:   1000008:       bl  0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #16
 // FAR-PIE-NEXT:                  bx  lr
 // FAR-PIE-NEXT:                  bmi 0xffffba                @ imm = #-88
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <__ARMv4PILongThunk_target>:
 // FAR-PIE-NEXT:   1000010:       ldr r12, [pc]               @ 0x1000018 <__ARMv4PILongThunk_target+0x8>
 // FAR-PIE-NEXT:                  add pc, pc, r12
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$d>:
 // FAR-PIE-NEXT:   1000018: e4 ff ff 04   .word 0x04ffffe4
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <__Thumbv4PILongThunk_thumb_target>:
 // FAR-PIE-NEXT:   100001c:       bx  pc
 // FAR-PIE-NEXT:                  b 0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #-6
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$a>:
 // FAR-PIE-NEXT:   1000020:       ldr r12, [pc, #4]           @ 0x100002c <__Thumbv4PILongThunk_thumb_target+0x10>
 // FAR-PIE-NEXT:                  add r12, pc, r12
 // FAR-PIE-NEXT:                  bx  r12
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$d>:
 // FAR-PIE-NEXT:   100002c: d9 ff ff 04   .word 0x04ffffd9
 
 // FAR-EB-PIE-LABEL: <_start>:
 // FAR-EB-PIE-NEXT:   1000000:        bl  0x1000010 <__ARMv4PILongThunk_target> @ imm = #8
 // FAR-EB-PIE-NEXT:                 bx  lr
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <thumb_start>:
 // FAR-EB-PIE-NEXT:   1000008:        bl  0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #16
 // FAR-EB-PIE-NEXT:                 bx  lr
 // FAR-EB-PIE-NEXT:                 bmi 0xffffba                @ imm = #-88
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <__ARMv4PILongThunk_target>:
 // FAR-EB-PIE-NEXT:   1000010:        ldr r12, [pc]               @ 0x1000018 <__ARMv4PILongThunk_target+0x8>
 // FAR-EB-PIE-NEXT:                 add pc, pc, r12
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$d>:
 // FAR-EB-PIE-NEXT:   1000018: 04 ff ff e4    .word 0x04ffffe4
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <__Thumbv4PILongThunk_thumb_target>:
 // FAR-EB-PIE-NEXT:   100001c:        bx  pc
 // FAR-EB-PIE-NEXT:                 b 0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #-6
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$a>:
 // FAR-EB-PIE-NEXT:   1000020:        ldr r12, [pc, #4]           @ 0x100002c <__Thumbv4PILongThunk_thumb_target+0x10>
 // FAR-EB-PIE-NEXT:                 add r12, pc, r12
 // FAR-EB-PIE-NEXT:                 bx  r12
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$d>:
 // FAR-EB-PIE-NEXT:   100002c: 04 ff ff d9    .word 0x04ffffd9
 
 // NEAR-LABEL: <_start>:
 // NEAR-NEXT:  1000000:       bl  0x1000010 <target> @ imm = #8
 // NEAR-NEXT:                 bx  lr
 // NEAR-EMPTY:
 // NEAR-LABEL: <thumb_start>:
 // NEAR-NEXT:  1000008:       bl  0x1000014 <thumb_target> @ imm = #8

lld/test/ELF/arm-bl-v6.s

 // CHECK-THUMB1-NEXT:    21008: f200 e800     blx 0x22100c <__ARMv5LongLdrPcThunk_farthumbfunc>
 /// 6 Megabytes, enough to make farthumbfunc out of range of caller
 /// on a v6 Arm, but not on a v7 Arm.
 
  .section .text.3, "ax", %progbits
  .space 0x200000
 // CHECK-ARM2: <__ARMv5LongLdrPcThunk_farthumbfunc>:
 // CHECK-ARM2-NEXT:   22100c:   e51ff004        ldr     pc, [pc, #-4]
-// CHECK-ARM2: <$d>:
 // CHECK-ARM2-NEXT:   221010:   01 20 62 00     .word   0x00622001
 // CHECK-ARM2-EB: <__ARMv5LongLdrPcThunk_farthumbfunc>:
 // CHECK-ARM2-EB-NEXT:   22100c:   e51ff004        ldr     pc, [pc, #-4]
-// CHECK-ARM2-EB: <$d>:
 // CHECK-ARM2-EB-NEXT:   221010:   00 62 20 01     .word   0x00622001
  .section .text.4, "ax", %progbits
  .space 0x200000
 
  .section .text.5, "ax", %progbits
  .space 0x200000
 
  .thumb
  .section .text.6, "ax", %progbits
  .balign 0x1000
  .globl farthumbfunc
  .type farthumbfunc,%function
 farthumbfunc:
  bx lr
 // CHECK-THUMB2: <farthumbfunc>:
 // CHECK-THUMB2-NEXT:   622000:        4770    bx      lr

lld/test/ELF/arm-bx-v4t.s

 
 // FAR-LABEL: <_start>:
 // FAR-NEXT:   1000000:       bl      0x1000008 <__ARMv4ABSLongBXThunk_target> @ imm = #0
 // FAR-NEXT:                  bx      lr
 // FAR-EMPTY:
 // FAR-NEXT:  <__ARMv4ABSLongBXThunk_target>:
 // FAR-NEXT:   1000008:       ldr     r12, [pc]               @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8>
 // FAR-NEXT:                  bx      r12
-// FAR-EMPTY:
-// FAR-NEXT:  <$d>:
 // FAR-NEXT:   1000010: 01 00 00 06   .word   0x06000001
 
 // FAR-EB-LABEL: <_start>:
 // FAR-EB-NEXT:   1000000:       bl      0x1000008 <__ARMv4ABSLongBXThunk_target> @ imm = #0
 // FAR-EB-NEXT:                  bx      lr
 // FAR-EB-EMPTY:
 // FAR-EB-NEXT:  <__ARMv4ABSLongBXThunk_target>:
 // FAR-EB-NEXT:   1000008:       ldr     r12, [pc]               @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8>
 // FAR-EB-NEXT:                  bx      r12
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$d>:
 // FAR-EB-NEXT:   1000010: 06 00 00 01   .word   0x06000001
 
 // NEAR-LABEL: <_start>:
 // NEAR-NEXT:   1000000:       bl      0x1000008 <__ARMv4ABSLongBXThunk_target> @ imm = #0
 // NEAR-NEXT:                  bx      lr
 // NEAR-EMPTY:
 // NEAR-NEXT:  <__ARMv4ABSLongBXThunk_target>:
 // NEAR-NEXT:   1000008:       ldr     r12, [pc]               @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8>
 // NEAR-NEXT:                  bx      r12
-// NEAR-EMPTY:
-// NEAR-NEXT:  <$d>:
 // NEAR-NEXT:  1000010: 15 00 00 01   .word   0x01000015
 
 // NEAR-EB-LABEL: <_start>:
 // NEAR-EB-NEXT:   1000000:       bl      0x1000008 <__ARMv4ABSLongBXThunk_target> @ imm = #0
 // NEAR-EB-NEXT:                  bx      lr
 // NEAR-EB-EMPTY:
 // NEAR-EB-NEXT:  <__ARMv4ABSLongBXThunk_target>:
 // NEAR-EB-NEXT:   1000008:       ldr     r12, [pc]               @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8>
 // NEAR-EB-NEXT:                  bx      r12
-// NEAR-EB-EMPTY:
-// NEAR-EB-NEXT:  <$d>:
 // NEAR-EB-NEXT:  1000010: 01 00 00 15   .word   0x01000015
 
 // FAR-PIE-LABEL: <_start>:
 // FAR-PIE-NEXT:   1000000:     bl  0x1000008 <__ARMv4PILongBXThunk_target> @ imm = #0
 // FAR-PIE-NEXT:                bx  lr
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <__ARMv4PILongBXThunk_target>:
 // FAR-PIE-NEXT:   1000008:     ldr r12, [pc, #4]           @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc>
 // FAR-PIE-NEXT:                add r12, pc, r12
 // FAR-PIE-NEXT:                bx  r12
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$d>:
 // FAR-PIE-NEXT:   1000014: ed ff ff 04   .word 0x04ffffed
 
 // FAR-EB-PIE-LABEL: <_start>:
 // FAR-EB-PIE-NEXT:   1000000:      bl  0x1000008 <__ARMv4PILongBXThunk_target> @ imm = #0
 // FAR-EB-PIE-NEXT:                 bx  lr
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <__ARMv4PILongBXThunk_target>:
 // FAR-EB-PIE-NEXT:   1000008:     ldr  r12, [pc, #4]           @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc>
 // FAR-EB-PIE-NEXT:                add  r12, pc, r12
 // FAR-EB-PIE-NEXT:                bx r12
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$d>:
 // FAR-EB-PIE-NEXT:   1000014: 04 ff ff ed    .word 0x04ffffed
 
 // NEAR-PIE-LABEL: <_start>:
 // NEAR-PIE-NEXT:   1000000:    bl  0x1000008 <__ARMv4PILongBXThunk_target> @ imm = #0
 // NEAR-PIE-NEXT:               bx  lr
 // NEAR-PIE-EMPTY:
 // NEAR-PIE-NEXT:  <__ARMv4PILongBXThunk_target>:
 // NEAR-PIE-NEXT:   1000008:    ldr r12, [pc, #4]           @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc>
 // NEAR-PIE-NEXT:               add r12, pc, r12
 // NEAR-PIE-NEXT:               bx  r12
-// NEAR-PIE-EMPTY:
-// NEAR-PIE-NEXT:  <$d>:
 // NEAR-PIE-NEXT:   1000014: 05 00 00 00    .word 0x00000005
 
 // NEAR-EB-PIE-LABEL: <_start>:
 // NEAR-EB-PIE-NEXT:   1000000:    bl 0x1000008 <__ARMv4PILongBXThunk_target> @ imm = #0
 // NEAR-EB-PIE-NEXT:               bx lr
 // NEAR-EB-PIE-EMPTY:
 // NEAR-EB-PIE-NEXT:  <__ARMv4PILongBXThunk_target>:
 // NEAR-EB-PIE-NEXT:   1000008:    ldr  r12, [pc, #4]           @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc>
 // NEAR-EB-PIE-NEXT:               add  r12, pc, r12
 // NEAR-EB-PIE-NEXT:               bx r12
-// NEAR-EB-PIE-EMPTY:
-// NEAR-EB-PIE-NEXT:  <$d>:
 // NEAR-EB-PIE-NEXT:   1000014: 00 00 00 05   .word 0x00000005
 
 .section .high, "ax", %progbits
 .thumb
  .globl target
  .type target,%function
 target:
   bl _start
   bx lr
 
 // FAR-LABEL: <target>:
 // FAR-NEXT:   6000000:       bl      0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #4
 // FAR-NEXT:                  bx      lr
 // FAR-NEXT:                  bmi     0x5ffffb2 <__ARMv4ABSLongBXThunk_target+0x4ffffaa> @ imm = #-88
 // FAR-EMPTY:
 // FAR-NEXT:  <__Thumbv4ABSLongBXThunk__start>:
 // FAR-NEXT:   6000008:       bx      pc
 // FAR-NEXT:                  b       0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #-6
-// FAR-EMPTY:
-// FAR-NEXT:  <$a>:
 // FAR-NEXT:   600000c:       ldr     pc, [pc, #-4]           @ 0x6000010 <__Thumbv4ABSLongBXThunk__start+0x8>
-// FAR-EMPTY:
-// FAR-NEXT: <$d>:
 // FAR-NEXT:  6000010: 00 00 00 01   .word   0x01000000
 
 // FAR-EB-LABEL: <target>:
 // FAR-EB-NEXT:   6000000:       bl      0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #4
 // FAR-EB-NEXT:                  bx      lr
 // FAR-EB-NEXT:                  bmi     0x5ffffb2 <__ARMv4ABSLongBXThunk_target+0x4ffffaa> @ imm = #-88
 // FAR-EB-EMPTY:
 // FAR-EB-NEXT:  <__Thumbv4ABSLongBXThunk__start>:
 // FAR-EB-NEXT:   6000008:       bx      pc
 // FAR-EB-NEXT:                  b       0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #-6
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT:  <$a>:
 // FAR-EB-NEXT:   600000c:       ldr     pc, [pc, #-4]           @ 0x6000010 <__Thumbv4ABSLongBXThunk__start+0x8>
-// FAR-EB-EMPTY:
-// FAR-EB-NEXT: <$d>:
 // FAR-EB-NEXT:  6000010: 01 00 00 00   .word   0x01000000
 
 // NEAR-LABEL: <target>:
 // NEAR-NEXT:   1000014:       bl      0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #4
 // NEAR-NEXT:                  bx      lr
 // NEAR-NEXT:                  bmi     0xffffc6                @ imm = #-88
 // NEAR-EMPTY:
 // NEAR-NEXT:  <__Thumbv4ABSLongBXThunk__start>:
 // NEAR-NEXT:   100001c:       bx      pc
 // NEAR-NEXT:                  b       0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #-6
-// NEAR-EMPTY:
-// NEAR-NEXT:  <$a>:
 // NEAR-NEXT:   1000020:       ldr     pc, [pc, #-4]           @ 0x1000024 <__Thumbv4ABSLongBXThunk__start+0x8>
-// NEAR-EMPTY:
-// NEAR-NEXT:  <$d>:
 // NEAR-NEXT:   1000024: 00 00 00 01   .word   0x01000000
 
 // NEAR-EB-LABEL: <target>:
 // NEAR-EB-NEXT:   1000014:       bl      0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #4
 // NEAR-EB-NEXT:                  bx      lr
 // NEAR-EB-NEXT:                  bmi     0xffffc6                @ imm = #-88
 // NEAR-EB-EMPTY:
 // NEAR-EB-NEXT:  <__Thumbv4ABSLongBXThunk__start>:
 // NEAR-EB-NEXT:   100001c:       bx      pc
 // NEAR-EB-NEXT:                  b       0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #-6
-// NEAR-EB-EMPTY:
-// NEAR-EB-NEXT:  <$a>:
 // NEAR-EB-NEXT:   1000020:       ldr     pc, [pc, #-4]           @ 0x1000024 <__Thumbv4ABSLongBXThunk__start+0x8>
-// NEAR-EB-EMPTY:
-// NEAR-EB-NEXT:  <$d>:
 // NEAR-EB-NEXT:   1000024: 01 00 00 00   .word   0x01000000
 
 // FAR-PIE-LABEL: <target>:
 // FAR-PIE-NEXT:   6000000:         bl  0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #4
 // FAR-PIE-NEXT:                  bx  lr
 // FAR-PIE-NEXT:                  bmi 0x5ffffb2 <__ARMv4PILongBXThunk_target+0x4ffffaa> @ imm = #-88
 // FAR-PIE-EMPTY:
 // FAR-PIE-NEXT:  <__Thumbv4PILongBXThunk__start>:
 // FAR-PIE-NEXT:   6000008:       bx  pc
 // FAR-PIE-NEXT:                  b 0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #-6
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$a>:
 // FAR-PIE-NEXT:   600000c:       ldr r12, [pc]               @ 0x6000014 <__Thumbv4PILongBXThunk__start+0xc>
 // FAR-PIE-NEXT:                  add pc, r12, pc
-// FAR-PIE-EMPTY:
-// FAR-PIE-NEXT:  <$d>:
 // FAR-PIE-NEXT:   6000014: e8 ff ff fa   .word 0xfaffffe8
 
 // FAR-EB-PIE-LABEL: <target>:
 // FAR-EB-PIE-NEXT:   6000000:        bl  0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #4
 // FAR-EB-PIE-NEXT:                 bx  lr
 // FAR-EB-PIE-NEXT:                 bmi 0x5ffffb2 <__ARMv4PILongBXThunk_target+0x4ffffaa> @ imm = #-88
 // FAR-EB-PIE-EMPTY:
 // FAR-EB-PIE-NEXT:  <__Thumbv4PILongBXThunk__start>:
 // FAR-EB-PIE-NEXT:   6000008:        bx  pc
 // FAR-EB-PIE-NEXT:                 b 0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #-6
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$a>:
 // FAR-EB-PIE-NEXT:   600000c:        ldr r12, [pc]               @ 0x6000014 <__Thumbv4PILongBXThunk__start+0xc>
 // FAR-EB-PIE-NEXT:                 add pc, r12, pc
-// FAR-EB-PIE-EMPTY:
-// FAR-EB-PIE-NEXT:  <$d>:
 // FAR-EB-PIE-NEXT:   6000014: fa ff ff e8    .word 0xfaffffe8
 
 // NEAR-PIE-LABEL: <target>:
 // NEAR-PIE-NEXT:   1000018:        bl  0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #4
 // NEAR-PIE-NEXT:                 bx  lr
 // NEAR-PIE-NEXT:                 bmi 0xffffca                @ imm = #-88
 // NEAR-PIE-EMPTY:
 // NEAR-PIE-NEXT:  <__Thumbv4PILongBXThunk__start>:
 // NEAR-PIE-NEXT:   1000020:        bx  pc
 // NEAR-PIE-NEXT:                 b 0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #-6
-// NEAR-PIE-EMPTY:
-// NEAR-PIE-NEXT:  <$a>:
 // NEAR-PIE-NEXT:   1000024:        ldr r12, [pc]               @ 0x100002c <__Thumbv4PILongBXThunk__start+0xc>
 // NEAR-PIE-NEXT:                 add pc, r12, pc
-// NEAR-PIE-EMPTY:
-// NEAR-PIE-NEXT:  <$d>:
 // NEAR-PIE-NEXT:   100002c: d0 ff ff ff    .word 0xffffffd0
 
 // NEAR-EB-PIE-LABEL: <target>:
 // NEAR-EB-PIE-NEXT:   1000018:       bl  0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #4
 // NEAR-EB-PIE-NEXT:                bx  lr
 // NEAR-EB-PIE-NEXT:                bmi 0xffffca                @ imm = #-88
 // NEAR-EB-PIE-EMPTY:
 // NEAR-EB-PIE-NEXT:  <__Thumbv4PILongBXThunk__start>:
 // NEAR-EB-PIE-NEXT:   1000020:       bx  pc
 // NEAR-EB-PIE-NEXT:                b 0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #-6
-// NEAR-EB-PIE-EMPTY:
-// NEAR-EB-PIE-NEXT:  <$a>:
 // NEAR-EB-PIE-NEXT:   1000024:       ldr r12, [pc]               @ 0x100002c <__Thumbv4PILongBXThunk__start+0xc>
 // NEAR-EB-PIE-NEXT:                add pc, r12, pc
-// NEAR-EB-PIE-EMPTY:
-// NEAR-EB-PIE-NEXT:  <$d>:
 // NEAR-EB-PIE-NEXT:   100002c: ff ff ff d0   .word 0xffffffd0
 
 #--- far.lds
 SECTIONS {
   . = SIZEOF_HEADERS;
   .low 0x01000000 : { *(.low) }
   .high 0x06000000 : { *(.high) }
 }
 
 #--- near.lds
 SECTIONS {
   . = SIZEOF_HEADERS;
   .all 0x01000000 : { *(.low) *(.high) }
 }

lld/test/ELF/arm-fpic-got.s

 
 // CODE: Disassembly of section .text:
 // CODE-EMPTY:
 // CODE-NEXT: <_start>:
 // CODE-NEXT:   20114:       ldr     r0, [pc, #8]
 // CODE-NEXT:   20118:       ldr     r0, [pc, r0]
 // CODE-NEXT:   2011c:       ldr     r0, [r0]
 // CODE-NEXT:   20120:       bx      lr
-// CODE: <$d.1>:
 // 0x11124 + 0x1008 + 8 = 0x12128 = .got
 // CODE-NEXT:   20124:       08 00 01 00

lld/test/ELF/arm-gnu-ifunc-plt.s

 // DISASM-EMPTY:
 // DISASM-NEXT: <foo>:
 // DISASM-NEXT:    201dc:       bx      lr
 // DISASM: <bar>:
 // DISASM-NEXT:    201e0:       bx      lr
 // DISASM: <_start>:
 // DISASM-NEXT:    201e4:       bl      0x20240
 // DISASM-NEXT:    201e8:       bl      0x20250
-// DISASM: <$d.1>:
 // DISASM-NEXT:    201ec:       00 00 00 00     .word   0x00000000
 // DISASM-NEXT:    201f0:       04 00 00 00     .word   0x00000004
 // DISASM:         201f4:       bl      0x20220
 // DISASM-NEXT:    201f8:       bl      0x20230
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .plt:
 // DISASM-EMPTY:
-// DISASM-NEXT: <$a>:
+// DISASM-NEXT: <.plt>:
 // DISASM-NEXT:    20200:       str     lr, [sp, #-4]!
 // DISASM-NEXT:    20204:       add     lr, pc, #0, #12
 // DISASM-NEXT:    20208:       add     lr, lr, #32
 // DISASM-NEXT:    2020c:       ldr     pc, [lr, #236]!
-// DISASM: <$d>:
 // DISASM-NEXT:    20210:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DISASM-NEXT:    20214:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DISASM-NEXT:    20218:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DISASM-NEXT:    2021c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DISASM: <$a>:
 // DISASM-NEXT:    20220:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20224:       add     r12, r12, #32
 // DISASM-NEXT:    20228:       ldr     pc, [r12, #212]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2022c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DISASM: <$a>:
 // DISASM-NEXT:    20230:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20234:       add     r12, r12, #32
 // DISASM-NEXT:    20238:       ldr     pc, [r12, #200]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2023c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DISASM: <$a>:
+// DISASM:       <.iplt>:
 // DISASM-NEXT:    20240:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20244:       add     r12, r12, #16
 // DISASM-NEXT:    20248:       ldr     pc, [r12, #160]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2024c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DISASM: <$a>:
 // DISASM-NEXT:    20250:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20254:       add     r12, r12, #16
 // DISASM-NEXT:    20258:       ldr     pc, [r12, #148]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2025c: d4 d4 d4 d4   .word 0xd4d4d4d4
 
 .syntax unified
 .text
 .type foo STT_GNU_IFUNC
 .globl foo
 foo:
  bx lr

lld/test/ELF/arm-gnu-ifunc.s

 // DISASM-NEXT:    20114:      movw    r0, #244
 // DISASM-NEXT:    20118:      movt    r0, #1
 // 1 * 65536 + 260 = 0x10104 __rel_iplt_end
 // DISASM-NEXT:    2011c:      movw    r0, #260
 // DISASM-NEXT:    20120:      movt    r0, #1
 // DISASM-EMPTY:
 // DISASM-NEXT: Disassembly of section .iplt:
 // DISASM-EMPTY:
-// DISASM-NEXT: <$a>:
+// DISASM-NEXT: <.iplt>:
 // DISASM-NEXT:    20130:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20134:       add     r12, r12, #16
 // DISASM-NEXT:    20138:       ldr     pc, [r12, #24]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2013c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DISASM: <$a>:
 // DISASM-NEXT:    20140:       add     r12, pc, #0, #12
 // DISASM-NEXT:    20144:       add     r12, r12, #16
 // DISASM-NEXT:    20148:       ldr     pc, [r12, #12]!
-// DISASM: <$d>:
 // DISASM-NEXT:    2014c:       d4 d4 d4 d4     .word   0xd4d4d4d4

lld/test/ELF/arm-got-relative.s

 
 // CODE: Disassembly of section .text:
 // CODE-EMPTY:
 // CODE-NEXT: <_start>:
 // CODE-NEXT:    101a0:        e59f3008       ldr     r3, [pc, #8]
 // CODE-NEXT:    101a4:        e59f2008       ldr     r2, [pc, #8]
 // CODE-NEXT:    101a8:        e08f0003       add     r0, pc, r3
 // CODE-NEXT:    101ac:        e12fff1e       bx      lr
-// CODE: <$d.1>:
 // (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c
 // CODE-NEXT:    101b0:        5c 00 01 00
 // (Got(function) - GotBase = 0x0
 // CODE-NEXT:    101b4:        00 00 00 00

lld/test/ELF/arm-plt-reloc.s

 // DSO-NEXT:     1021c:       bx      lr
 // DSO: <_start>:
 // DSO-NEXT:     10220:       b       0x10250
 // DSO-NEXT:     10224:       bl      0x10260
 // DSO-NEXT:     10228:       beq     0x10270
 // DSO-EMPTY:
 // DSO-NEXT: Disassembly of section .plt:
 // DSO-EMPTY:
-// DSO-NEXT: <$a>:
+// DSO-NEXT: <.plt>:
 // DSO-NEXT:     10230:       str     lr, [sp, #-4]!
 // (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2]
 // DSO-NEXT:     10234:       add     lr, pc, #0, #12
 // DSO-NEXT:     10238:       add     lr, lr, #32, #20
 // DSO-NEXT:     1023c:       ldr     pc, [lr, #164]!
-// DSO: <$d>:
 // DSO-NEXT:     10240:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     10244:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     10248:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     1024c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4
 // DSO-NEXT:     10250:       add     r12, pc, #0, #12
 // DSO-NEXT:     10254:       add     r12, r12, #32, #20
 // DSO-NEXT:     10258:       ldr     pc, [r12, #140]!
-// DSO: <$d>:
 // DSO-NEXT:     1025c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8
 // DSO-NEXT:     10260:       add     r12, pc, #0, #12
 // DSO-NEXT:     10264:       add     r12, r12, #32, #20
 // DSO-NEXT:     10268:       ldr     pc, [r12, #128]!
-// DSO: <$d>:
 // DSO-NEXT:     1026c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec
 // DSO-NEXT:     10270:       add     r12, pc, #0, #12
 // DSO-NEXT:     10274:       add     r12, r12, #32, #20
 // DSO-NEXT:     10278:       ldr     pc, [r12, #116]!
-// DSO: <$d>:
 // DSO-NEXT:     1027c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE

 // CHECKHIGH-NEXT:     1008:       bx      lr
 // CHECKHIGH: <_start>:
 // CHECKHIGH-NEXT:     100c:       b       0x2020
 // CHECKHIGH-NEXT:     1010:       bl      0x2030
 // CHECKHIGH-NEXT:     1014:       beq     0x2040
 // CHECKHIGH-EMPTY:
 // CHECKHIGH-NEXT: Disassembly of section .plt:
 // CHECKHIGH-EMPTY:
-// CHECKHIGH-NEXT: <$a>:
+// CHECKHIGH-NEXT: <.plt>:
 // CHECKHIGH-NEXT:     2000:       str     lr, [sp, #-4]!
 // CHECKHIGH-NEXT:     2004:       add     lr, pc, #16, #12
 // CHECKHIGH-NEXT:     2008:       add     lr, lr, #1036288
 // CHECKHIGH-NEXT:     200c:       ldr     pc, [lr, #4092]!
-// CHECKHIGH: <$d>:
 // CHECKHIGH-NEXT:     2010:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKHIGH-NEXT:     2014:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKHIGH-NEXT:     2018:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKHIGH-NEXT:     201c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKHIGH: <$a>:
 // CHECKHIGH-NEXT:     2020:       add     r12, pc, #16, #12
 // CHECKHIGH-NEXT:     2024:       add     r12, r12, #1036288
 // CHECKHIGH-NEXT:     2028:       ldr     pc, [r12, #4068]!
-// CHECKHIGH: <$d>:
 // CHECKHIGH-NEXT:     202c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKHIGH: <$a>:
 // CHECKHIGH-NEXT:     2030:       add     r12, pc, #16, #12
 // CHECKHIGH-NEXT:     2034:       add     r12, r12, #1036288
 // CHECKHIGH-NEXT:     2038:       ldr     pc, [r12, #4056]!
-// CHECKHIGH: <$d>:
 // CHECKHIGH-NEXT:     203c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKHIGH: <$a>:
 // CHECKHIGH-NEXT:     2040:       add     r12, pc, #16, #12
 // CHECKHIGH-NEXT:     2044:       add     r12, r12, #1036288
 // CHECKHIGH-NEXT:     2048:       ldr     pc, [r12, #4044]!
-// CHECKHIGH: <$d>:
 // CHECKHIGH-NEXT:     204c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // DSORELHIGH:     Name: .got.plt
 // DSORELHIGH-NEXT:     Type: SHT_PROGBITS
 // DSORELHIGH-NEXT:     Flags [
 // DSORELHIGH-NEXT:       SHF_ALLOC
 // DSORELHIGH-NEXT:       SHF_WRITE
 // DSORELHIGH-NEXT:     ]

 // CHECKLONG-NEXT:     1008:       bx      lr
 // CHECKLONG: <_start>:
 // CHECKLONG-NEXT:     100c:       b       0x2020
 // CHECKLONG-NEXT:     1010:       bl      0x2030
 // CHECKLONG-NEXT:     1014:       beq     0x2040
 // CHECKLONG-EMPTY:
 // CHECKLONG-NEXT: Disassembly of section .plt:
 // CHECKLONG-EMPTY:
-// CHECKLONG-NEXT: <$a>:
+// CHECKLONG-NEXT: <.plt>:
 // CHECKLONG-NEXT:     2000:       str     lr, [sp, #-4]!
 // CHECKLONG-NEXT:     2004:       ldr     lr, [pc, #4]
 // CHECKLONG-NEXT:     2008:       add     lr, pc, lr
 // CHECKLONG-NEXT:     200c:       ldr     pc, [lr, #8]!
-// CHECKLONG: <$d>:
 // CHECKLONG-NEXT:     2010:       f0 f0 10 11     .word   0x1110f0f0
 // CHECKLONG-NEXT:     2014:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKLONG-NEXT:     2018:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKLONG-NEXT:     201c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKLONG: <$a>:
 // CHECKLONG-NEXT:     2020:       ldr     r12, [pc, #4]
 // CHECKLONG-NEXT:     2024:       add     r12, r12, pc
 // CHECKLONG-NEXT:     2028:       ldr     pc, [r12]
-// CHECKLONG: <$d>:
 // CHECKLONG-NEXT:     202c:       e0 f0 10 11     .word   0x1110f0e0
-// CHECKLONG: <$a>:
 // CHECKLONG-NEXT:     2030:       ldr     r12, [pc, #4]
 // CHECKLONG-NEXT:     2034:       add     r12, r12, pc
 // CHECKLONG-NEXT:     2038:       ldr     pc, [r12]
-// CHECKLONG: <$d>:
 // CHECKLONG-NEXT:     203c:       d4 f0 10 11     .word   0x1110f0d4
-// CHECKLONG: <$a>:
 // CHECKLONG-NEXT:     2040:       ldr     r12, [pc, #4]
 // CHECKLONG-NEXT:     2044:       add     r12, r12, pc
 // CHECKLONG-NEXT:     2048:       ldr     pc, [r12]
-// CHECKLONG: <$d>:
 // CHECKLONG-NEXT:     204c:       c8 f0 10 11     .word   0x1110f0c8
 
 // CHECKLONG-EB: Disassembly of section .text:
 // CHECKLONG-EB-EMPTY:
 // CHECKLONG-EB-NEXT: <func1>:
 // CHECKLONG-EB-NEXT:     1000:       bx      lr
 // CHECKLONG-EB: <func2>:
 // CHECKLONG-EB-NEXT:                 bx      lr
 // CHECKLONG-EB: <func3>:
 // CHECKLONG-EB-NEXT:                 bx      lr
 // CHECKLONG-EB: <_start>:
 // CHECKLONG-EB-NEXT:                 b       0x2020
 // CHECKLONG-EB-NEXT:                 bl      0x2030
 // CHECKLONG-EB-NEXT:                 beq     0x2040
 // CHECKLONG-EB-EMPTY:
 // CHECKLONG-EB-NEXT: Disassembly of section .plt:
 // CHECKLONG-EB-EMPTY:
-// CHECKLONG-EB-NEXT: <$a>:
+// CHECKLONG-EB-NEXT: <.plt>:
 // CHECKLONG-EB-NEXT:     2000:       str     lr, [sp, #-4]!
 // CHECKLONG-EB-NEXT:                 ldr     lr, [pc, #4]
 // CHECKLONG-EB-NEXT:                 add     lr, pc, lr
 // CHECKLONG-EB-NEXT:                 ldr     pc, [lr, #8]!
-// CHECKLONG-EB: <$d>:
 // CHECKLONG-EB-NEXT:                 11 10 f0 f0     .word   0x1110f0f0
 // CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKLONG-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKLONG-EB: <$a>:
 // CHECKLONG-EB-NEXT:     2020:       ldr     r12, [pc, #4]
 // CHECKLONG-EB-NEXT:                 add     r12, r12, pc
 // CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
 // CHECKLONG-EB-NEXT:                 11 10 f0 e0     .word   0x1110f0e0
-// CHECKLONG-EB: <$a>:
 // CHECKLONG-EB-NEXT:     2030:       ldr     r12, [pc, #4]
 // CHECKLONG-EB-NEXT:                 add     r12, r12, pc
 // CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
 // CHECKLONG-EB-NEXT:                 11 10 f0 d4     .word   0x1110f0d4
-// CHECKLONG-EB: <$a>:
 // CHECKLONG-EB-NEXT:     2040:       ldr     r12, [pc, #4]
 // CHECKLONG-EB-NEXT:                 add     r12, r12, pc
 // CHECKLONG-EB-NEXT:                 ldr     pc, [r12]
-// CHECKLONG-EB: <$d>:
 // CHECKLONG-EB-NEXT:                11 10 f0 c8     .word   0x1110f0c8
 
 // DSORELLONG: Name: .got.plt
 // DSORELLONG-NEXT:     Type: SHT_PROGBITS
 // DSORELLONG-NEXT:     Flags [
 // DSORELLONG-NEXT:       SHF_ALLOC
 // DSORELLONG-NEXT:       SHF_WRITE
 // DSORELLONG-NEXT:     ]

 // CHECKMIX-NEXT:     1008:       bx      lr
 // CHECKMIX: <_start>:
 // CHECKMIX-NEXT:     100c:       b       0x2020
 // CHECKMIX-NEXT:     1010:       bl      0x2030
 // CHECKMIX-NEXT:     1014:       beq     0x2040
 // CHECKMIX-EMPTY:
 // CHECKMIX-NEXT: Disassembly of section .plt:
 // CHECKMIX-EMPTY:
-// CHECKMIX-NEXT: <$a>:
+// CHECKMIX-NEXT: <.plt>:
 // CHECKMIX-NEXT:     2000:       str     lr, [sp, #-4]!
 // CHECKMIX-NEXT:     2004:       ldr     lr, [pc, #4]
 // CHECKMIX-NEXT:     2008:       add     lr, pc, lr
 // CHECKMIX-NEXT:     200c:       ldr     pc, [lr, #8]!
-// CHECKMIX: <$d>:
 // CHECKMIX-NEXT:     2010:     10 00 00 08     .word   0x08000010
 // CHECKMIX-NEXT:     2014:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKMIX-NEXT:     2018:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKMIX-NEXT:     201c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKMIX: <$a>:
 // CHECKMIX-NEXT:     2020:       ldr     r12, [pc, #4]
 // CHECKMIX-NEXT:     2024:       add     r12, r12, pc
 // CHECKMIX-NEXT:     2028:       ldr     pc, [r12]
-// CHECKMIX: <$d>:
 // CHECKMIX-NEXT:     202c:     00 00 00 08     .word   0x08000000
-// CHECKMIX: <$a>:
 // CHECKMIX-NEXT:     2030:       add     r12, pc, #133169152
 // CHECKMIX-NEXT:     2034:       add     r12, r12, #1044480
 // CHECKMIX-NEXT:     2038:       ldr     pc, [r12, #4088]!
-// CHECKMIX: <$d>:
 // CHECKMIX-NEXT:     203c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKMIX: <$a>:
 // CHECKMIX-NEXT:     2040:       add     r12, pc, #133169152
 // CHECKMIX-NEXT:     2044:       add     r12, r12, #1044480
 // CHECKMIX-NEXT:     2048:       ldr     pc, [r12, #4076]!
-// CHECKMIX: <$d>:
 // CHECKMIX-NEXT:     204c:     d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // CHECKMIX-EB: Disassembly of section .text:
 // CHECKMIX-EB-EMPTY:
 // CHECKMIX-EB-NEXT: <func1>:
 // CHECKMIX-EB-NEXT:     1000:       bx      lr
 // CHECKMIX-EB: <func2>:
 // CHECKMIX-EB-NEXT:                 bx      lr
 // CHECKMIX-EB: <func3>:
 // CHECKMIX-EB-NEXT:                 bx      lr
 // CHECKMIX-EB: <_start>:
 // CHECKMIX-EB-NEXT:                 b       0x2020
 // CHECKMIX-EB-NEXT:                 bl      0x2030
 // CHECKMIX-EB-NEXT:                 beq     0x2040
 // CHECKMIX-EB-EMPTY:
 // CHECKMIX-EB-NEXT: Disassembly of section .plt:
 // CHECKMIX-EB-EMPTY:
-// CHECKMIX-EB-NEXT: <$a>:
+// CHECKMIX-EB-NEXT: <.plt>:
 // CHECKMIX-EB-NEXT:     2000:       str     lr, [sp, #-4]!
 // CHECKMIX-EB-NEXT:                 ldr     lr, [pc, #4]
 // CHECKMIX-EB-NEXT:                 add     lr, pc, lr
 // CHECKMIX-EB-NEXT:                 ldr     pc, [lr, #8]!
-// CHECKMIX-EB: <$d>:
 // CHECKMIX-EB-NEXT:                 08 00 00 10     .word   0x08000010
 // CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKMIX-EB: <$a>:
 // CHECKMIX-EB-NEXT:     2020:       ldr     r12, [pc, #4]
 // CHECKMIX-EB-NEXT:                 add     r12, r12, pc
 // CHECKMIX-EB-NEXT:                 ldr     pc, [r12]
-// CHECKMIX-EB: <$d>:
 // CHECKMIX-EB-NEXT:                 08 00 00 00     .word   0x08000000
-// CHECKMIX-EB: <$a>:
 // CHECKMIX-EB-NEXT:     2030:       add     r12, pc, #133169152
 // CHECKMIX-EB-NEXT:                 add     r12, r12, #1044480
 // CHECKMIX-EB-NEXT:                 ldr     pc, [r12, #4088]!
-// CHECKMIX-EB: <$d>:
 // CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECKMIX-EB: <$a>:
 // CHECKMIX-EB-NEXT:     2040:       add     r12, pc, #133169152
 // CHECKMIX-EB-NEXT:                 add     r12, r12, #1044480
 // CHECKMIX-EB-NEXT:                 ldr     pc, [r12, #4076]!
-// CHECKMIX-EB: <$d>:
 // CHECKMIX-EB-NEXT:                 d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // DSORELMIX:    Name: .got.plt
 // DSORELMIX-NEXT:     Type: SHT_PROGBITS
 // DSORELMIX-NEXT:     Flags [
 // DSORELMIX-NEXT:       SHF_ALLOC
 // DSORELMIX-NEXT:       SHF_WRITE
 // DSORELMIX-NEXT:     ]
 // DSORELMIX-NEXT:     Address: 0x8002020
 // DSORELMIX:   Section {{.*}} .rel.plt {
 // DSORELMIX-NEXT:     0x800202C R_ARM_JUMP_SLOT func1
 // DSORELMIX-NEXT:     0x8002030 R_ARM_JUMP_SLOT func2
 // DSORELMIX-NEXT:     0x8002034 R_ARM_JUMP_SLOT func3
 

lld/test/ELF/arm-target1.s

.text
   patatino:
         .word 32
 // Force generation of $d.0 as section is not all data
   nop
 // RELATIVE: SYMBOL TABLE:
 // RELATIVE: 00010154 l       .text           00000000 patatino
 // RELATIVE: Disassembly of section .text:
 // RELATIVE-EMPTY:
-// RELATIVE: <$d.0>:
+// RELATIVE: <.text>:
 // RELATIVE:     10150:       04 00 00 00     .word   0x00000004
 
 // ABS: relocation R_ARM_TARGET1 cannot be used against symbol 'patatino'; recompile with -fPIC
 // ABS: >>> defined in {{.*}}.o
 // ABS: >>> referenced by {{.*}}.o:(.text+0x0)

lld/test/ELF/arm-thumb-interwork-ifunc.s

 
 // CHECK:      00021018 <__Thumbv7ABSLongThunk_foo>:
 // CHECK-NEXT: movw    r12, #4144
 // CHECK-NEXT: movt    r12, #2
 // CHECK-NEXT: bx      r12
 
 // CHECK: Disassembly of section .iplt:
 
-// CHECK:      00021030 <$a>:
+// CHECK:      00021030 <.iplt>:
 // CHECK-NEXT: add     r12, pc, #0, #12
 // CHECK-NEXT: add     r12, r12, #16, #20
 // CHECK-NEXT: ldr     pc, [r12, #8]!

lld/test/ELF/arm-thumb-interwork-shared.s

 // CHECK: <__ThumbV7PILongThunk_weakref>:
 // CHECK-NEXT:     101fc: movw    r12, #56
 // CHECK-NEXT:           movt    r12, #0
 // CHECK-NEXT:           add     r12, pc
 // CHECK-NEXT:           bx      r12
 
 // CHECK: Disassembly of section .plt:
 // CHECK-EMPTY:
-// CHECK-NEXT: <$a>:
+// CHECK-NEXT: <.plt>:
 // CHECK-NEXT:     10210: str     lr, [sp, #-4]!
 // CHECK-NEXT:           add     lr, pc, #0, #12
 // CHECK-NEXT:           add     lr, lr, #32
 // CHECK-NEXT:           ldr     pc, [lr, #148]!
-// CHECK: <$d>:
 // CHECK-NEXT:     10220: d4 d4 d4 d4 .word   0xd4d4d4d4
 // CHECK-NEXT:           .word   0xd4d4d4d4
 // CHECK-NEXT:           .word   0xd4d4d4d4
 // CHECK-NEXT:           .word   0xd4d4d4d4
-// CHECK: <$a>:
 // CHECK-NEXT:     10230: add     r12, pc, #0, #12
 // CHECK-NEXT:           add     r12, r12, #32
 // CHECK-NEXT:           ldr     pc, [r12, #124]!
-// CHECK: <$d>:
 // CHECK-NEXT:     1023c: d4 d4 d4 d4 .word   0xd4d4d4d4
-// CHECK: <$a>:
 // CHECK-NEXT:     10240: add     r12, pc, #0, #12
 // CHECK-NEXT:           add     r12, r12, #32
 // CHECK-NEXT:           ldr     pc, [r12, #112]!
-// CHECK: <$d>:
 // CHECK-NEXT:     1024c: d4 d4 d4 d4 .word   0xd4d4d4d4

lld/test/ELF/arm-thumb-interwork-thunk-v5.s

 // CHECK-NEXT: 21008: fa000000        blx     0x21010 <thumb_func>
 // CHECK-NEXT: 2100c: e12fff1e        bx      lr
 
 // CHECK: <thumb_func>:
 // CHECK-NEXT: 21010: 4770    bx      lr
 
 // CHECK: <__ARMv5LongLdrPcThunk_thumb_func>:
 // CHECK-NEXT: 21014: e51ff004        ldr     pc, [pc, #-4]
-// CHECK: <$d>:
 // CHECK-NEXT: 21018: 11 10 02 00     .word   0x00021011
 
 // CHECK-EB: <_start>:
 // CHECK-EB-NEXT: 21000: ea000003        b       0x21014 <__ARMv5LongLdrPcThunk_thumb_func>
 // CHECK-EB-NEXT: 21004: fa000001        blx     0x21010 <thumb_func>
 // CHECK-EB-NEXT: 21008: fa000000        blx     0x21010 <thumb_func>
 // CHECK-EB-NEXT: 2100c: e12fff1e        bx      lr
 
 // CHECK-EB: <thumb_func>:
 // CHECK-EB-NEXT: 21010: 4770    bx      lr
 
 // CHECK-EB: <__ARMv5LongLdrPcThunk_thumb_func>:
 // CHECK-EB-NEXT: 21014: e51ff004        ldr     pc, [pc, #-4]
-// CHECK-EB: <$d>:
 // CHECK-EB-NEXT: 21018: 00 02 10 11     .word   0x00021011
 
 // CHECK-PI: <_start>:
 // CHECK-PI-NEXT: 11000: ea000003        b       0x11014 <__ARMv4PILongBXThunk_thumb_func>
 // CHECK-PI-NEXT: 11004: fa000001        blx     0x11010 <thumb_func>
 // CHECK-PI-NEXT: 11008: fa000000        blx     0x11010 <thumb_func>
 // CHECK-PI-NEXT: 1100c: e12fff1e        bx      lr
 
 // CHECK-PI: <thumb_func>:
 // CHECK-PI-NEXT: 11010: 4770    bx      lr
 
 // CHECK-PI: <__ARMv4PILongBXThunk_thumb_func>:
 // CHECK-PI-NEXT: 11014: e59fc004        ldr     r12, [pc, #4]
 // CHECK-PI-NEXT: 11018: e08fc00c        add     r12, pc, r12
 // CHECK-PI-NEXT: 1101c: e12fff1c        bx      r12
-// CHECK-PI: <$d>:
 // CHECK-PI-NEXT: 11020: f1 ff ff ff     .word   0xfffffff1
 
 // CHECK-EB-PI: <_start>:
 // CHECK-EB-PI-NEXT: 11000: ea000003        b       0x11014 <__ARMv4PILongBXThunk_thumb_func>
 // CHECK-EB-PI-NEXT: 11004: fa000001        blx     0x11010 <thumb_func>
 // CHECK-EB-PI-NEXT: 11008: fa000000        blx     0x11010 <thumb_func>
 // CHECK-EB-PI-NEXT: 1100c: e12fff1e        bx      lr
 
 // CHECK-EB-PI: <thumb_func>:
 // CHECK-EB-PI-NEXT: 11010: 4770    bx      lr
 
 // CHECK-EB-PI: <__ARMv4PILongBXThunk_thumb_func>:
 // CHECK-EB-PI-NEXT: 11014: e59fc004        ldr     r12, [pc, #4]
 // CHECK-EB-PI-NEXT: 11018: e08fc00c        add     r12, pc, r12
 // CHECK-EB-PI-NEXT: 1101c: e12fff1c        bx      r12
-// CHECK-EB-PI: <$d>:
 // CHECK-EB-PI-NEXT: 11020: ff ff ff f1     .word   0xfffffff1
         .section .text.1, "ax", %progbits
         .thumb
         .hidden thumb_func
         .type thumb_func, %function
 thumb_func:
         bx lr

lld/test/ELF/arm-thumb-interwork-thunk.s

  .type _start, %function
 _start:
  bl arm_caller
  bl thumb_caller
  bx lr
 
 // CHECK-ARM-PLT: Disassembly of section .plt:
 // CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001610 <$a>:
+// CHECK-ARM-PLT-NEXT: 00001610 <.plt>:
 // CHECK-ARM-PLT-NEXT:     1610:             str     lr, [sp, #-4]!
 // CHECK-ARM-PLT-NEXT:     1614:             add     lr, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1618:             add     lr, lr, #0, #20
 // CHECK-ARM-PLT-NEXT:     161c:             ldr     pc, [lr, #672]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001620 <$d>:
 // CHECK-ARM-PLT-NEXT:     1620:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-ARM-PLT-NEXT:     1624:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-ARM-PLT-NEXT:     1628:     d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK-ARM-PLT-NEXT:     162c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001630 <$a>:
 // CHECK-ARM-PLT-NEXT:     1630:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1634:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1638:             ldr     pc, [r12, #648]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000163c <$d>:
 // CHECK-ARM-PLT-NEXT:     163c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001640 <$a>:
 // CHECK-ARM-PLT-NEXT:     1640:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1644:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1648:             ldr     pc, [r12, #636]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000164c <$d>:
 // CHECK-ARM-PLT-NEXT:     164c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001650 <$a>:
 // CHECK-ARM-PLT-NEXT:     1650:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1654:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1658:             ldr     pc, [r12, #624]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000165c <$d>:
 // CHECK-ARM-PLT-NEXT:     165c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001660 <$a>:
 // CHECK-ARM-PLT-NEXT:     1660:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1664:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1668:             ldr     pc, [r12, #612]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000166c <$d>:
 // CHECK-ARM-PLT-NEXT:     166c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001670 <$a>:
 // CHECK-ARM-PLT-NEXT:     1670:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1674:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1678:             ldr     pc, [r12, #600]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000167c <$d>:
 // CHECK-ARM-PLT-NEXT:     167c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001680 <$a>:
 // CHECK-ARM-PLT-NEXT:     1680:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1684:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1688:             ldr     pc, [r12, #588]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000168c <$d>:
 // CHECK-ARM-PLT-NEXT:     168c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 00001690 <$a>:
 // CHECK-ARM-PLT-NEXT:     1690:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     1694:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     1698:             ldr     pc, [r12, #576]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 0000169c <$d>:
 // CHECK-ARM-PLT-NEXT:     169c:     d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 000016a0 <$a>:
 // CHECK-ARM-PLT-NEXT:     16a0:             add     r12, pc, #0, #12
 // CHECK-ARM-PLT-NEXT:     16a4:             add     r12, r12, #0, #20
 // CHECK-ARM-PLT-NEXT:     16a8:             ldr     pc, [r12, #564]!
-// CHECK-ARM-PLT-EMPTY:
-// CHECK-ARM-PLT-NEXT: 000016ac <$d>:
 // CHECK-ARM-PLT-NEXT:     16ac:     d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // CHECK-DSO-REL:      0x18C0 R_ARM_JUMP_SLOT thumb_callee1
 // CHECK-DSO-REL-NEXT: 0x18C4 R_ARM_JUMP_SLOT arm_callee1
 // CHECK-DSO-REL-NEXT: 0x18C8 R_ARM_JUMP_SLOT arm_caller
 // CHECK-DSO-REL-NEXT: 0x18CC R_ARM_JUMP_SLOT thumb_callee2
 // CHECK-DSO-REL-NEXT: 0x18D0 R_ARM_JUMP_SLOT thumb_callee3
 // CHECK-DSO-REL-NEXT: 0x18D4 R_ARM_JUMP_SLOT arm_callee2
 // CHECK-DSO-REL-NEXT: 0x18D8 R_ARM_JUMP_SLOT arm_callee3
 // CHECK-DSO-REL-NEXT: 0x18DC R_ARM_JUMP_SLOT thumb_caller

lld/test/ELF/arm-thumb-plt-range-thunk-os.s

 far_nonpreemptible_alias:
  bl elsewhere
 
 // CHECK3: <far_preemptible>:
 // CHECK3:  4000000:       f000 e816       blx     0x4000030
 
 // CHECK4: Disassembly of section .plt:
 // CHECK4-EMPTY:
-// CHECK4-NEXT: <$a>:
+// CHECK4-NEXT: <.plt>:
 // CHECK4-NEXT:  4000010: e52de004      str lr, [sp, #-4]!
 // CHECK4-NEXT:  4000014: e28fe600      add lr, pc, #0, #12
 // CHECK4-NEXT:  4000018: e28eea20      add lr, lr, #32
 // CHECK4-NEXT:  400001c: e5bef0a4      ldr pc, [lr, #164]!
-// CHECK4: <$d>:
 // CHECK4-NEXT:  4000020: d4 d4 d4 d4   .word 0xd4d4d4d4
 // CHECK4-NEXT:  4000024: d4 d4 d4 d4   .word 0xd4d4d4d4
 // CHECK4-NEXT:  4000028: d4 d4 d4 d4   .word 0xd4d4d4d4
 // CHECK4-NEXT:  400002c: d4 d4 d4 d4   .word 0xd4d4d4d4
-// CHECK4: <$a>:
 // CHECK4-NEXT:  4000030: e28fc600      add r12, pc, #0, #12
 // CHECK4-NEXT:  4000034: e28cca20      add r12, r12, #32
 // CHECK4-NEXT:  4000038: e5bcf08c      ldr pc, [r12, #140]!
-// CHECK4: <$d>:
 // CHECK4-NEXT:  400003c: d4 d4 d4 d4   .word 0xd4d4d4d4
-// CHECK4: <$a>:
 // CHECK4-NEXT:  4000040: e28fc600      add r12, pc, #0, #12
 // CHECK4-NEXT:  4000044: e28cca20      add r12, r12, #32
 // CHECK4-NEXT:  4000048: e5bcf080      ldr pc, [r12, #128]!
-// CHECK4: <$d>:
 // CHECK4-NEXT:  400004c: d4 d4 d4 d4   .word 0xd4d4d4d4
-// CHECK4: <$a>:
 // CHECK4-NEXT:  4000050: e28fc600      add r12, pc, #0, #12
 // CHECK4-NEXT:  4000054: e28cca20      add r12, r12, #32
 // CHECK4-NEXT:  4000058: e5bcf074      ldr pc, [r12, #116]!
-// CHECK4: <$d>:
 // CHECK4-NEXT:  400005c: d4 d4 d4 d4   .word 0xd4d4d4d4

lld/test/ELF/arm-thumb-plt-reloc.s

 // 0x10250 = PLT func1
 // DSO-NEXT:     1021c:     f000 e818       blx     0x10250
 // 0x10260 = PLT func2
 // DSO-NEXT:     10220:     f000 e81e       blx     0x10260
 // 0x10270 = PLT func3
 // DSO-NEXT:     10224:     f000 e824       blx     0x10270
 // DSO: Disassembly of section .plt:
 // DSO-EMPTY:
-// DSO-NEXT: <$a>:
+// DSO-NEXT: <.plt>:
 // DSO-NEXT:     10230:       e52de004        str     lr, [sp, #-4]!
 // (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2]
 // DSO-NEXT:     10234:       e28fe600        add     lr, pc, #0, #12
 // DSO-NEXT:     10238:       e28eea20        add     lr, lr, #32, #20
 // DSO-NEXT:     1023c:       e5bef0a4        ldr     pc, [lr, #164]!
-// DSO: <$d>:
 
 // DSO-NEXT:     10240:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     10244:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     10248:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // DSO-NEXT:     1024c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4
 // DSO-NEXT:     10250:       e28fc600        add     r12, pc, #0, #12
 // DSO-NEXT:     10254:       e28cca20        add     r12, r12, #32, #20
 // DSO-NEXT:     10258:       e5bcf08c        ldr     pc, [r12, #140]!
-// DSO: <$d>:
 // DSO-NEXT:     1025c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8
 // DSO-NEXT:     10260:       e28fc600        add     r12, pc, #0, #12
 // DSO-NEXT:     10264:       e28cca20        add     r12, r12, #32, #20
 // DSO-NEXT:     10268:       e5bcf080        ldr     pc, [r12, #128]!
-// DSO: <$d>:
 // DSO-NEXT:     1026c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// DSO: <$a>:
 // (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec
 // DSO-NEXT:     10270:       e28fc600        add     r12, pc, #0, #12
 // DSO-NEXT:     10274:       e28cca20        add     r12, r12, #32, #20
 // DSO-NEXT:     10278:       e5bcf074        ldr     pc, [r12, #116]!
-// DSO: <$d>:
 // DSO-NEXT:     1027c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // DSOREL:    Name: .got.plt
 // DSOREL-NEXT:    Type: SHT_PROGBITS
 // DSOREL-NEXT:    Flags [
 // DSOREL-NEXT:      SHF_ALLOC
 // DSOREL-NEXT:      SHF_WRITE
 // DSOREL-NEXT:    ]

lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s

 // CHECK4-LABEL: <tfunc02>:
 // CHECK4-NEXT:   400000:       bx      lr
 // CHECK4-NEXT:                 bl      0x400018 <__Thumbv4ABSLongThunk_tfunc07> @ imm = #0x12
 // CHECK4-NEXT:                 bmi     0x3fffb2 <tfunc01+0xfffb2> @ imm = #-0x58
 // CHECK4-EMPTY:
 // CHECK4-NEXT:  <__Thumbv4ABSLongThunk_tfunc04>:
 // CHECK4-NEXT:   400008:       bx      pc
 // CHECK4-NEXT:                 b       0x400008 <__Thumbv4ABSLongThunk_tfunc04> @ imm = #-0x6
-// CHECK4-EMPTY:
-// CHECK4-NEXT: <$a>:
 // CHECK4-NEXT:  40000c:        ldr     r12, [pc]               @ 0x400014 <__Thumbv4ABSLongThunk_tfunc04+0xc>
 // CHECK4-NEXT:                 bx      r12
-// CHECK4-EMPTY:
-// CHECK4-NEXT:  <$d>:
 // CHECK4-NEXT:   400014: 01 00 60 00   .word 0x00600001
 // CHECK4-EMPTY:
 // CHECK4-NEXT:  <__Thumbv4ABSLongThunk_tfunc07>:
 // CHECK4-NEXT:   400018:       bx      pc
 // CHECK4-NEXT:               b     0x400018 <__Thumbv4ABSLongThunk_tfunc07> @ imm = #-0x6
-// CHECK4-EMPTY:
-// CHECK4-NEXT:  <$a>:
 // CHECK4-NEXT:   40001c:       ldr r12, [pc]                   @ 0x400024 <__Thumbv4ABSLongThunk_tfunc07+0xc>
 // CHECK4-NEXT:               bx  r12
-// CHECK4-EMPTY:
-// CHECK4-NEXT:  <$d>:
 // CHECK4-NEXT:   400024: 01 00 90 00   .word 0x00900001
 
 FUNCTION 03
 FUNCTION 04
 FUNCTION 05
 // CHECK5-LABEL: <tfunc05>:
 // CHECK5-NEXT:   700000:       bx  lr
 // CHECK5-NEXT:               bmi 0x6fffae <tfunc04+0xfffae> @ imm = #-0x58
 // CHECK5-EMPTY:
 // CHECK5-NEXT:  <__Thumbv4ABSLongThunk_tfunc03>:
 // CHECK5-NEXT:   700004:       bx  pc
 // CHECK5-NEXT:               b 0x700004 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0x6
-// CHECK5-EMPTY:
-// CHECK5-NEXT:  <$a>:
 // CHECK5-NEXT:   700008:       ldr r12, [pc]               @ 0x700010 <__Thumbv4ABSLongThunk_tfunc03+0xc>
 // CHECK5-NEXT:               bx  r12
-// CHECK5-EMPTY:
-// CHECK5-NEXT:  <$d>:
 // CHECK5-NEXT:   700010: 01 00 50 00   .word 0x00500001
 
 FUNCTION 06
   /// The backwards branch is within range, so no range extension necessary.
   bl tfunc04
 // CHECK6-LABEL: <tfunc06>:
 // CHECK6-NEXT:   800000:       bx  lr
 // CHECK6-NEXT:               bl  0x600000 <tfunc04>      @ imm = #-0x200006

 // CHECK8-LABEL: <tfunc08>:
 // CHECK8-NEXT:   a00000:       bx  lr
 // CHECK8-NEXT:               bl  0x700004 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0x300002
 // CHECK8-NEXT:               bmi 0x9fffb2 <tfunc07+0xfffb2> @ imm = #-0x58
 // CHECK8-EMPTY:
 // CHECK8-NEXT:  <__Thumbv4ABSLongThunk_tfunc03>:
 // CHECK8-NEXT:   a00008:       bx  pc
 // CHECK8-NEXT:   a0000a:       b 0xa00008 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0x6
-// CHECK8-EMPTY:
-// CHECK8-NEXT:  <$a>:
 // CHECK8-NEXT:   a0000c:       ldr r12, [pc]               @ 0xa00014 <__Thumbv4ABSLongThunk_tfunc03+0xc>
 // CHECK8-NEXT:   a00010:       bx  r12
-// CHECK8-EMPTY:
-// CHECK8-NEXT:  <$d>:
 // CHECK8-NEXT:   a00014: 01 00 50 00   .word 0x00500001
 
 FUNCTION 09
   /// This call is out of range of ThunkSection at 0700004.
   /// These 3 calls to tfunc03 could have used the same thunk (section), but
   /// we are not that sophisticated.
   bl tfunc03
 // CHECK9-LABEL: <tfunc09>:
 // CHECK9-NEXT:   b00000:       bx  lr
 // CHECK9-NEXT:               bl  0xa00008 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0xffffe
 FUNCTION 10
 FUNCTION 11

lld/test/ELF/arm-thunk-arm-thumb-reuse.s

  .thumb
  bl far
  bl far2
  .arm
  bl far2
 
 // CHECK:   00010000 <_start>:
 // CHECK-NEXT: 10000: bl      0x10010 <__ARMv7ABSLongThunk_far>
-// CHECK:   00010004 <$t.1>:
 // CHECK-NEXT: 10004: blx     0x10010 <__ARMv7ABSLongThunk_far>
 // CHECK-NEXT: 10008: bl      0x1001c <__Thumbv7ABSLongThunk_far2>
-// CHECK:   0001000c <$a.2>:
 // CHECK-NEXT: 1000c: blx     0x1001c <__Thumbv7ABSLongThunk_far2>
 // CHECK:   00010010 <__ARMv7ABSLongThunk_far>:
 // CHECK-NEXT: 10010: movw    r12, #0
 // CHECK-NEXT: 10014: movt    r12, #4096
 // CHECK-NEXT: 10018: bx      r12
 // CHECK:   0001001c <__Thumbv7ABSLongThunk_far2>:
 // CHECK-NEXT: 1001c: movw    r12, #4
 // CHECK-NEXT: 10020: movt    r12, #4096

lld/test/ELF/arm-thunk-largesection.s

  .text
  .globl _start
  .type _start, %function
 _start:
  bx lr
  .space 0x1000
 // CHECK1:      <_start>:
 // CHECK1-NEXT:   21000: bx      lr
-// CHECK1:      <$d.1>:
 // CHECK1-NEXT:   21002:       00 00 00 00 .word 0x00000000
 
 
 // CHECK2:      <__Thumbv7ABSLongThunk__start>:
 // CHECK2-NEXT:    22004: b.w     0x21000 <_start>
 
 /// Gigantic section where we need a ThunkSection either side of it
  .section .text.large1, "ax", %progbits

lld/test/ELF/arm-thunk-multipass-plt.s

preemptible2:
 
 
         .section .text.11, "ax", %progbits
         .space (5 * 1024 * 1024)
 
 
 // CHECK-PLT: Disassembly of section .plt:
 // CHECK-PLT-EMPTY:
-// CHECK-PLT-NEXT: 00d00020 <$a>:
+// CHECK-PLT-NEXT: 00d00020 <.plt>:
 // CHECK-PLT-NEXT:   d00020: str     lr, [sp, #-4]!
 // CHECK-PLT-NEXT:           add     lr, pc, #0, #12
 // CHECK-PLT-NEXT:           add     lr, lr, #32, #20
 // CHECK-PLT-NEXT:           ldr     pc, [lr, #148]!
-// CHECK-PLT:      00d00030 <$d>:
 // CHECK-PLT-NEXT:   d00030: d4 d4 d4 d4      .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d00034: d4 d4 d4 d4      .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d00038: d4 d4 d4 d4      .word   0xd4d4d4d4
 // CHECK-PLT-NEXT:   d0003c: d4 d4 d4 d4      .word   0xd4d4d4d4
-// CHECK-PLT:      00d00040 <$a>:
 // CHECK-PLT-NEXT:   d00040: add     r12, pc, #0, #12
 // CHECK-PLT-NEXT:   d00044: add     r12, r12, #32, #20
 // CHECK-PLT-NEXT:   d00048: ldr     pc, [r12, #124]!
-// CHECK-PLT:      00d0004c <$d>:
 // CHECK-PLT-NEXT:   d0004c: d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK-PLT:      00d00050 <$a>:
 // CHECK-PLT-NEXT:   d00050: add     r12, pc, #0, #12
 // CHECK-PLT-NEXT:   d00054: add     r12, r12, #32, #20
 // CHECK-PLT-NEXT:   d00058: ldr     pc, [r12, #112]!
-// CHECK-PLT:      00d0005c <$d>:
 // CHECK-PLT-NEXT:   d0005c: d4 d4 d4 d4     .word   0xd4d4d4d4

lld/test/ELF/arm-thunk-re-add.s

 // CHECK2-NEXT:  1100012:       4760    bx      r12
 // CHECK2: <callers>:
 // CHECK2-NEXT:  1100014:       f6ff bff6       b.w     0x1000004 <__ThumbV7PILongThunk_imported>
 // CHECK2-NEXT:  1100018:       f43f aff6       beq.w   0x1100008 <__ThumbV7PILongThunk_imported>
 // CHECK2-NEXT:  110001c:       f6ff bff8       b.w     0x1000010 <__ThumbV7PILongThunk_imported2>
 
 // CHECK3: Disassembly of section .plt:
 // CHECK3-EMPTY:
-// CHECK3-NEXT: <$a>:
+// CHECK3-NEXT: <.plt>:
 // CHECK3-NEXT:  1100020:       e52de004        str     lr, [sp, #-4]!
 // CHECK3-NEXT:  1100024:       e28fe600        add     lr, pc, #0, #12
 // CHECK3-NEXT:  1100028:       e28eea20        add     lr, lr, #32
 // CHECK3-NEXT:  110002c:       e5bef094        ldr     pc, [lr, #148]!
-// CHECK3: <$d>:
 // CHECK3-NEXT:  1100030:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK3-NEXT:  1100034:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK3-NEXT:  1100038:       d4 d4 d4 d4     .word   0xd4d4d4d4
 // CHECK3-NEXT:  110003c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK3: <$a>:
 // CHECK3-NEXT:  1100040:       e28fc600        add     r12, pc, #0, #12
 // CHECK3-NEXT:  1100044:       e28cca20        add     r12, r12, #32
 // CHECK3-NEXT:  1100048:       e5bcf07c        ldr     pc, [r12, #124]!
-// CHECK3: <$d>:
 // CHECK3-NEXT:  110004c:       d4 d4 d4 d4     .word   0xd4d4d4d4
-// CHECK3: <$a>:
 // CHECK3-NEXT:  1100050:       e28fc600        add     r12, pc, #0, #12
 // CHECK3-NEXT:  1100054:       e28cca20        add     r12, r12, #32
 // CHECK3-NEXT:  1100058:       e5bcf070        ldr     pc, [r12, #112]!
-// CHECK3: <$d>:
 // CHECK3-NEXT:  110005c:       d4 d4 d4 d4     .word   0xd4d4d4d4
 
 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t
 // RUN: ld.lld %t --shared -o %t.so
 // The output file is large, most of it zeroes. We dissassemble only the
 // parts we need to speed up the test and avoid a large output file
 // RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1000004 --stop-address=0x100001c | FileCheck --check-prefix=CHECK1 %s
 // RUN: llvm-objdump --no-print-imm-hex -d %t.so --start-address=0x1100008 --stop-address=0x1100022 | FileCheck --check-prefix=CHECK2 %s

lld/test/ELF/pr34660.s

 # REQUIRES: aarch64
 
 # RUN: llvm-mc -filetype=obj -triple=aarch64-linux-none %s -o %t.o
 # RUN: ld.lld --hash-style=sysv -shared %t.o -o %t
 # RUN: llvm-objdump %t -d --no-show-raw-insn | FileCheck %s --check-prefix=DISASM
 # RUN: llvm-readelf %t --symbols | FileCheck %s --check-prefix=SYM
 
 # It would be much easier to understand/read this test if llvm-objdump would print
 # the immediates in hex.
 # IMM = hex(65540) = 0x10004
 # PC = 0x10000
 # As the relocation is PC-relative, IMM + PC = 0x20004 which is the VA of the
 # correct symbol.
 
 # DISASM: Disassembly of section .text:
 # DISASM-EMPTY:
-# DISASM-NEXT: <$x.0>:
+# DISASM-NEXT: <.text>:
 # DISASM-NEXT:   1022c:       ldr     x8, 0x30294
 
 # SYM: Symbol table '.symtab'
 # SYM:  0000000000030294     0 NOTYPE  LOCAL  DEFAULT    6 patatino
 
   ldr x8, patatino
   .data
   .zero 4
 patatino:

llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h

 };
 
 struct SymbolInfoTy {
   uint64_t Addr;
   StringRef Name;
   // XCOFF uses XCOFFSymInfo. Other targets use Type.
   XCOFFSymbolInfoTy XCOFFSymInfo;
   uint8_t Type;
+  // Used by ELF to describe a mapping symbol that is usually not displayed.
+  bool IsMappingSymbol;
 
 private:
   bool IsXCOFF;
   bool HasType;
 
 public:
   SymbolInfoTy(uint64_t Addr, StringRef Name,
                std::optional<XCOFF::StorageMappingClass> Smc,
                std::optional<uint32_t> Idx, bool Label)
       : Addr(Addr), Name(Name), XCOFFSymInfo{Smc, Idx, Label}, Type(0),
-        IsXCOFF(true), HasType(false) {}
+        IsMappingSymbol(false), IsXCOFF(true), HasType(false) {}
   SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type,
-               bool IsXCOFF = false)
-      : Addr(Addr), Name(Name), Type(Type), IsXCOFF(IsXCOFF), HasType(true) {}
+               bool IsMappingSymbol = false, bool IsXCOFF = false)
+      : Addr(Addr), Name(Name), Type(Type), IsMappingSymbol(IsMappingSymbol),
+        IsXCOFF(IsXCOFF), HasType(true) {}
   bool isXCOFF() const { return IsXCOFF; }
 
 private:
   friend bool operator<(const SymbolInfoTy &P1, const SymbolInfoTy &P2) {
     assert((P1.IsXCOFF == P2.IsXCOFF && P1.HasType == P2.HasType) &&
            "The value of IsXCOFF and HasType in P1 and P2 should be the same "
            "respectively.");
 
     if (P1.IsXCOFF && P1.HasType)
       return std::tie(P1.Addr, P1.Type, P1.Name) <
              std::tie(P2.Addr, P2.Type, P2.Name);
 
     if (P1.IsXCOFF)
       return std::tie(P1.Addr, P1.XCOFFSymInfo, P1.Name) <
              std::tie(P2.Addr, P2.XCOFFSymInfo, P2.Name);
 
-    return std::tie(P1.Addr, P1.Name, P1.Type) <
-           std::tie(P2.Addr, P2.Name, P2.Type);
+    // With the same address, place mapping symbols first.
+    bool MS1 = !P1.IsMappingSymbol, MS2 = !P2.IsMappingSymbol;
+    return std::tie(P1.Addr, MS1, P1.Name, P1.Type) <
+           std::tie(P2.Addr, MS2, P2.Name, P2.Type);
   }
 };
 
 using SectionSymbolsTy = std::vector<SymbolInfoTy>;
 
 template <typename T> class ArrayRef;
 class MCContext;
 class MCInst;

llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s

 # RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t
 # RUN: llvm-objdump --no-print-imm-hex -d %t | tr '\t' '|' | FileCheck --match-full-lines --strict-whitespace %s
 
 ## Use '|' to show where the tabs line up.
-#       CHECK:0000000000000000 <$x.0>:
+#       CHECK:0000000000000000 <.text>:
 #  CHECK-NEXT:       0: 91001062     |add|x2, x3, #4{{$}}
 #  CHECK-NEXT:       4: d503201f     |nop
-# CHECK-EMPTY:
-#  CHECK-NEXT:0000000000000008 <$d.1>:
 #  CHECK-NEXT:       8: ff ff 00 00  |.word|0x0000ffff
 
   add x2, x3, #4
   nop
   .word 0xffff

llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test

 # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t
-# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s
+# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s --check-prefixes=CHECK,NOALL
 # RUN: llvm-objdump --no-print-imm-hex -d --show-all-symbols %t | FileCheck %s --check-prefixes=CHECK,ALL
 
 # CHECK:       Disassembly of section .mysection:
 # CHECK-EMPTY:
 # ALL-NEXT:    <$x.0>:
 # CHECK-NEXT:  <_start>:
 # CHECK-NEXT:         0:       10000021        adr     x1, 0x4
 # CHECK-EMPTY:
 # ALL-NEXT:    <$d.1>:
 # CHECK-NEXT:  <msg>:
 # CHECK-NEXT:         4:       48 65 6c 6c     .word
 # CHECK-NEXT:         8:       6f 2c 20 77     .word
 # CHECK-NEXT:         c:       6f 72 6c 64     .word
 # CHECK-NEXT:        10:       0a 00           .short  0x000a
 # CHECK-EMPTY:
 # CHECK-NEXT:  Disassembly of section .myothersection:
 # CHECK-EMPTY:
-# CHECK-NEXT:  <$x.2>:
+# NOALL-NEXT:  <.myothersection>:
+# ALL-NEXT:    <$x.2>:
 # CHECK-NEXT:         0:       90000001        adrp    x1, 0x0
 # CHECK-EMPTY:
 # ALL-NEXT:    <$d.3>:
 # CHECK-NEXT:  <mystr>:
 # CHECK-NEXT:         4:       62 6c 61 68     .word
 # CHECK-NEXT:         8:       9a              .byte   0x9a
 
 .section .mysection,"ax",@progbits

llvm/test/tools/llvm-objdump/ELF/ARM/disassemble-all-mapping-symbols.s

 // Regression test for a bug in which --disassemble-all had the side effect
 // of stopping mapping symbols from being checked in code sections, so that
 // mixed Arm/Thumb code would not all be correctly disassembled.
 
 @ RUN: llvm-mc -triple arm-unknown-linux -filetype=obj %s -o %t.o
 @ RUN: llvm-objdump --no-print-imm-hex -d %t.o | FileCheck %s
 @ RUN: llvm-objdump --no-print-imm-hex -d --disassemble-all %t.o | FileCheck %s
 
-@ CHECK: 00000000 <armfunc>:
-@ CHECK:        0: e2800001      add     r0, r0, #1
-@ CHECK:        4: e12fff1e      bx      lr
-@
-@ CHECK: 00000008 <thmfunc>:
-@ CHECK:        8: f100 0001     add.w   r0, r0, #1
-@ CHECK:        c: 4770          bx      lr
+@ CHECK:       00000000 <armfunc>:
+@ CHECK-NEXT:        0: e2800001      add     r0, r0, #1
+@ CHECK-NEXT:        4: e12fff1e      bx      lr
+@ CHECK-NEXT:        8: 00 00         .short  0x0000
+@ CHECK-EMPTY:
+@ CHECK:       0000000a <thmfunc>:
+@ CHECK-NEXT:        a: f100 0001     add.w   r0, r0, #1
+@ CHECK-NEXT:        e: 4770          bx      lr
+@ CHECK-NEXT:       10: 00 00         .short  0x0000
 
   .arch armv8a
         .text
 
         .arm
   .global armfunc
   .type armfunc, %function
 armfunc:
         add     r0, r0, #1
         bx      lr
+        @@ Test that this is not displayed as a .word
+        .space  2
 
         .thumb
   .global thmfunc
   .type thmfunc, %function
 thmfunc:
         add     r0, r0, #1
         bx      lr
+        .space  2

llvm/tools/llvm-objdump/llvm-objdump.h

T unwrapOrError(Expected<T> EO, Ts &&... Args) {
   reportError(EO.takeError(), std::forward<Ts>(Args)...);
 }
 
 void invalidArgValue(const opt::Arg *A);
 
 std::string getFileNameForError(const object::Archive::Child &C,
                                 unsigned Index);
 SymbolInfoTy createSymbolInfo(const object::ObjectFile &Obj,
-                              const object::SymbolRef &Symbol);
+                              const object::SymbolRef &Symbol,
+                              bool MappingSymbol = false);
 unsigned getInstStartColumn(const MCSubtargetInfo &STI);
 void printRawData(llvm::ArrayRef<uint8_t> Bytes, uint64_t Address,
                   llvm::formatted_raw_ostream &OS,
                   llvm::MCSubtargetInfo const &STI);
 
 } // namespace objdump
 } // end namespace llvm
 
 #endif

llvm/tools/llvm-objdump/llvm-objdump.cpp

static bool isCSKYElf(const ObjectFile &Obj) {
   const auto *Elf = dyn_cast<ELFObjectFileBase>(&Obj);
   return Elf && Elf->getEMachine() == ELF::EM_CSKY;
 }
 
 static bool hasMappingSymbols(const ObjectFile &Obj) {
   return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ;
 }
 
-static bool isMappingSymbol(const SymbolInfoTy &Sym) {
-  return Sym.Name.startswith("$d") || Sym.Name.startswith("$x") ||
-         Sym.Name.startswith("$a") || Sym.Name.startswith("$t");
-}
-
 static void printRelocation(formatted_raw_ostream &OS, StringRef FileName,
                             const RelocationRef &Rel, uint64_t Address,
                             bool Is64Bits) {
   StringRef Fmt = Is64Bits ? "%016" PRIx64 ":  " : "%08" PRIx64 ":  ";
   SmallString<16> Name;
   SmallString<32> Val;
   Rel.getTypeName(Name);
   if (Error E = getRelocationValueString(Rel, Val))
if (NumBytes == 8) {
       outs() << reinterpret_cast<char *>(AsciiData);
       outs() << '\n';
       NumBytes = 0;
     }
   }
 }
 
 SymbolInfoTy objdump::createSymbolInfo(const ObjectFile &Obj,
-                                       const SymbolRef &Symbol) {
+                                       const SymbolRef &Symbol,
+                                       bool IsMappingSymbol) {
   const StringRef FileName = Obj.getFileName();
   const uint64_t Addr = unwrapOrError(Symbol.getAddress(), FileName);
   const StringRef Name = unwrapOrError(Symbol.getName(), FileName);
 
   if (Obj.isXCOFF() && (SymbolDescription || TracebackTable)) {
     const auto &XCOFFObj = cast<XCOFFObjectFile>(Obj);
     DataRefImpl SymbolDRI = Symbol.getRawDataRefImpl();
 
     const uint32_t SymbolIndex = XCOFFObj.getSymbolIndex(SymbolDRI.p);
     std::optional<XCOFF::StorageMappingClass> Smc =
         getXCOFFSymbolCsectSMC(XCOFFObj, Symbol);
     return SymbolInfoTy(Addr, Name, Smc, SymbolIndex,
                         isLabel(XCOFFObj, Symbol));
   } else if (Obj.isXCOFF()) {
     const SymbolRef::Type SymType = unwrapOrError(Symbol.getType(), FileName);
-    return SymbolInfoTy(Addr, Name, SymType, true);
-  } else
-    return SymbolInfoTy(Addr, Name,
-                        Obj.isELF() ? getElfSymbolType(Obj, Symbol)
-                                    : (uint8_t)ELF::STT_NOTYPE);
+    return SymbolInfoTy(Addr, Name, SymType, false, /*IsXCOFF=*/true);
+  } else {
+    uint8_t Type =
+        Obj.isELF() ? getElfSymbolType(Obj, Symbol) : (uint8_t)ELF::STT_NOTYPE;
+    return SymbolInfoTy(Addr, Name, Type, IsMappingSymbol);
+  }
 }
 
 static SymbolInfoTy createDummySymbolInfo(const ObjectFile &Obj,
                                           const uint64_t Addr, StringRef &Name,
                                           uint8_t Type) {
   if (Obj.isXCOFF() && (SymbolDescription || TracebackTable))
     return SymbolInfoTy(Addr, Name, std::nullopt, std::nullopt, false);
   else
disassembleObject(const Target *TheTarget, ObjectFile &Obj,
   std::map<SectionRef, std::vector<RelocationRef>> RelocMap;
   if (InlineRelocs)
     RelocMap = getRelocsMap(Obj);
   bool Is64Bits = Obj.getBytesInAddress() > 4;
 
   // Create a mapping from virtual address to symbol name.  This is used to
   // pretty print the symbols while disassembling.
   std::map<SectionRef, SectionSymbolsTy> AllSymbols;
+  std::map<SectionRef, SmallVector<MappingSymbolPair, 0>> AllMappingSymbols;
   SectionSymbolsTy AbsoluteSymbols;
   const StringRef FileName = Obj.getFileName();
   const MachOObjectFile *MachO = dyn_cast<const MachOObjectFile>(&Obj);
   for (const SymbolRef &Symbol : Obj.symbols()) {
     Expected<StringRef> NameOrErr = Symbol.getName();
     if (!NameOrErr) {
       reportWarning(toString(NameOrErr.takeError()), FileName);
       continue;
     }
     if (NameOrErr->empty() && !(Obj.isXCOFF() && SymbolDescription))
       continue;
 
-    if (Obj.isELF() && getElfSymbolType(Obj, Symbol) == ELF::STT_SECTION)
+    if (Obj.isELF() &&
+        (cantFail(Symbol.getFlags()) & SymbolRef::SF_FormatSpecific)) {
+      // Symbol is intended not to be displayed by default (STT_FILE,
+      // STT_SECTION, or a mapping symbol). Ignore STT_SECTION symbols. We will
+      // synthesize a section symbol if no symbol is defined at offset 0.
+      //
+      // For a mapping symbol, store it within both AllSymbols and
+      // AllMappingSymbols. If --show-all-symbols is unspecified, its label will
+      // not be printed in disassembly listing.
+      if (getElfSymbolType(Obj, Symbol) != ELF::STT_SECTION &&
+          hasMappingSymbols(Obj)) {
+        section_iterator SecI = unwrapOrError(Symbol.getSection(), FileName);
+        if (SecI != Obj.section_end()) {
+          uint64_t SectionAddr = SecI->getAddress();
+          uint64_t Address = cantFail(Symbol.getAddress());
+          StringRef Name = *NameOrErr;
+          if (Name.consume_front("$") && Name.size() &&
+              strchr("adtx", Name[0])) {
+            AllMappingSymbols[*SecI].emplace_back(Address - SectionAddr,
+                                                  Name[0]);
+            AllSymbols[*SecI].push_back(
+                createSymbolInfo(Obj, Symbol, /*MappingSymbol=*/true));
+          }
+        }
+      }
       continue;
+    }
 
     if (MachO) {
       // __mh_(execute|dylib|dylinker|bundle|preload|object)_header are special
       // symbols that support MachO header introspection. They do not bind to
       // code locations and are irrelevant for disassembly.
       if (NameOrErr->startswith("__mh_") && NameOrErr->endswith("_header"))
         continue;
       // Don't ask a Mach-O STAB symbol for its section unless you know that
for (const SectionRef &Section : ToolSectionFilter(Obj)) {
 
     // For relocatable object files, read the LLVM_BB_ADDR_MAP section
     // corresponding to this section, if present.
     if (SymbolizeOperands && Obj.isRelocatableObject())
       ReadBBAddrMap(Section.getIndex());
 
     // Get the list of all the symbols in this section.
     SectionSymbolsTy &Symbols = AllSymbols[Section];
-    std::vector<MappingSymbolPair> MappingSymbols;
-    if (hasMappingSymbols(Obj)) {
-      for (const auto &Symb : Symbols) {
-        uint64_t Address = Symb.Addr;
-        StringRef Name = Symb.Name;
-        if (Name.startswith("$d"))
-          MappingSymbols.emplace_back(Address - SectionAddr, 'd');
-        if (Name.startswith("$x"))
-          MappingSymbols.emplace_back(Address - SectionAddr, 'x');
-        if (Name.startswith("$a"))
-          MappingSymbols.emplace_back(Address - SectionAddr, 'a');
-        if (Name.startswith("$t"))
-          MappingSymbols.emplace_back(Address - SectionAddr, 't');
-      }
-    }
-
+    auto &MappingSymbols = AllMappingSymbols[Section];
     llvm::sort(MappingSymbols);
 
     ArrayRef<uint8_t> Bytes = arrayRefFromStringRef(
         unwrapOrError(Section.getContents(), Obj.getFileName()));
 
     std::vector<std::unique_ptr<std::string>> SynthesizedLabelNames;
     if (Obj.isELF() && Obj.getArch() == Triple::amdgcn) {
       // AMDGPU disassembler uses symbolizer for printing labels
       addSymbolizer(Ctx, TheTarget, TripleName, DisAsm, SectionAddr, Bytes,
                     Symbols, SynthesizedLabelNames);
     }
 
     StringRef SegmentName = getSegmentName(MachO, Section);
     StringRef SectionName = unwrapOrError(Section.getName(), Obj.getFileName());
     // If the section has no symbol at the start, just insert a dummy one.
-    if (Symbols.empty() || Symbols[0].Addr != 0) {
-      Symbols.insert(Symbols.begin(),
-                     createDummySymbolInfo(Obj, SectionAddr, SectionName,
-                                           Section.isText() ? ELF::STT_FUNC
-                                                            : ELF::STT_OBJECT));
+    // Without --show-all-symbols, also insert one if all symbols at the start
+    // are mapping symbols.
+    bool CreateDummy = Symbols.empty();
+    if (!CreateDummy) {
+      CreateDummy = true;
+      for (auto &Sym : Symbols) {
+        if (Sym.Addr != SectionAddr)
+          break;
+        if (!Sym.IsMappingSymbol || ShowAllSymbols)
+          CreateDummy = false;
+      }
+    }
+    if (CreateDummy) {
+      SymbolInfoTy Sym = createDummySymbolInfo(
+          Obj, SectionAddr, SectionName,
+          Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT);
+      if (Obj.isXCOFF())
+        Symbols.insert(Symbols.begin(), Sym);
+      else
+        Symbols.insert(llvm::lower_bound(Symbols, Sym), Sym);
     }
 
     SmallString<40> Comments;
     raw_svector_ostream CommentStream(Comments);
 
     uint64_t VMAAdjustment = 0;
     if (shouldAdjustVA(Section))
       VMAAdjustment = AdjustVMA;
for (size_t SI = 0, SE = Symbols.size(); SI != SE;) {
             FoundAny = true;
           }
         }
 
         // And if none of the symbols here is one that the user asked for, skip
         // disassembling this entire chunk of code.
         if (!FoundAny)
           continue;
-      } else {
+      } else if (!SymbolsHere[DisplaySymIndex].IsMappingSymbol) {
         // Otherwise, print whichever symbol at this location is last in the
         // Symbols array, because that array is pre-sorted in a way intended to
         // correlate with priority of which symbol to display.
         SymsToPrint[DisplaySymIndex] = true;
       }
 
       // Now that we know we're disassembling this section, override the choice
       // of which symbols to display by printing _all_ of them at this address
for (size_t SI = 0, SE = Symbols.size(); SI != SE;) {
       for (size_t i = 0; i < SymbolsHere.size(); ++i)
         FoundDisasmSymbolSet.insert(SymNamesHere[i]);
 
       // The end is the section end, the beginning of the next symbol, or
       // --stop-address.
       uint64_t End = std::min<uint64_t>(SectionAddr + SectSize, StopAddress);
       if (SI < SE)
         End = std::min(End, Symbols[SI].Addr);
       if (Start >= End || End <= StartAddress)
         continue;
       Start -= SectionAddr;
       End -= SectionAddr;
 
       if (!PrintedSection) {
         PrintedSection = true;
         outs() << "\nDisassembly of section ";
         if (!SegmentName.empty())
           outs() << SegmentName << ",";
         outs() << SectionName << ":\n";
       }
 
-      outs() << '\n';
-
+      bool PrintedLabel = false;
       for (size_t i = 0; i < SymbolsHere.size(); ++i) {
         if (!SymsToPrint[i])
           continue;
 
         const SymbolInfoTy &Symbol = SymbolsHere[i];
         const StringRef SymbolName = SymNamesHere[i];
 
+        if (!PrintedLabel) {
+          outs() << '\n';
+          PrintedLabel = true;
+        }
         if (LeadingAddr)
           outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ",
                            SectionAddr + Start + VMAAdjustment);
         if (Obj.isXCOFF() && SymbolDescription) {
           outs() << getXCOFFSymbolDescription(Symbol, SymbolName) << ":\n";
         } else
           outs() << '<' << SymbolName << ">:\n";
       }
for (size_t SI = 0, SE = Symbols.size(); SI != SE;) {
                    TargetSectionSymbols) {
                 auto It = llvm::partition_point(
                     *TargetSymbols,
                     [=](const SymbolInfoTy &O) { return O.Addr <= Target; });
                 while (It != TargetSymbols->begin()) {
                   --It;
                   // Skip mapping symbols to avoid possible ambiguity as they
                   // do not allow uniquely identifying the target address.
-                  if (!hasMappingSymbols(Obj) || !isMappingSymbol(*It)) {
+                  if (!It->IsMappingSymbol) {
                     TargetSym = &*It;
                     break;
                   }
                 }
                 if (TargetSym)
                   break;
               }