[mlir] Update SVE integration tests to use mlir-cpu-runner 1/N

[awarzynski]

Summary

With the recent addition of "-mattr" and "-march" to the list of options
supported by mlir-cpu-runner [1], the SVE integration
tests can be updated to use mlir-cpu-runner instead of lli. This will
allow better code re-use and more consistency

This patch updates 2 tests to demonstrate the new logic. The remaining
tests will be updated in the follow-up patches.

[1] https://reviews.llvm.org/D146917

Depends on D155403

[awarzynski]

Reset the changes in concatenate_dim_1.mlir

[awarzynski]

Move the new LIT logic to mlir/test/Integration/lit.local.cfg. This simplifies this patch and allows better code re-use.

[jsetoain]

Looks good to me, and a much cleaner solution!

mlir/test/CMakeLists.txt

25–26

Now that the cpu-runner supports -mattr/-march, we can get rid of this entirely. It's okay if you're waiting for N/N to remove it, just making a note here :-)

[awarzynski]

mlir/test/CMakeLists.txt

25–26

Might take a while to get there 😂 . But lets be optimistic!

Thanks for taking a look :)

[cseo]

This change seems to be breaking one of the buildbots (https://lab.llvm.org/buildbot/#/builders/179/builds/6704). This is a Neoverse N1, which doesn't have SVE. So I believe this should be checking whether the CPU supports SVE or not.

[awarzynski]

In D155405#4518956, @cseo wrote:

This change seems to be breaking one of the buildbots (https://lab.llvm.org/buildbot/#/builders/179/builds/6704). This is a Neoverse N1, which doesn't have SVE. So I believe this should be checking whether the CPU supports SVE or not.

Thanks for letting me know and apologies for the disruption. Yes, that bot does not support SVE, but allows us to run SVE tests under emulation. In this patch I forgot to add emulator to the invocation in mlir-cpu-runner. Fixed in: https://github.com/llvm/llvm-project/commit/64466b777bec33f5830c08bacf07b2e30c0ae4a2.

[awarzynski]

In D155405#4518956, @cseo wrote:

This change seems to be breaking one of the buildbots (https://lab.llvm.org/buildbot/#/builders/179/builds/6704). This is a Neoverse N1, which doesn't have SVE. So I believe this should be checking whether the CPU supports SVE or not.

Apologies, my previous "fix" exposed another missing bit and the bot is still failing :( This should be sufficient: https://reviews.llvm.org/D155920. I tested on a non-SVE machine.

mlir/test/CMakeLists.txt

 
 if (MLIR_INCLUDE_INTEGRATION_TESTS)
   set(INTEL_SDE_EXECUTABLE "" CACHE STRING
       "If set, arch-specific integration tests are run with Intel SDE.")
   set(ARM_EMULATOR_EXECUTABLE "" CACHE STRING
       "If set, arch-specific Arm integration tests are run with an emulator.")
   set(ARM_EMULATOR_OPTIONS "" CACHE STRING
       "If arch-specific Arm integration tests run emulated, pass these as parameters to the emulator.")
+  set(ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE "" CACHE STRING
+      "If arch-specific Arm integration tests run emulated, use this Arm native mlir-cpu-runner.")
   set(ARM_EMULATOR_LLI_EXECUTABLE "" CACHE STRING
       "If arch-specific Arm integration tests run emulated, use this Arm native lli.")
   set(ARM_EMULATOR_UTILS_LIB_DIR "" CACHE STRING
       "If arch-specific Arm integration tests run emulated, find Arm native utility libraries in this directory.")
   option(MLIR_RUN_AMX_TESTS "Run AMX tests.")
   option(MLIR_RUN_X86VECTOR_TESTS "Run X86Vector tests.")
   option(MLIR_RUN_CUDA_TENSOR_CORE_TESTS "Run CUDA Tensor core WMMA tests.")
   option(MLIR_RUN_CUDA_SM80_TESTS "Run CUDA A100 tests.")
   option(MLIR_RUN_CUDA_SM80_LT_TESTS "Run CUDA A100 structured sparsity tests.")
   option(MLIR_RUN_ARM_SVE_TESTS "Run Arm SVE tests.")

mlir/test/Integration/Dialect/SparseTensor/CPU/lit.local.cfg

 import sys
 from lit.llvm import llvm_config
 
 # FIXME: %mlir_native_utils_lib_dir is set incorrectly on Windows
 if sys.platform == "win32":
     config.unsupported = True
 
 # ArmSVE tests must be enabled via build flag.
 if config.mlir_run_arm_sve_tests:
-    config.substitutions.append(("%ENABLE_VLA", "true"))
-    config.substitutions.append(
-        ("%VLA_ARCH_ATTR_OPTIONS", '--march=aarch64 --mattr="+sve"')
-    )
+    config.substitutions.append(('%ENABLE_VLA', 'true'))
+    config.substitutions.append(('%VLA_ARCH_ATTR_OPTIONS', '--march=aarch64 --mattr="+sve"'))
+    mlir_cpu_runner_cmd = 'mlir-cpu-runner'
+    if config.arm_emulator_mlir_cpu_runner_executable:
+       mlir_cpu_runner_cmd = config.arm_emulator_mlir_cpu_runner_executable
+
+    if config.arm_emulator_utils_lib_dir:
+        config.substitutions.append(('%mlir_native_utils_lib_dir', config.arm_emulator_utils_lib_dir))
+    else:
+        config.substitutions.append(('%mlir_native_utils_lib_dir', config.mlir_lib_dir))
+
+    if config.arm_emulator_executable:
+        # Run test in emulator (qemu or armie).
+        emulation_cmd = config.arm_emulator_executable
+        if config.arm_emulator_options:
+            emulation_cmd = emulation_cmd + ' ' + config.arm_emulator_options
+        emulation_cmd = emulation_cmd + ' ' + mlir_cpu_runner_cmd
+        config.substitutions.append(('%mlir_cpu_runner_vla', emulation_cmd))
+    else:
+        config.substitutions.append(('%mlir_cpu_runner_vla', mlir_cpu_runner_cmd))
 else:
     config.substitutions.append(("%ENABLE_VLA", "false"))
     config.substitutions.append(("%VLA_ARCH_ATTR_OPTIONS", ""))
+    config.substitutions.append(("%mlir_cpu_runner_vla", "mlir-cpu-runner"))
     config.substitutions.append(("%mlir_native_utils_lib_dir", config.mlir_lib_dir))

mlir/test/Integration/Dialect/SparseTensor/CPU/sparse_unary.mlir

+// DEFINE: %{option_vec} = 
 // DEFINE: %{option} = enable-runtime-library=true
+// DEFINE: %{run_option} =
+// DEFINE: %{cpu_runner} = mlir-cpu-runner
+
 // DEFINE: %{compile} = mlir-opt %s --sparse-compiler=%{option}
-// DEFINE: %{run} = mlir-cpu-runner \
+// DEFINE: %{run} = %{cpu_runner} \
 // DEFINE:  -e entry -entry-point-result=void  \
-// DEFINE:  -shared-libs=%mlir_c_runner_utils | \
+// DEFINE:  -shared-libs=%mlir_c_runner_utils %{run_option} | \
 // DEFINE: FileCheck %s
 //
 // RUN: %{compile} | %{run}
 //
 // Do the same run, but now with direct IR generation.
 // REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true"
 // RUN: %{compile} | %{run}
 //
 // Do the same run, but now with direct IR generation and vectorization.
-// REDEFINE: %{option} = "enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true"
+// REDEFINE: %{option_vec} = enable-runtime-library=false enable-buffer-initialization=true vl=2 reassociate-fp-reductions=true enable-index-optimizations=true
+// REDEFINE: %{option} = "%{option_vec}"
 // RUN: %{compile} | %{run}
 
-// Do the same run, but now with direct IR generation and, if available, VLA
-// vectorization.
-// REDEFINE: %{option} = "enable-runtime-library=false vl=4 enable-buffer-initialization=true reassociate-fp-reductions=true enable-index-optimizations=true enable-arm-sve=%ENABLE_VLA"
-// REDEFINE: %{run} = %lli_host_or_aarch64_cmd \
-// REDEFINE:   --entry-function=entry_lli \
-// REDEFINE:   --extra-module=%S/Inputs/main_for_lli.ll \
-// REDEFINE:   %VLA_ARCH_ATTR_OPTIONS \
-// REDEFINE:   --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
-// REDEFINE: FileCheck %s
-// RUN: %{compile} | mlir-translate -mlir-to-llvmir | %{run}
+// Do the same run, but with VLA vectorization.
+// REDEFINE: %{option} = "enable-arm-sve=true %{option_vec}"
+// REDEFINE: %{cpu_runner} = %mlir_cpu_runner_vla
+// REDEFINE: %{run_option} = %VLA_ARCH_ATTR_OPTIONS
+// RUN: %if mlir_arm_sve_tests %{ %{compile} | %{run} %}
 
 #SparseVector = #sparse_tensor.encoding<{lvlTypes = ["compressed"]}>
 #DCSR = #sparse_tensor.encoding<{lvlTypes = ["compressed", "compressed"]}>
 
 //
 // Traits for tensor operations.
 //
 #trait_vec = {

mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/lit.local.cfg

 import sys
 
 # ArmSVE tests must be enabled via build flag.
 if not config.mlir_run_arm_sve_tests:
     config.unsupported = True
 
 # No JIT on win32.
 if sys.platform == "win32":
     config.unsupported = True
+
+mlir_cpu_runner_cmd = 'mlir-cpu-runner'
+if config.arm_emulator_mlir_cpu_runner_executable:
+    mlir_cpu_runner_cmd = config.arm_emulator_mlir_cpu_runner_executable
+
+config.substitutions.append(('%mlir_native_utils_lib_dir',
+    config.arm_emulator_utils_lib_dir or config.mlir_lib_dir))
+
+if config.arm_emulator_executable:
+    # Run test in emulator (qemu or armie)
+    emulation_cmd = config.arm_emulator_executable
+    if config.arm_emulator_options:
+        emulation_cmd = emulation_cmd + ' ' + config.arm_emulator_options
+    emulation_cmd = emulation_cmd + ' ' + mlir_cpu_runner_cmd
+    config.substitutions.append(('%mlir-cpu-runner-vla', emulation_cmd))
+else:
+    config.substitutions.append(('%mlir-cpu-runner-vla', mlir_cpu_runner_cmd))

mlir/test/Integration/Dialect/Vector/CPU/ArmSVE/test-sve.mlir

 // RUN: mlir-opt %s -lower-affine -convert-scf-to-cf -convert-vector-to-llvm="enable-arm-sve" -finalize-memref-to-llvm -convert-func-to-llvm -convert-arith-to-llvm -canonicalize | \
-// RUN: mlir-translate -mlir-to-llvmir | \
-// RUN: %lli_aarch64_cmd --entry-function=entry --march=aarch64 --mattr="+sve" --dlopen=%mlir_native_utils_lib_dir/libmlir_c_runner_utils%shlibext | \
+// RUN: %mlir-cpu-runner-vla -e=entry -entry-point-result=void --march=aarch64 --mattr="+sve" -shared-libs=%mlir_lib_dir/libmlir_c_runner_utils%shlibext | \
 // RUN: FileCheck %s
 
 // Note: To run this test, your CPU must support SVE
 
 // VLA memcopy
 func.func @kernel_copy(%src : memref<?xi64>, %dst : memref<?xi64>, %size : index) {
   %c0 = arith.constant 0 : index
   %c2 = arith.constant 2 : index
scf.for %i0 = %c0 to %N step %s {
     %la = vector.maskedload %a[%i0], %mask, %v0f : memref<?xf32>, vector<[4]xi1>, vector<[4]xf32> into vector<[4]xf32>
     %lb = vector.maskedload %b[%i0], %mask, %v0f : memref<?xf32>, vector<[4]xi1>, vector<[4]xf32> into vector<[4]xf32>
     %lc = arith.addf %la, %lb : vector<[4]xf32>
     vector.maskedstore %c[%i0], %mask, %lc : memref<?xf32>, vector<[4]xi1>, vector<[4]xf32>
   }
   return
 }
 
-func.func @entry() -> i32 {
+func.func @entry() {
   %i0 = arith.constant 0: i64
   %i1 = arith.constant 1: i64
-  %r0 = arith.constant 0: i32
   %f0 = arith.constant 0.0: f32
   %c0 = arith.constant 0: index
   %c1 = arith.constant 1: index
   %c2 = arith.constant 2: index
   %c4 = arith.constant 4: index
   %c8 = arith.constant 8: index
   %c32 = arith.constant 32: index
   %c33 = arith.constant 33: index
func.func @entry() {
   memref.dealloc %a_copy : memref<32xi64>
   memref.dealloc %b      : memref<32xi64>
   memref.dealloc %c      : memref<32xi64>
   memref.dealloc %d      : memref<32xi64>
   memref.dealloc %e      : memref<33xf32>
   memref.dealloc %f      : memref<33xf32>
   memref.dealloc %g      : memref<36xf32>
 
-  return %r0 : i32
+  return
 }

mlir/test/lit.site.cfg.py.in

 config.mlir_run_x86vector_tests = @MLIR_RUN_X86VECTOR_TESTS@
 config.mlir_run_riscv_vector_tests = "@MLIR_RUN_RISCV_VECTOR_TESTS@"
 config.mlir_run_cuda_tensor_core_tests = @MLIR_RUN_CUDA_TENSOR_CORE_TESTS@
 config.mlir_run_cuda_sm80_tests = @MLIR_RUN_CUDA_SM80_TESTS@
 config.mlir_run_cuda_sm80_lt_tests = @MLIR_RUN_CUDA_SM80_LT_TESTS@
 config.mlir_include_integration_tests = @MLIR_INCLUDE_INTEGRATION_TESTS@
 config.arm_emulator_executable = "@ARM_EMULATOR_EXECUTABLE@"
 config.arm_emulator_options = "@ARM_EMULATOR_OPTIONS@"
+config.arm_emulator_mlir_cpu_runner_executable = "@ARM_EMULATOR_MLIR_CPU_RUNNER_EXECUTABLE@"
 config.arm_emulator_lli_executable = "@ARM_EMULATOR_LLI_EXECUTABLE@"
 config.arm_emulator_utils_lib_dir = "@ARM_EMULATOR_UTILS_LIB_DIR@"
 config.riscv_vector_emulator_executable = "@RISCV_VECTOR_EMULATOR_EXECUTABLE@"
 config.riscv_vector_emulator_options = "@RISCV_VECTOR_EMULATOR_OPTIONS@"
 config.riscv_emulator_lli_executable = "@RISCV_EMULATOR_LLI_EXECUTABLE@"
 config.riscv_emulator_utils_lib_dir = "@RISCV_EMULATOR_UTILS_LIB_DIR@"
 
 import lit.llvm
 lit.llvm.initialize(lit_config, config)
 
 # Let the main config do the real work.
 lit_config.load_config(config, "@MLIR_SOURCE_DIR@/test/lit.cfg.py")