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[AArch64] Add scheduling model for Neoverse V1
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Authored by evandro on Jul 7 2023, 8:13 PM.

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Summary

Add the scheduling model for Neoverse V1.

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evandro created this revision.Jul 7 2023, 8:13 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 7 2023, 8:13 PM
evandro requested review of this revision.Jul 7 2023, 8:13 PM
Herald added a project: Restricted Project. · View Herald TranscriptJul 7 2023, 8:13 PM

Cool! Is there a code snippet where llvm-mca can show the differences between the N* and V*?

evandro updated this revision to Diff 538390.Jul 8 2023, 2:11 PM
evandro edited the summary of this revision. (Show Details)
evandro added reviewers: dmgreen, rjj, c-rhodes.

Add the tests for almost all the instructions.

evandro updated this revision to Diff 538397.Jul 8 2023, 4:36 PM

Update the respective llvm-mca tests.

tschuett added inline comments.Jul 8 2023, 9:06 PM
llvm/test/tools/llvm-mca/AArch64/Neoverse/512tvb-sve-instructions.s
4

Nit: V1 model?

Looks like another good addition. Thanks for working on this.

llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
29

Does it help to add SVE2 too?

58

J is invented to model the instructions that set flags, that have a throughput of 3?

471

These are mostly ALU instructions.

llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
22

The Neoverse-V2 version of this file has some extra instructions like addv's, aes and some dup instructions, among others.

evandro marked an inline comment as done.Jul 11 2023, 3:19 PM
evandro added inline comments.
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
29

The Neoverse V1 does not support Armv9.

58

Correct, gleaned from similar AArch32 instructions.

llvm/test/tools/llvm-mca/AArch64/Neoverse/512tvb-sve-instructions.s
4

Perhaps it deserves a more comprehensive test case than just a single instruction.

llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
22

It has many more instructions, but SVE2 ones. I'll add more coverage here.

evandro marked an inline comment as done.Jul 11 2023, 5:01 PM
evandro updated this revision to Diff 539805.Jul 12 2023, 5:30 PM
dmgreen added inline comments.Jul 13 2023, 1:29 AM
llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
29

Yep, that's my point (If I understand what you are saying). It doesn't have SVE2, only SVE1. And doesn't have SME and MTE too. Hence adding it to the list of unsupported features could help cut down on the number of unsupported instructions that it thinks are missing.

llvm/test/tools/llvm-mca/AArch64/Neoverse/512tvb-sve-instructions.s
4

Sounds like the comment still needs updating.

llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
22

Thanks - And what about the extra Neon instructions?

evandro marked 2 inline comments as done.Jul 13 2023, 9:48 AM
evandro added inline comments.
llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
22

There were only a handfull of Neon instructions missing that were added here.

evandro updated this revision to Diff 540087.Jul 13 2023, 9:48 AM
evandro marked an inline comment as done.
evandro updated this revision to Diff 540160.Jul 13 2023, 12:37 PM
dmgreen added inline comments.Jul 14 2023, 3:32 AM
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
950–951

This is only used in regexes, so likely doesn't need to change. Is NeoverseMULIdiomPred being added because the V1 uses WriteIM64 and that is used for mulhi too? They both have overrides for SMULHrr/UMULHrr, so I'm not sure this will do anything over using IsReg3ZeroPred directly.

Otherwise it looks like IsReg3ZeroPred is now unused, if you did have a reason to stick with NeoverseMULIdiomPred.

llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
22

I still see differences between

diff llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s

It would be good to make sure that we are not missing coverage of some of the neon instructions.

evandro marked an inline comment as done.Jul 14 2023, 5:39 PM
evandro added inline comments.
llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
950–951

In V1, multiply high has its own SchedWriteRes. NeoverseMULIdiomPred does use the predicate CheckIsReg3Zero, on which IsReg3ZeroPred is based on.

evandro updated this revision to Diff 540606.Jul 14 2023, 5:42 PM
dmgreen accepted this revision.Jul 17 2023, 12:54 AM

Thanks. The latest cleanups look nice. LGTM, Thanks for the patch.

This revision is now accepted and ready to land.Jul 17 2023, 12:54 AM
This revision was landed with ongoing or failed builds.Jul 17 2023, 3:42 PM
This revision was automatically updated to reflect the committed changes.
llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s