[M68k] Replace OperandMatchResultTy with ParseStatus (NFC)

[barannikov88]

Summary

ParseStatus is slightly more convenient to use due to implicit
conversion from bool, which allows to do something like:

return Error(L, "msg");

when with MatchOperandResultTy it had to be:

Error(L, "msg");
return MatchOperand_ParseFail;

It also has more appropriate name since parse* methods are not only for
parsing operands.

[barannikov88]

Drop redundant braces in one more place

[myhsu]

This is neat, thanks!

llvm/lib/Target/M68k/AsmParser/M68kAsmParser.cpp

 #include "M68kGenAsmMatcher.inc"
 
   // Helpers for Match&Emit.
   bool invalidOperand(const SMLoc &Loc, const OperandVector &Operands,
                       const uint64_t &ErrorInfo);
   bool missingFeature(const SMLoc &Loc, const uint64_t &ErrorInfo);
   bool emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const;
   bool parseRegisterName(MCRegister &RegNo, SMLoc Loc, StringRef RegisterName);
-  OperandMatchResultTy parseRegister(MCRegister &RegNo);
+  ParseStatus parseRegister(MCRegister &RegNo);
 
   // Parser functions.
   void eatComma();
 
   bool isExpr();
-  OperandMatchResultTy parseImm(OperandVector &Operands);
-  OperandMatchResultTy parseMemOp(OperandVector &Operands);
-  OperandMatchResultTy parseRegOrMoveMask(OperandVector &Operands);
+  ParseStatus parseImm(OperandVector &Operands);
+  ParseStatus parseMemOp(OperandVector &Operands);
+  ParseStatus parseRegOrMoveMask(OperandVector &Operands);
 
 public:
   M68kAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
                 const MCInstrInfo &MII, const MCTargetOptions &Options)
       : MCTargetAsmParser(Options, STI, MII), STI(STI), Parser(Parser) {
     MCAsmParserExtension::Initialize(Parser);
     MRI = getContext().getRegisterInfo();
 
if (RegIndex >= 8 || RegisterNameLower.size() > 3)
       return false;
     RegNo = getRegisterByIndex(16 + RegIndex);
     return true;
   }
 
   return false;
 }
 
-OperandMatchResultTy M68kAsmParser::parseRegister(MCRegister &RegNo) {
+ParseStatus M68kAsmParser::parseRegister(MCRegister &RegNo) {
   bool HasPercent = false;
   AsmToken PercentToken;
 
   LLVM_DEBUG(dbgs() << "parseRegister "; getTok().dump(dbgs()); dbgs() << "\n");
 
   if (getTok().is(AsmToken::Percent)) {
     HasPercent = true;
     PercentToken = Lex();
   } else if (!RegisterPrefixOptional.getValue()) {
-    return MatchOperand_NoMatch;
+    return ParseStatus::NoMatch;
   }
 
   if (!Parser.getTok().is(AsmToken::Identifier)) {
     if (HasPercent) {
       getLexer().UnLex(PercentToken);
     }
-    return MatchOperand_NoMatch;
+    return ParseStatus::NoMatch;
   }
 
   auto RegisterName = Parser.getTok().getString();
   if (!parseRegisterName(RegNo, Parser.getLexer().getLoc(), RegisterName)) {
     if (HasPercent) {
       getLexer().UnLex(PercentToken);
     }
-    return MatchOperand_NoMatch;
+    return ParseStatus::NoMatch;
   }
 
   Parser.Lex();
-  return MatchOperand_Success;
+  return ParseStatus::Success;
 }
 
 bool M68kAsmParser::parseRegister(MCRegister &RegNo, SMLoc &StartLoc,
                                   SMLoc &EndLoc) {
   auto Result = tryParseRegister(RegNo, StartLoc, EndLoc);
   if (Result != MatchOperand_Success) {
     return Error(StartLoc, "expected register");
   }
 
   return false;
 }
 
 OperandMatchResultTy M68kAsmParser::tryParseRegister(MCRegister &RegNo,
                                                      SMLoc &StartLoc,
                                                      SMLoc &EndLoc) {
   StartLoc = getLexer().getLoc();
-  auto Result = parseRegister(RegNo);
+  ParseStatus Result = parseRegister(RegNo);
   EndLoc = getLexer().getLoc();
   return Result;
 }
 
 bool M68kAsmParser::isExpr() {
   switch (Parser.getTok().getKind()) {
   case AsmToken::Identifier:
   case AsmToken::Integer:
     return true;
   case AsmToken::Minus:
     return getLexer().peekTok().getKind() == AsmToken::Integer;
 
   default:
     return false;
   }
 }
 
-OperandMatchResultTy M68kAsmParser::parseImm(OperandVector &Operands) {
-  if (getLexer().isNot(AsmToken::Hash)) {
-    return MatchOperand_NoMatch;
-  }
+ParseStatus M68kAsmParser::parseImm(OperandVector &Operands) {
+  if (getLexer().isNot(AsmToken::Hash))
+    return ParseStatus::NoMatch;
   SMLoc Start = getLexer().getLoc();
   Parser.Lex();
 
   SMLoc End;
   const MCExpr *Expr;
 
-  if (getParser().parseExpression(Expr, End)) {
-    return MatchOperand_ParseFail;
-  }
+  if (getParser().parseExpression(Expr, End))
+    return ParseStatus::Failure;
 
   Operands.push_back(M68kOperand::createImm(Expr, Start, End));
-  return MatchOperand_Success;
+  return ParseStatus::Success;
 }
 
-OperandMatchResultTy M68kAsmParser::parseMemOp(OperandVector &Operands) {
+ParseStatus M68kAsmParser::parseMemOp(OperandVector &Operands) {
   SMLoc Start = getLexer().getLoc();
   bool IsPD = false;
   M68kMemOp MemOp;
 
   // Check for a plain register or register mask.
-  auto Result = parseRegOrMoveMask(Operands);
-  if (Result != llvm::MatchOperand_NoMatch) {
+  ParseStatus Result = parseRegOrMoveMask(Operands);
+  if (!Result.isNoMatch())
     return Result;
-  }
 
   // Check for pre-decrement & outer displacement.
   bool HasDisplacement = false;
   if (getLexer().is(AsmToken::Minus)) {
     IsPD = true;
     Parser.Lex();
   } else if (isExpr()) {
-    if (Parser.parseExpression(MemOp.OuterDisp)) {
-      return MatchOperand_ParseFail;
-    }
+    if (Parser.parseExpression(MemOp.OuterDisp))
+      return ParseStatus::Failure;
     HasDisplacement = true;
   }
 
   if (getLexer().isNot(AsmToken::LParen)) {
     if (HasDisplacement) {
       MemOp.Op = M68kMemOp::Kind::Addr;
       Operands.push_back(
           M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
-      return MatchOperand_Success;
-    } else if (IsPD) {
-      Error(getLexer().getLoc(), "expected (");
-      return MatchOperand_ParseFail;
+      return ParseStatus::Success;
     }
+    if (IsPD)
+      return Error(getLexer().getLoc(), "expected (");
 
-    return MatchOperand_NoMatch;
+    return ParseStatus::NoMatch;
   }
   Parser.Lex();
 
   // Check for constant dereference & MIT-style displacement
   if (!HasDisplacement && isExpr()) {
-    if (Parser.parseExpression(MemOp.OuterDisp)) {
-      return MatchOperand_ParseFail;
-    }
+    if (Parser.parseExpression(MemOp.OuterDisp))
+      return ParseStatus::Failure;
     HasDisplacement = true;
 
     // If we're not followed by a comma, we're a constant dereference.
     if (getLexer().isNot(AsmToken::Comma)) {
       MemOp.Op = M68kMemOp::Kind::Addr;
       Operands.push_back(
           M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
-      return MatchOperand_Success;
+      return ParseStatus::Success;
     }
 
     Parser.Lex();
   }
 
   Result = parseRegister(MemOp.OuterReg);
-  if (Result == MatchOperand_ParseFail) {
-    return MatchOperand_ParseFail;
-  }
+  if (Result.isFailure())
+    return ParseStatus::Failure;
 
-  if (Result != MatchOperand_Success) {
-    Error(getLexer().getLoc(), "expected register");
-    return MatchOperand_ParseFail;
-  }
+  if (!Result.isSuccess())
+    return Error(getLexer().getLoc(), "expected register");
 
   // Check for Index.
   bool HasIndex = false;
   if (Parser.getTok().is(AsmToken::Comma)) {
     Parser.Lex();
 
     Result = parseRegister(MemOp.InnerReg);
-    if (Result == MatchOperand_ParseFail) {
+    if (Result.isFailure())
       return Result;
-    }
 
-    if (Result == MatchOperand_NoMatch) {
-      Error(getLexer().getLoc(), "expected register");
-      return MatchOperand_ParseFail;
-    }
+    if (Result.isNoMatch())
+      return Error(getLexer().getLoc(), "expected register");
 
     // TODO: parse size, scale and inner displacement.
     MemOp.Size = 4;
     MemOp.Scale = 1;
     MemOp.InnerDisp = MCConstantExpr::create(0, Parser.getContext(), true, 4);
     HasIndex = true;
   }
 
-  if (Parser.getTok().isNot(AsmToken::RParen)) {
-    Error(getLexer().getLoc(), "expected )");
-    return MatchOperand_ParseFail;
-  }
+  if (Parser.getTok().isNot(AsmToken::RParen))
+    return Error(getLexer().getLoc(), "expected )");
   Parser.Lex();
 
   bool IsPI = false;
   if (!IsPD && Parser.getTok().is(AsmToken::Plus)) {
     Parser.Lex();
     IsPI = true;
   }
 
   SMLoc End = getLexer().getLoc();
 
   unsigned OpCount = IsPD + IsPI + (HasIndex || HasDisplacement);
-  if (OpCount > 1) {
-    Error(Start, "only one of post-increment, pre-decrement or displacement "
-                 "can be used");
-    return MatchOperand_ParseFail;
-  }
+  if (OpCount > 1)
+    return Error(Start, "only one of post-increment, pre-decrement or "
+                        "displacement can be used");
 
   if (IsPD) {
     MemOp.Op = M68kMemOp::Kind::RegPreDecrement;
   } else if (IsPI) {
     MemOp.Op = M68kMemOp::Kind::RegPostIncrement;
   } else if (HasIndex) {
     MemOp.Op = M68kMemOp::Kind::RegIndirectDisplacementIndex;
   } else if (HasDisplacement) {
     MemOp.Op = M68kMemOp::Kind::RegIndirectDisplacement;
   } else {
     MemOp.Op = M68kMemOp::Kind::RegIndirect;
   }
 
   Operands.push_back(M68kOperand::createMemOp(MemOp, Start, End));
-  return MatchOperand_Success;
+  return ParseStatus::Success;
 }
 
-OperandMatchResultTy
-M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
+ParseStatus M68kAsmParser::parseRegOrMoveMask(OperandVector &Operands) {
   SMLoc Start = getLexer().getLoc();
   M68kMemOp MemOp(M68kMemOp::Kind::RegMask);
   MemOp.RegMask = 0;
 
   for (;;) {
     bool IsFirstRegister =
         (MemOp.Op == M68kMemOp::Kind::RegMask) && (MemOp.RegMask == 0);
 
     MCRegister FirstRegister;
-    auto Result = parseRegister(FirstRegister);
-    if (IsFirstRegister && (Result == llvm::MatchOperand_NoMatch)) {
-      return MatchOperand_NoMatch;
-    }
-    if (Result != llvm::MatchOperand_Success) {
-      Error(getLexer().getLoc(), "expected start register");
-      return MatchOperand_ParseFail;
-    }
+    ParseStatus Result = parseRegister(FirstRegister);
+    if (IsFirstRegister && Result.isNoMatch())
+      return ParseStatus::NoMatch;
+    if (!Result.isSuccess())
+      return Error(getLexer().getLoc(), "expected start register");
 
     MCRegister LastRegister = FirstRegister;
     if (parseOptionalToken(AsmToken::Minus)) {
       Result = parseRegister(LastRegister);
-      if (Result != llvm::MatchOperand_Success) {
-        Error(getLexer().getLoc(), "expected end register");
-        return MatchOperand_ParseFail;
-      }
+      if (!Result.isSuccess())
+        return Error(getLexer().getLoc(), "expected end register");
     }
 
     unsigned FirstRegisterIndex = getRegisterIndex(FirstRegister);
     unsigned LastRegisterIndex = getRegisterIndex(LastRegister);
 
     uint16_t NumNewBits = LastRegisterIndex - FirstRegisterIndex + 1;
     uint16_t NewMaskBits = ((1 << NumNewBits) - 1) << FirstRegisterIndex;
 
     if (IsFirstRegister && (FirstRegister == LastRegister)) {
       // First register range is a single register, simplify to just Reg
       // so that it matches more operands.
       MemOp.Op = M68kMemOp::Kind::Reg;
       MemOp.OuterReg = FirstRegister;
     } else {
       if (MemOp.Op == M68kMemOp::Kind::Reg) {
         // This is the second register being specified - expand the Reg operand
         // into a mask first.
         MemOp.Op = M68kMemOp::Kind::RegMask;
         MemOp.RegMask = 1 << getRegisterIndex(MemOp.OuterReg);
 
-        if (MemOp.RegMask == 0) {
-          Error(getLexer().getLoc(),
+        if (MemOp.RegMask == 0)
+          return Error(getLexer().getLoc(),
                        "special registers cannot be used in register masks");
-          return MatchOperand_ParseFail;
-        }
       }
 
-      if ((FirstRegisterIndex >= 16) || (LastRegisterIndex >= 16)) {
-        Error(getLexer().getLoc(),
+      if ((FirstRegisterIndex >= 16) || (LastRegisterIndex >= 16))
+        return Error(getLexer().getLoc(),
                      "special registers cannot be used in register masks");
-        return MatchOperand_ParseFail;
-      }
 
-      if (NewMaskBits & MemOp.RegMask) {
-        Error(getLexer().getLoc(), "conflicting masked registers");
-        return MatchOperand_ParseFail;
-      }
+      if (NewMaskBits & MemOp.RegMask)
+        return Error(getLexer().getLoc(), "conflicting masked registers");
 
       MemOp.RegMask |= NewMaskBits;
     }
 
     if (!parseOptionalToken(AsmToken::Slash))
       break;
   }
 
   Operands.push_back(
       M68kOperand::createMemOp(MemOp, Start, getLexer().getLoc()));
-  return MatchOperand_Success;
+  return ParseStatus::Success;
 }
 
 void M68kAsmParser::eatComma() {
   if (Parser.getTok().is(AsmToken::Comma)) {
     Parser.Lex();
   }
 }
 
 bool M68kAsmParser::ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
                                      SMLoc NameLoc, OperandVector &Operands) {
   SMLoc Start = getLexer().getLoc();
   Operands.push_back(M68kOperand::createToken(Name, Start, Start));
 
   bool First = true;
   while (Parser.getTok().isNot(AsmToken::EndOfStatement)) {
     if (!First) {
       eatComma();
     } else {
       First = false;
     }
 
-    auto MatchResult = MatchOperandParserImpl(Operands, Name);
-    if (MatchResult == MatchOperand_Success) {
+    ParseStatus MatchResult = MatchOperandParserImpl(Operands, Name);
+    if (MatchResult.isSuccess()) {
       continue;
     }
 
     // Add custom operand formats here...
     SMLoc Loc = getLexer().getLoc();
     Parser.eatToEndOfStatement();
     return Error(Loc, "unexpected token parsing operands");
   }