[XCOFF] FixupOffsetInCsect should be 0 for R_REF relocation.

[Esme]

Summary

The FixupOffsetInCsect should be 0 for R_REF relocation since it specifies a nonrelocating reference. Otherwise liker would try to relocate the symbol through its address and an error like following occurred.

ld: 0711-547 SEVERE ERROR: Object /tmp/1-2a7ea1.o cannot be processed.
	RLD address 0x65 for section 2 (.data) is
	not contained in the section.

[shchenz]

LGTM. Thanks for addressing the bug.

llvm/lib/MC/XCOFFObjectWriter.cpp

void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
   uint8_t SignAndSize;
   std::tie(Type, SignAndSize) =
       TargetObjectWriter->getRelocTypeAndSignSize(Target, Fixup, IsPCRel);
 
   const MCSectionXCOFF *SymASec = getContainingCsect(cast<MCSymbolXCOFF>(SymA));
   assert(SectionMap.contains(SymASec) &&
          "Expected containing csect to exist in map.");
 
+  assert((Fixup.getOffset() <=
+          MaxRawDataSize - Layout.getFragmentOffset(Fragment)) &&
+         "Fragment offset + fixup offset is overflowed.");
+  uint32_t FixupOffsetInCsect =
+      Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
+
   const uint32_t Index = getIndex(SymA, SymASec);
   if (Type == XCOFF::RelocationType::R_POS ||
       Type == XCOFF::RelocationType::R_TLS)
     // The FixedValue should be symbol's virtual address in this object file
     // plus any constant value that we might get.
     FixedValue = getVirtualAddress(SymA, SymASec) + Target.getConstant();
   else if (Type == XCOFF::RelocationType::R_TLSM)
     // The FixedValue should always be zero since the region handle is only
void XCOFFObjectWriter::recordRelocation(MCAssembler &Asm,
   } else if (Type == XCOFF::RelocationType::R_RBR) {
     MCSectionXCOFF *ParentSec = cast<MCSectionXCOFF>(Fragment->getParent());
     assert((SymASec->getMappingClass() == XCOFF::XMC_PR &&
             ParentSec->getMappingClass() == XCOFF::XMC_PR) &&
            "Only XMC_PR csect may have the R_RBR relocation.");
 
     // The address of the branch instruction should be the sum of section
     // address, fragment offset and Fixup offset.
-    uint64_t BRInstrAddress = SectionMap[ParentSec]->Address +
-                              Layout.getFragmentOffset(Fragment) +
-                              Fixup.getOffset();
+    uint64_t BRInstrAddress =
+        SectionMap[ParentSec]->Address + FixupOffsetInCsect;
     // The FixedValue should be the difference between SymA csect address and BR
     // instr address plus any constant value.
     FixedValue =
         SectionMap[SymASec]->Address - BRInstrAddress + Target.getConstant();
-  } else if (Type == XCOFF::RelocationType::R_REF)
-    // The FixedValue should always be 0 since it specifies a nonrelocating
-    // reference.
+  } else if (Type == XCOFF::RelocationType::R_REF) {
+    // The FixedValue and FixupOffsetInCsect should always be 0 since it
+    // specifies a nonrelocating reference.
     FixedValue = 0;
-
-  assert((Fixup.getOffset() <=
-          MaxRawDataSize - Layout.getFragmentOffset(Fragment)) &&
-         "Fragment offset + fixup offset is overflowed.");
-  uint32_t FixupOffsetInCsect =
-      Layout.getFragmentOffset(Fragment) + Fixup.getOffset();
+    FixupOffsetInCsect = 0;
+  }
 
   XCOFFRelocation Reloc = {Index, FixupOffsetInCsect, SignAndSize, Type};
   MCSectionXCOFF *RelocationSec = cast<MCSectionXCOFF>(Fragment->getParent());
   assert(SectionMap.contains(RelocationSec) &&
          "Expected containing csect to exist in map.");
   SectionMap[RelocationSec]->Relocations.push_back(Reloc);
 
   if (!Target.getSymB())

llvm/test/CodeGen/PowerPC/pgo-ref-directive.ll

 ; XCOFF, a csect can be defined in pieces, so this is is legal assembly.
 ;
 ; NOVNDS:      .csect __llvm_prf_cnts[RW],3
 ; NOVNDS:      .csect __llvm_prf_cnts[RW],3
 ; NOVNDS-NEXT: .ref __llvm_prf_data[RW]
 ; NOVNDS-NEXT: .ref __llvm_prf_names[RO]
 ; NOVNDS-NOT:  .ref __llvm_prf_vnds
 
-; NOVNDS-OBJ: 00000008 R_REF  __llvm_prf_data
-; NOVNDS-OBJ: 00000008 R_REF  __llvm_prf_names
+; NOVNDS-OBJ: 00000000 R_REF  __llvm_prf_data
+; NOVNDS-OBJ: 00000000 R_REF  __llvm_prf_names
 ; NOVNDS-OBJ-NOT: R_REF  __llvm_prf_vnds
 
 ;--- with-vnds.ll
 ; When value profiling is needed, the PGO instrumentation generates variables in the __llvm_prf_vnds section, so we generate a .ref for them too.
 ;
 @__profc_main = private global [1 x i64] zeroinitializer, section "__llvm_prf_cnts", align 8
 @__profd_main = private global i64 zeroinitializer, section "__llvm_prf_data", align 8
 @__llvm_prf_nm = private constant [6 x i8] c"\04\00main", section "__llvm_prf_names", align 1

 ; WITHVNDS-OBJ-NEXT: 00000010 l     O .data 00000008 __llvm_prf_cnts
 ; WITHVNDS-OBJ-NEXT: 00000018 l     O .data 00000008 __llvm_prf_data
 ; WITHVNDS-OBJ-NEXT: 00000020 l     O .data 000000f0 __llvm_prf_vnds
 ; WITHVNDS-OBJ-NEXT: 00000110 g     O .data 0000000c main
 ; WITHVNDS-OBJ-NEXT: 0000011c l       .data 00000000 TOC
 
 ; WITHVNDS-OBJ:      RELOCATION RECORDS FOR [.data]:
 ; WITHVNDS-OBJ-NEXT: OFFSET   TYPE                     VALUE
-; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_data
-; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_names
-; WITHVNDS-OBJ-NEXT: 00000008 R_REF                    __llvm_prf_vnds
+; WITHVNDS-OBJ-NEXT: 00000000 R_REF                    __llvm_prf_data
+; WITHVNDS-OBJ-NEXT: 00000000 R_REF                    __llvm_prf_names
+; WITHVNDS-OBJ-NEXT: 00000000 R_REF                    __llvm_prf_vnds
 ; WITHVNDS-OBJ-NEXT: 00000100 R_POS                    .main
 ; WITHVNDS-OBJ-NEXT: 00000104 R_POS                    TOC