[llvm-mca] Print InstructionInfoView using Instrument information.

[michaelmaitland]

Summary

Previous reports calculated the overall report using Instrument
information but did not print out per-instruction data using
Instrument information. This change fixes that.

[myhsu]

llvm/tools/llvm-mca/Views/InstructionInfoView.cpp

123

I think you need to check if &Inst exists in InstToInstruments here (If it's unlikely to happen then maybe put it as an assertion just in case)

llvm/tools/llvm-mca/Views/InstructionInfoView.h

62

I think it'll be better to use DenseMap here since the key is a pointer.

90

nit: could you use a type alias for InstToInstruments's type? it'll be easier to read

[michaelmaitland]

• Check InstToInstruments lookup exists
• Use DenseMap
• Use Type alias for InstToInstruments

[myhsu]

LGTM Thanks!

[michaelmaitland]

Rebase.

llvm/test/tools/llvm-mca/RISCV/different-instruments.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m8, tu, mu
 # CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB

llvm/test/tools/llvm-mca/RISCV/instrument-at-start.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB
 # CHECK-NEXT: [4]   - SiFive7PipeV
 # CHECK-NEXT: [5]   - SiFive7VA

llvm/test/tools/llvm-mca/RISCV/instrument-in-middle.s

 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m8, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     1.00                        vadd.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB
 # CHECK-NEXT: [4]   - SiFive7PipeV
 # CHECK-NEXT: [5]   - SiFive7VA

llvm/test/tools/llvm-mca/RISCV/instrument-in-region.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB
 # CHECK-NEXT: [4]   - SiFive7PipeV
 # CHECK-NEXT: [5]   - SiFive7VA

llvm/test/tools/llvm-mca/RISCV/instrument-straddles-region.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB
 # CHECK-NEXT: [4]   - SiFive7PipeV
 # CHECK-NEXT: [5]   - SiFive7VA

llvm/test/tools/llvm-mca/RISCV/multiple-same-instruments.s

 # CHECK-NEXT: [2]: Latency
 # CHECK-NEXT: [3]: RThroughput
 # CHECK-NEXT: [4]: MayLoad
 # CHECK-NEXT: [5]: MayStore
 # CHECK-NEXT: [6]: HasSideEffects (U)
 
 # CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m1, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
-# CHECK-NEXT:  1      4     16.00                       vsub.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     2.00                        vsub.vv v12, v12, v12
 # CHECK-NEXT:  1      3     1.00                  U     vsetvli zero, a0, e8, m2, tu, mu
-# CHECK-NEXT:  1      4     16.00                       vadd.vv v12, v12, v12
-# CHECK-NEXT:  1      4     16.00                       vsub.vv v12, v12, v12
+# CHECK-NEXT:  1      4     8.00                        vadd.vv v12, v12, v12
+# CHECK-NEXT:  1      4     8.00                        vsub.vv v12, v12, v12
 
 # CHECK:      Resources:
 # CHECK-NEXT: [0]   - SiFive7FDiv
 # CHECK-NEXT: [1]   - SiFive7IDiv
 # CHECK-NEXT: [2]   - SiFive7PipeA
 # CHECK-NEXT: [3]   - SiFive7PipeB
 # CHECK-NEXT: [4]   - SiFive7PipeV
 # CHECK-NEXT: [5]   - SiFive7VA

llvm/tools/llvm-mca/Views/InstructionInfoView.h

 #include "Views/InstructionView.h"
 #include "llvm/ADT/ArrayRef.h"
 #include "llvm/ADT/SmallVector.h"
 #include "llvm/MC/MCInst.h"
 #include "llvm/MC/MCInstPrinter.h"
 #include "llvm/MC/MCInstrInfo.h"
 #include "llvm/MC/MCSubtargetInfo.h"
 #include "llvm/MCA/CodeEmitter.h"
+#include "llvm/MCA/CustomBehaviour.h"
 #include "llvm/Support/raw_ostream.h"
 
 #define DEBUG_TYPE "llvm-mca"
 
 namespace llvm {
 namespace mca {
 
 /// A view that prints out generic instruction information.
 class InstructionInfoView : public InstructionView {
   const llvm::MCInstrInfo &MCII;
   CodeEmitter &CE;
   bool PrintEncodings;
   bool PrintBarriers;
   using UniqueInst = std::unique_ptr<Instruction>;
   ArrayRef<UniqueInst> LoweredInsts;
+  const InstrumentManager &IM;
+  using InstToInstrumentsT =
+      DenseMap<const MCInst *, SmallVector<mca::Instrument *>>;
+  const InstToInstrumentsT &InstToInstruments;
 
   struct InstructionInfoViewData {
     unsigned NumMicroOpcodes = 0;
     unsigned Latency = 0;
     std::optional<double> RThroughput = 0.0;
     bool mayLoad = false;
     bool mayStore = false;
     bool hasUnmodeledSideEffects = false;
   };
   using IIVDVec = SmallVector<InstructionInfoViewData, 16>;
 
   /// Place the data into the array of InstructionInfoViewData IIVD.
   void collectData(MutableArrayRef<InstructionInfoViewData> IIVD) const;
 
 public:
   InstructionInfoView(const llvm::MCSubtargetInfo &ST,
                       const llvm::MCInstrInfo &II, CodeEmitter &C,
                       bool ShouldPrintEncodings, llvm::ArrayRef<llvm::MCInst> S,
                       llvm::MCInstPrinter &IP,
                       ArrayRef<UniqueInst> LoweredInsts,
-                      bool ShouldPrintBarriers)
+                      bool ShouldPrintBarriers, const InstrumentManager &IM,
+                      const InstToInstrumentsT &InstToInstruments)
       : InstructionView(ST, IP, S), MCII(II), CE(C),
         PrintEncodings(ShouldPrintEncodings),
-        PrintBarriers(ShouldPrintBarriers), LoweredInsts(LoweredInsts) {}
+        PrintBarriers(ShouldPrintBarriers), LoweredInsts(LoweredInsts), IM(IM),
+        InstToInstruments(InstToInstruments) {}
 
   void printView(llvm::raw_ostream &OS) const override;
   StringRef getNameAsString() const override { return "InstructionInfoView"; }
   json::Value toJSON() const override;
   json::Object toJSON(const InstructionInfoViewData &IIVD) const;
 };
 } // namespace mca
 } // namespace llvm
 
 #endif

llvm/tools/llvm-mca/Views/InstructionInfoView.cpp

void InstructionInfoView::collectData(
     MutableArrayRef<InstructionInfoViewData> IIVD) const {
   const llvm::MCSubtargetInfo &STI = getSubTargetInfo();
   const MCSchedModel &SM = STI.getSchedModel();
   for (const auto I : zip(getSource(), IIVD)) {
     const MCInst &Inst = std::get<0>(I);
     InstructionInfoViewData &IIVDEntry = std::get<1>(I);
     const MCInstrDesc &MCDesc = MCII.get(Inst.getOpcode());
 
-    // Obtain the scheduling class information from the instruction.
-    unsigned SchedClassID = MCDesc.getSchedClass();
+    // Obtain the scheduling class information from the instruction
+    // and instruments.
+    auto IVecIt = InstToInstruments.find(&Inst);
+    unsigned SchedClassID =
+        IVecIt == InstToInstruments.end()
+            ? MCDesc.getSchedClass()
+            : IM.getSchedClassID(MCII, Inst, IVecIt->second);
     unsigned CPUID = SM.getProcessorID();
 
     // Try to solve variant scheduling classes.
     while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant())
       SchedClassID =
           STI.resolveVariantSchedClass(SchedClassID, &Inst, &MCII, CPUID);
 
     const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID);

llvm/tools/llvm-mca/llvm-mca.cpp

for (const std::unique_ptr<mca::AnalysisRegion> &Region : Regions) {
     IB.clear();
 
     // Lower the MCInst sequence into an mca::Instruction sequence.
     ArrayRef<MCInst> Insts = Region->getInstructions();
     mca::CodeEmitter CE(*STI, *MAB, *MCE, Insts);
 
     IPP->resetState();
 
+    DenseMap<const MCInst *, SmallVector<mca::Instrument *>>
+        InstToInstruments;
     SmallVector<std::unique_ptr<mca::Instruction>> LoweredSequence;
     for (const MCInst &MCI : Insts) {
       SMLoc Loc = MCI.getLoc();
       const SmallVector<mca::Instrument *> Instruments =
           InstrumentRegions.getActiveInstruments(Loc);
+      InstToInstruments.insert({&MCI, Instruments});
 
       Expected<std::unique_ptr<mca::Instruction>> Inst =
           IB.createInstruction(MCI, Instruments);
       if (!Inst) {
         if (auto NewE = handleErrors(
                 Inst.takeError(),
                 [&IP, &STI](const mca::InstructionError<MCInst> &IE) {
                   std::string InstructionStr;
if (PrintInstructionTables) {
         Printer.addView(
             std::make_unique<mca::InstructionView>(*STI, *IP, Insts));
       }
 
       // Create the views for this pipeline, execute, and emit a report.
       if (PrintInstructionInfoView) {
         Printer.addView(std::make_unique<mca::InstructionInfoView>(
             *STI, *MCII, CE, ShowEncoding, Insts, *IP, LoweredSequence,
-            ShowBarriers));
+            ShowBarriers, *IM, InstToInstruments));
       }
       Printer.addView(
           std::make_unique<mca::ResourcePressureView>(*STI, *IP, Insts));
 
       if (!runPipeline(*P))
         return 1;
 
       if (PrintJson) {
if (EnableBottleneckAnalysis) {
       }
       Printer.addView(std::make_unique<mca::BottleneckAnalysis>(
           *STI, *IP, Insts, S.getNumIterations()));
     }
 
     if (PrintInstructionInfoView)
       Printer.addView(std::make_unique<mca::InstructionInfoView>(
           *STI, *MCII, CE, ShowEncoding, Insts, *IP, LoweredSequence,
-          ShowBarriers));
+          ShowBarriers, *IM, InstToInstruments));
 
     // Fetch custom Views that are to be placed after the InstructionInfoView.
     // Refer to the comment paired with the CB->getStartViews(*IP, Insts); line
     // for more info.
     if (!DisableCustomBehaviour) {
       std::vector<std::unique_ptr<mca::View>> CBViews =
           CB->getPostInstrInfoViews(*IP, Insts);
       for (auto &CBView : CBViews)