[JITLink][RISCV] Fix logic for R_RISCV_ALIGN

[Hahnfeld]

Summary

The relocation's addend encodes the number of bytes with NOP
instructions, which is less than the required alignment. For
example, with compressed instructions, an alignment to 4 bytes
requires only one compressed NOP instruction of two bytes that
the linker can either leave in or remove. This actually means
that R_RISCV_ALIGN can never be ignored.

[jobnoorman]

The required alignment is defined as NextPowerOf2(Addend) (as you changed it to) and I believe it should be ok to ignore the relocation if this value is <=2 (not sure if this will actually happen in practice).

However, please not that I just submitted a patch to implement linker relaxation which also handles alignment properly: D149526

[Hahnfeld]

In D149552#4308808, @jobnoorman wrote:

The required alignment is defined as NextPowerOf2(Addend) (as you changed it to) and I believe it should be ok to ignore the relocation if this value is <=2 (not sure if this will actually happen in practice).

I don't think this can ever happen because the smallest compressed instruction is two bytes.

However, please not that I just submitted a patch to implement linker relaxation which also handles alignment properly: D149526

Thanks for letting me know, I wasn't aware. I left some comments ;-)

llvm/lib/ExecutionEngine/JITLink/ELF_riscv.cpp

Error addSingleRelocation(const typename ELFT::Rela &Rel,
     uint32_t Type = Rel.getType(false);
     // We do not implement linker relaxation, except what is required for
     // alignment (see below).
     if (Type == llvm::ELF::R_RISCV_RELAX)
       return Error::success();
 
     int64_t Addend = Rel.r_addend;
     if (Type == llvm::ELF::R_RISCV_ALIGN) {
-      uint64_t Alignment = PowerOf2Ceil(Addend);
+      uint64_t Alignment = NextPowerOf2(Addend);
       // FIXME: Implement support for ensuring alignment together with linker
-      // relaxation; 2 bytes are guaranteed by the length of compressed
-      // instructions, so this does not need any action from our side.
-      if (Alignment > 2)
-        return make_error<JITLinkError>(
-            formatv("Unsupported relocation R_RISCV_ALIGN with alignment {0} "
-                    "larger than 2 (addend: {1})",
-                    Alignment, Addend));
-      return Error::success();
+      // relaxation
+                  "(offset: {1}, addend: {2})",
+                  Alignment, Rel.r_offset, Addend));
     }
 
     Expected<riscv::EdgeKind_riscv> Kind = getRelocationKind(Type);
     if (!Kind)
       return Kind.takeError();
 
     uint32_t SymbolIndex = Rel.getSymbol(false);
     auto ObjSymbol = Base::Obj.getRelocationSymbol(Rel, Base::SymTabSec);