[HeterogeneousDWARF] Implement extension ops in DebugInfo

[scott.linder]

Summary

Implement heterogeneous debug extensions operations.

[scott.linder]

Rebase and remove duplication of subopcode name printing code

Also fix a bug in the DW_OP_LLVM_user patch (D147271) where the underlying
vectors for the operands and their end-offsets was not resized when
encountering an operation with a subop. I didn't factor this out into its own
patch as it requires an operation with non-0 arity to exercise, which this
patch introduces.

llvm/include/llvm/BinaryFormat/Dwarf.def

 // scheme. This list is authoritative and exhaustive. Once an operation is
 // registered here it cannot be removed nor have its encoding changed. The
 // encoding space must skip zero (which is reserved) and have no gaps.
 //
 // The DW_OP_LLVM_user DW_OP_LLVM_nop operation has no effect on the
 // location stack or any of its values. It is defined as a placeholder for
 // testing purposes.
 HANDLE_DW_OP_LLVM_USEROP(0x0001, nop)
+// Heterogeneous Debugging Extension defined at
+// https://llvm.org/docs/AMDGPUDwarfProposalForHeterogeneousDebugging.html.
+HANDLE_DW_OP_LLVM_USEROP(0x0002, form_aspace_address)
+HANDLE_DW_OP_LLVM_USEROP(0x0003, push_lane)
+HANDLE_DW_OP_LLVM_USEROP(0x0004, offset)
+HANDLE_DW_OP_LLVM_USEROP(0x0005, offset_uconst)
+HANDLE_DW_OP_LLVM_USEROP(0x0006, bit_offset)
+HANDLE_DW_OP_LLVM_USEROP(0x0007, call_frame_entry_reg)
+HANDLE_DW_OP_LLVM_USEROP(0x0008, undefined)
+HANDLE_DW_OP_LLVM_USEROP(0x0009, aspace_bregx)
+HANDLE_DW_OP_LLVM_USEROP(0x000a, piece_end)
+HANDLE_DW_OP_LLVM_USEROP(0x000b, extend)
+HANDLE_DW_OP_LLVM_USEROP(0x000c, select_bit_piece)
 
 // DWARF languages.
 HANDLE_DW_LANG(0x0001, C89, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0002, C, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0003, Ada83, 1, 2, DWARF)
 HANDLE_DW_LANG(0x0004, C_plus_plus, 0, 2, DWARF)
 HANDLE_DW_LANG(0x0005, Cobol74, 1, 2, DWARF)
 HANDLE_DW_LANG(0x0006, Cobol85, 1, 2, DWARF)

llvm/lib/DebugInfo/DWARF/DWARFExpression.cpp

 static std::vector<Desc> getSubOpDescriptions() {
   static constexpr unsigned LlvmUserDescriptionsSize = 1
 #define HANDLE_DW_OP_LLVM_USEROP(ID, NAME) +1
 #include "llvm/BinaryFormat/Dwarf.def"
       ;
   std::vector<Desc> Descriptions;
   Descriptions.resize(LlvmUserDescriptionsSize);
   Descriptions[DW_OP_LLVM_nop] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_form_aspace_address] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_push_lane] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_offset] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_offset_uconst] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB, Op::SizeLEB);
+  Descriptions[DW_OP_LLVM_bit_offset] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_call_frame_entry_reg] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB, Op::SizeLEB);
+  Descriptions[DW_OP_LLVM_undefined] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_aspace_bregx] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB, Op::SizeLEB, Op::SizeLEB);
+  Descriptions[DW_OP_LLVM_piece_end] = Desc(Op::Dwarf5, Op::SizeSubOpLEB);
+  Descriptions[DW_OP_LLVM_extend] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB, Op::SizeLEB, Op::SizeLEB);
+  Descriptions[DW_OP_LLVM_select_bit_piece] =
+      Desc(Op::Dwarf5, Op::SizeSubOpLEB, Op::SizeLEB, Op::SizeLEB);
   return Descriptions;
 }
 
 static Desc getSubOpDesc(unsigned Opcode, unsigned SubOpcode) {
   assert(Opcode == DW_OP_LLVM_user);
   static std::vector<Desc> Descriptions = getSubOpDescriptions();
   return getDescImpl(Descriptions, SubOpcode);
 }
for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) {
     case Operation::SizeSubOpLEB:
       assert(Operand == 0 && "SubOp operand must be the first operand");
       Operands[Operand] = Data.getULEB128(&Offset);
       Desc = getSubOpDesc(Opcode, Operands[Operand]);
       if (Desc.Version == Operation::DwarfNA)
         return false;
       assert(Desc.Op[Operand] == Operation::SizeSubOpLEB &&
              "SizeSubOpLEB Description must begin with SizeSubOpLEB operand");
+      Operands.resize(Desc.Op.size());
+      OperandEndOffsets.resize(Desc.Op.size());
       break;
     case Operation::Size1:
       Operands[Operand] = Data.getU8(&Offset);
       if (Signed)
         Operands[Operand] = (int8_t)Operands[Operand];
       break;
     case Operation::Size2:
       Operands[Operand] = Data.getU16(&Offset);
bool DWARFExpression::prettyPrintRegisterOp(DWARFUnit *U, raw_ostream &OS,
                                             uint8_t Opcode,
                                             ArrayRef<uint64_t> Operands) {
   if (!DumpOpts.GetNameForDWARFReg)
     return false;
 
   uint64_t DwarfRegNum;
   unsigned OpNum = 0;
 
+  std::optional<unsigned> SubOpcode;
+  if (Opcode == DW_OP_LLVM_user)
+    SubOpcode = Operands[OpNum++];
+
   if (Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
-      Opcode == DW_OP_regval_type)
+      Opcode == DW_OP_regval_type ||
+      (SubOpcode && *SubOpcode == DW_OP_LLVM_aspace_bregx))
     DwarfRegNum = Operands[OpNum++];
+  else if (SubOpcode && *SubOpcode == DW_OP_LLVM_call_frame_entry_reg)
+    DwarfRegNum = Operands[OpNum];
   else if (Opcode >= DW_OP_breg0 && Opcode < DW_OP_bregx)
     DwarfRegNum = Opcode - DW_OP_breg0;
   else
     DwarfRegNum = Opcode - DW_OP_reg0;
 
   auto RegName = DumpOpts.GetNameForDWARFReg(DwarfRegNum, DumpOpts.IsEH);
   if (!RegName.empty()) {
     if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
-        Opcode == DW_OP_bregx)
+        Opcode == DW_OP_bregx ||
+        (SubOpcode && *SubOpcode == DW_OP_LLVM_aspace_bregx))
       OS << ' ' << RegName << format("%+" PRId64, Operands[OpNum]);
     else
       OS << ' ' << RegName.data();
 
     if (Opcode == DW_OP_regval_type)
       prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, 1);
     return true;
   }
if (Error) {
     OS << "<decoding error>";
     return false;
   }
 
   StringRef Name = OperationEncodingString(Opcode);
   assert(!Name.empty() && "DW_OP has no name!");
   OS << Name;
 
+  std::optional<unsigned> SubOpcode = getSubCode();
+  if (SubOpcode) {
+    StringRef SubName = SubOperationEncodingString(Opcode, *SubOpcode);
+    assert(!SubName.empty() && "DW_OP SubOp has no name!");
+    OS << " " << SubName;
+  }
+
   if ((Opcode >= DW_OP_breg0 && Opcode <= DW_OP_breg31) ||
       (Opcode >= DW_OP_reg0 && Opcode <= DW_OP_reg31) ||
       Opcode == DW_OP_bregx || Opcode == DW_OP_regx ||
-      Opcode == DW_OP_regval_type)
+      Opcode == DW_OP_regval_type ||
+      (SubOpcode && (*SubOpcode == DW_OP_LLVM_call_frame_entry_reg ||
+                     *SubOpcode == DW_OP_LLVM_aspace_bregx)))
     if (prettyPrintRegisterOp(U, OS, DumpOpts, Opcode, Operands))
       return true;
 
   for (unsigned Operand = 0; Operand < Desc.Op.size(); ++Operand) {
     unsigned Size = Desc.Op[Operand];
     unsigned Signed = Size & Operation::SignBit;
 
     if (Size == Operation::SizeSubOpLEB) {
-      StringRef SubName = SubOperationEncodingString(Opcode, Operands[Operand]);
-      assert(!SubName.empty() && "DW_OP SubOp has no name!");
-      OS << " " << SubName;
+      assert(Operand == 0);
+      assert(SubOpcode);
     } else if (Size == Operation::BaseTypeRef && U) {
       // For DW_OP_convert the operand may be 0 to indicate that conversion to
       // the generic type should be done. The same holds for DW_OP_reinterpret,
       // which is currently not supported.
       if (Opcode == DW_OP_convert && Operands[Operand] == 0)
         OS << " 0x0";
       else
         prettyPrintBaseTypeRef(U, OS, DumpOpts, Operands, Operand);
case dwarf::DW_OP_stack_value: {
       assert(!Stack.empty());
       Stack.back().Kind = PrintedExpr::Value;
       break;
     }
     case dwarf::DW_OP_nop: {
       break;
     }
     case dwarf::DW_OP_LLVM_user: {
-      assert(Op.getSubCode() && *Op.getSubCode() == dwarf::DW_OP_LLVM_nop);
+      assert(Op.getSubCode());
       break;
     }
     default:
       if (Opcode >= dwarf::DW_OP_reg0 && Opcode <= dwarf::DW_OP_reg31) {
         // DW_OP_reg<N>: A register, with the register num implied by the
         // opcode. Printed as the plain register name.
         uint64_t DwarfRegNum = Opcode - dwarf::DW_OP_reg0;
         auto RegName = GetNameForDWARFReg(DwarfRegNum, false);

llvm/test/tools/llvm-dwarfdump/X86/heterogeneous_proposal.s

+# RUN: llvm-mc %s -filetype=obj -triple=i686-pc-linux -o %t
+# RUN: llvm-dwarfdump -v %t | FileCheck %s
+
+# Check that we can decode new ops described at
+# llvm/docs/AMDGPUUsage.rst#expression-operation-encodings
+
+# FIXME: Is there a better approach than using `DW_CFA_expression EAX <op>`?
+
+# CHECK: .eh_frame contents:
+# CHECK: FDE
+# CHECK: Format: DWARF32
+
+foo:
+ .cfi_startproc
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_form_aspace_address
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x02
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_push_lane
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x03
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_offset
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x04
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_offset_uconst 0x0
+ .cfi_escape 0x10, 0x00, 0x03, 0xe9, 0x05, 0x00
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_bit_offset
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x06
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_call_frame_entry_reg EAX
+ .cfi_escape 0x10, 0x00, 0x03, 0xe9, 0x07, 0x00
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_undefined
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x08
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_aspace_bregx EAX+2
+ .cfi_escape 0x10, 0x00, 0x04, 0xe9, 0x09, 0x0, 0x2
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_piece_end
+ .cfi_escape 0x10, 0x00, 0x02, 0xe9, 0x0a
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_extend 0x0 0x0
+ .cfi_escape 0x10, 0x00, 0x04, 0xe9, 0x0b, 0x0, 0x0
+ # CHECK-NEXT: DW_CFA_expression: EAX DW_OP_LLVM_user DW_OP_LLVM_select_bit_piece 0x0 0x0
+ .cfi_escape 0x10, 0x00, 0x04, 0xe9, 0x0c, 0x0, 0x0
+ .cfi_endproc