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Differential D147031

[MachineCopy] Enhance sub register machine copy propagation
AbandonedPublic

Authored by xiangzhangllvm on Mar 28 2023, 1:05 AM.

Details

Reviewers
resistor
barannikov88
LuoYuanke
pengfei
arsenm
Summary

The machine copy propagation logic has some problem:
When do machine copy propagation for subreg we need to consider the CopyDstReg and CopySrcReg's regclass and size.
(because we want to get SubReg from CopySrcReg by using SubregIdx which we got from CopyDstReg)
Take follow case for example:

MCP: Replacing $ecx
     with $k0
     in renamable $k1 = COPY renamable $ecx
     from renamable $rcx = COPY renamable $k0, implicit-def $ecx

We can not use SubregIdx (ecx of rcx) to get anything from k0 register.

The upper test case problem was fix/escaped by D146930
But there is still risk in it. More details PLS refer to comments in D146930
Now this patch is to enhance the safety in propagating SubReg.

Diff Detail

Event Timeline

xiangzhangllvm created this revision.Mar 28 2023, 1:05 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 28 2023, 1:05 AM
Herald added a subscriber: hiraditya. · View Herald Transcript
xiangzhangllvm requested review of this revision.Mar 28 2023, 1:05 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 28 2023, 1:05 AM
Herald added a subscriber: llvm-commits. · View Herald Transcript
Harbormaster completed remote builds in B222181: Diff 508915.Mar 28 2023, 1:55 AM
barannikov88 added a comment.Mar 28 2023, 7:29 AM

Does it try to solve the same problem as D146930?

xiangzhangllvm mentioned this in D146930: [MCP] Do not try forward non-existent sub-register of a copy.Mar 28 2023, 4:47 PM
In D147031#4227472, @barannikov88 wrote:

Does it try to solve the same problem as D146930?

Very similar from the test case, I commented on D146930

barannikov88 added a comment.Mar 28 2023, 5:25 PM

It crashes on the test from D146930.

barannikov88 added inline comments.Mar 28 2023, 5:27 PM
llvm/lib/CodeGen/MachineCopyPropagation.cpp
662

All registers in a register class have the same sizes. The check for size above is redundant.

lkail added a subscriber: lkail.Mar 28 2023, 5:43 PM
lkail added inline comments.
llvm/lib/CodeGen/MachineCopyPropagation.cpp
611

This looks similar to what isForwardableRegClassCopy does? Can we extend isForwardableRegClassCopy to contain subregindex?

xiangzhangllvm added a comment.Mar 29 2023, 6:21 PM
In D147031#4229099, @barannikov88 wrote:

It crashes on the test from D146930.

Sorry for late respond. Let me take a look on your test.
Anyway this bug affect our critical tests，I +1 for let D146930 first in.
I also comment the risk in D146930.

llvm/lib/CodeGen/MachineCopyPropagation.cpp
611

Sound good, we can check it in that function.

662

Make sense!

xiangzhangllvm added inline comments.Mar 29 2023, 7:32 PM
llvm/lib/CodeGen/MachineCopyPropagation.cpp
611

isForwardableRegClassCopy already try handle cross-class case.
Looks we only need to enhance it:

diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index 218f293a4085..fff2893e2148 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -539,6 +539,16 @@ bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
   /// so we have reduced the number of cross-class COPYs and potentially
   /// introduced a nop COPY that can be removed.

+  // We don't propagate for SubReg in cross-class COPYs.
+  // For example: (ecx is SubReg of rcx)
+  // renamable $rcx = COPY killed renamable $k0
+  // renamable $k1 = COPY renamable $ecx
+  Register CopyDstReg = CopyOperands->Destination->getReg();
+  Register UseSrcReg = UseICopyOperands->Source->getReg();
+  if (TRI->getRegSizeInBits(CopyDstReg, *MRI) !=
+      TRI->getRegSizeInBits(UseSrcReg, *MRI))
+    return false;
+
   // Allow forwarding if src and dst belong to any common class, so long as they
   // don't belong to any (possibly smaller) common class that requires copies to
   // go via a different class.

Let me do more testing, thanks!

xiangzhangllvm updated this revision to Diff 509557.Mar 30 2023, 12:02 AM
xiangzhangllvm edited the summary of this revision. (Show Details)
xiangzhangllvm retitled this revision from [MachineCopy] Bug fix sub register machine copy propagation to [MachineCopy] Enhance sub register machine copy propagation.
Harbormaster completed remote builds in B222659: Diff 509557.Mar 30 2023, 12:50 AM
barannikov88 added inline comments.Mar 30 2023, 2:01 AM
llvm/lib/CodeGen/MachineCopyPropagation.cpp
545

This method is not called for this example (look for "MCP: Copy source does not have sub-register" below).
$ecx is a sub-register of $rcx, and its sub-register index is sub_32bit. $k0 does not have sub-registers with index sub_32bit.
You can check my assertion by removing this code and making sure that the added test still passes.

arsenm requested changes to this revision.Mar 30 2023, 4:04 AM
arsenm added a subscriber: arsenm.
arsenm added inline comments.
llvm/lib/CodeGen/MachineCopyPropagation.cpp
425–431

You should be able to use existing, generated class relation queries

548–550

Shouldn't need to operate in terms of register sizes

This revision now requires changes to proceed.Mar 30 2023, 4:04 AM
Herald added a subscriber: wdng. · View Herald TranscriptMar 30 2023, 4:04 AM
xiangzhangllvm added inline comments.Mar 30 2023, 6:04 PM
llvm/lib/CodeGen/MachineCopyPropagation.cpp
425–431

Can you gave more hint pls ?
I see the existing code use same way to compare RegClass, pls refer lambda
CheckCopyConstraint

545

Yes, after you commit D146930 the old test machine-copy-subreg.mir can pass without this patch. I need to create a new test.

This patch is not handle "MCP: Copy source does not have sub-register". It try to handle "we can get sub-register from copy source, but the sub-register is wrong"

As I comment in D146930
For different reg class, the following convert has risk.

B= COPY C
A= COPY SubB

==>
A = COPY SubC

Because the SubRegIdx of B (for SubB) may not match the SubRegIdx of C (for SubC).
(for example B has 2 subreg but C only has 4)

548–550

Yes, let me directly check SubReg relation here.

xiangzhangllvm abandoned this revision.Apr 6 2023, 2:30 AM
xiangzhangllvm added inline comments.
llvm/lib/CodeGen/MachineCopyPropagation.cpp
545

I think the risk is not existed.
Here the unsigned sub-register index imply both the offset and size ( sub_32bit)
Not only index of sub-register in one register 's subs.
Though @barannikov88 mentioned sub_32bit before, but I am not 100% make sure about it.
Let me close this patch.

Revision Contents

PathSize
llvm/
lib/
CodeGen/
13 lines
test/
CodeGen/
X86/
215 lines

Diff 508915

llvm/lib/CodeGen/MachineCopyPropagation.cpp

Show First 20 Lines • Show All 416 Lines • ▼ Show 20 Lines if (MachineInstr *Copy = Tracker.findCopyForUnit(*RUI, *TRI)) {
MaybeDeadCopies.remove(Copy); MaybeDeadCopies.remove(Copy);
} else { } else {
CopyDbgUsers[Copy].insert(&Reader); CopyDbgUsers[Copy].insert(&Reader);
} }
} }
} }
} }
/// Return true if \p PreviousCopy did copy register \p Src to register \p Def. /// Return true if \p PreviousCopy did copy register \p Src to register \p Def.
/// This fact may have been obscured by sub register usage or may not be true at /// This fact may have been obscured by sub register usage or may not be true at
/// all even though Src and Def are subregisters of the registers used in /// all even though Src and Def are subregisters of the registers used in
/// PreviousCopy. e.g. /// PreviousCopy. e.g.
/// isNopCopy("ecx = COPY eax", AX, CX) == true /// isNopCopy("ecx = COPY eax", AX, CX) == true
/// isNopCopy("ecx = COPY eax", AH, CL) == false /// isNopCopy("ecx = COPY eax", AH, CL) == false
static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src, static bool isNopCopy(const MachineInstr &PreviousCopy, MCRegister Src,
arsenmUnsubmitted
Not Done
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You should be able to use existing, generated class relation queries

arsenm: You should be able to use existing, generated class relation queries
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

Can you gave more hint pls ?
I see the existing code use same way to compare RegClass, pls refer lambda
CheckCopyConstraint

xiangzhangllvm: Can you gave more hint pls ? I see the existing code use same way to compare RegClass, pls…
MCRegister Def, const TargetRegisterInfo *TRI, MCRegister Def, const TargetRegisterInfo *TRI,
const TargetInstrInfo *TII, bool UseCopyInstr) { const TargetInstrInfo *TII, bool UseCopyInstr) {
std::optional<DestSourcePair> CopyOperands = std::optional<DestSourcePair> CopyOperands =
isCopyInstr(PreviousCopy, *TII, UseCopyInstr); isCopyInstr(PreviousCopy, *TII, UseCopyInstr);
MCRegister PreviousSrc = CopyOperands->Source->getReg().asMCReg(); MCRegister PreviousSrc = CopyOperands->Source->getReg().asMCReg();
MCRegister PreviousDef = CopyOperands->Destination->getReg().asMCReg(); MCRegister PreviousDef = CopyOperands->Destination->getReg().asMCReg();
if (Src == PreviousSrc && Def == PreviousDef) if (Src == PreviousSrc && Def == PreviousDef)
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Linesbool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
/// RegClassB = COPY RegClassB /// RegClassB = COPY RegClassB
/// ///
/// so we have reduced the number of cross-class COPYs and potentially /// so we have reduced the number of cross-class COPYs and potentially
/// introduced a nop COPY that can be removed. /// introduced a nop COPY that can be removed.
// Allow forwarding if src and dst belong to any common class, so long as they // Allow forwarding if src and dst belong to any common class, so long as they
// don't belong to any (possibly smaller) common class that requires copies to // don't belong to any (possibly smaller) common class that requires copies to
// go via a different class. // go via a different class.
Register UseDstReg = UseICopyOperands->Destination->getReg(); Register UseDstReg = UseICopyOperands->Destination->getReg();
barannikov88Unsubmitted
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This method is not called for this example (look for "MCP: Copy source does not have sub-register" below).
$ecx is a sub-register of $rcx, and its sub-register index is sub_32bit. $k0 does not have sub-registers with index sub_32bit.
You can check my assertion by removing this code and making sure that the added test still passes.

barannikov88: This method is not called for this example (look for "MCP: Copy source does not have sub…
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

Yes, after you commit D146930 the old test machine-copy-subreg.mir can pass without this patch. I need to create a new test.

This patch is not handle "MCP: Copy source does not have sub-register". It try to handle "we can get sub-register from copy source, but the sub-register is wrong"

As I comment in D146930
For different reg class, the following convert has risk.

B= COPY C
A= COPY SubB

==>
A = COPY SubC

Because the SubRegIdx of B (for SubB) may not match the SubRegIdx of C (for SubC).
(for example B has 2 subreg but C only has 4)

xiangzhangllvm: Yes, after you commit [[ https://reviews.llvm.org/D146930 | D146930 ]] the old test machine…
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

I think the risk is not existed.
Here the unsigned sub-register index imply both the offset and size ( sub_32bit)
Not only index of sub-register in one register 's subs.
Though @barannikov88 mentioned sub_32bit before, but I am not 100% make sure about it.
Let me close this patch.

xiangzhangllvm: I think the risk is not existed. Here the unsigned sub-register index imply both the offset and…
bool Found = false; bool Found = false;
bool IsCrossClass = false; bool IsCrossClass = false;
for (const TargetRegisterClass *RC : TRI->regclasses()) { for (const TargetRegisterClass *RC : TRI->regclasses()) {
if (RC->contains(CopySrcReg) && RC->contains(UseDstReg)) { if (RC->contains(CopySrcReg) && RC->contains(UseDstReg)) {
Found = true; Found = true;
arsenmUnsubmitted
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Shouldn't need to operate in terms of register sizes

arsenm: Shouldn't need to operate in terms of register sizes
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

Yes, let me directly check SubReg relation here.

xiangzhangllvm: Yes, let me directly check SubReg relation here.
if (TRI->getCrossCopyRegClass(RC) != RC) { if (TRI->getCrossCopyRegClass(RC) != RC) {
IsCrossClass = true; IsCrossClass = true;
break; break;
} }
} }
} }
if (!Found) if (!Found)
return false; return false;
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
} }
/// Look for available copies whose destination register is used by \p MI and /// Look for available copies whose destination register is used by \p MI and
/// replace the use in \p MI with the copy's source register. /// replace the use in \p MI with the copy's source register.
void MachineCopyPropagation::forwardUses(MachineInstr &MI) { void MachineCopyPropagation::forwardUses(MachineInstr &MI) {
if (!Tracker.hasAnyCopies()) if (!Tracker.hasAnyCopies())
return; return;
auto CheckRegClass = [this](Register Def, Register Src) {
lkailUnsubmitted
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This looks similar to what isForwardableRegClassCopy does? Can we extend isForwardableRegClassCopy to contain subregindex?

lkail: This looks similar to what `isForwardableRegClassCopy` does? Can we extend…
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

Sound good, we can check it in that function.

xiangzhangllvm: Sound good, we can check it in that function.
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

isForwardableRegClassCopy already try handle cross-class case.
Looks we only need to enhance it:

diff --git a/llvm/lib/CodeGen/MachineCopyPropagation.cpp b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
index 218f293a4085..fff2893e2148 100644
--- a/llvm/lib/CodeGen/MachineCopyPropagation.cpp
+++ b/llvm/lib/CodeGen/MachineCopyPropagation.cpp
@@ -539,6 +539,16 @@ bool MachineCopyPropagation::isForwardableRegClassCopy(const MachineInstr &Copy,
   /// so we have reduced the number of cross-class COPYs and potentially
   /// introduced a nop COPY that can be removed.

+  // We don't propagate for SubReg in cross-class COPYs.
+  // For example: (ecx is SubReg of rcx)
+  // renamable $rcx = COPY killed renamable $k0
+  // renamable $k1 = COPY renamable $ecx
+  Register CopyDstReg = CopyOperands->Destination->getReg();
+  Register UseSrcReg = UseICopyOperands->Source->getReg();
+  if (TRI->getRegSizeInBits(CopyDstReg, *MRI) !=
+      TRI->getRegSizeInBits(UseSrcReg, *MRI))
+    return false;
+
   // Allow forwarding if src and dst belong to any common class, so long as they
   // don't belong to any (possibly smaller) common class that requires copies to
   // go via a different class.

Let me do more testing, thanks!

xiangzhangllvm: isForwardableRegClassCopy already try handle cross-class case. Looks we only need to enhance it…
for (const TargetRegisterClass *RC : TRI->regclasses()) {
if (RC->contains(Def) && RC->contains(Src))
return true;
}
return false;
};
// Look for non-tied explicit vreg uses that have an active COPY // Look for non-tied explicit vreg uses that have an active COPY
// instruction that defines the physical register allocated to them. // instruction that defines the physical register allocated to them.
// Replace the vreg with the source of the active COPY. // Replace the vreg with the source of the active COPY.
for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd; for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
++OpIdx) { ++OpIdx) {
MachineOperand &MOUse = MI.getOperand(OpIdx); MachineOperand &MOUse = MI.getOperand(OpIdx);
// Don't forward into undef use operands since doing so can cause problems // Don't forward into undef use operands since doing so can cause problems
// with the machine verifier, since it doesn't treat undef reads as reads, // with the machine verifier, since it doesn't treat undef reads as reads,
Show All 24 Lines for (unsigned OpIdx = 0, OpEnd = MI.getNumOperands(); OpIdx < OpEnd;
const MachineOperand &CopySrc = *CopyOperands->Source; const MachineOperand &CopySrc = *CopyOperands->Source;
Register CopySrcReg = CopySrc.getReg(); Register CopySrcReg = CopySrc.getReg();
// When the use is a subregister of the COPY destination, // When the use is a subregister of the COPY destination,
// record the subreg index. // record the subreg index.
unsigned SubregIdx = 0; unsigned SubregIdx = 0;
// This can only occur when we are dealing with physical registers. // This can only occur when we are dealing with physical registers.
if (MOUse.getReg() != CopyDstReg) { if (MOUse.getReg() != CopyDstReg &&
TRI->getRegSizeInBits(CopyDstReg, *MRI) ==
TRI->getRegSizeInBits(CopySrcReg, *MRI) &&
CheckRegClass(CopyDstReg, CopySrcReg)) {
barannikov88Unsubmitted
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All registers in a register class have the same sizes. The check for size above is redundant.

barannikov88: All registers in a register class have the same sizes. The check for size above is redundant.
xiangzhangllvmAuthorUnsubmitted
Done
ReplyInline Actions

Make sense!

xiangzhangllvm: Make sense!
SubregIdx = TRI->getSubRegIndex(CopyDstReg, MOUse.getReg()); SubregIdx = TRI->getSubRegIndex(CopyDstReg, MOUse.getReg());
if (!SubregIdx) if (!SubregIdx)
continue; continue;
} }
// Don't forward COPYs of reserved regs unless they are constant. // Don't forward COPYs of reserved regs unless they are constant.
if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg)) if (MRI->isReserved(CopySrcReg) && !MRI->isConstantPhysReg(CopySrcReg))
continue; continue;
▲ Show 20 Lines • Show All 759 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/machine-copy-subreg.mir

  • This file was added.
# RUN: llc -mtriple=x86_64-- -run-pass=machine-cp %s -o - | FileCheck %s
--- |
target triple = "x86_64-pc-windows-msvc19.29.30145"
define void @foo(<256 x double> %0, ptr %1) #0 {
DIR.OMP.PARALLEL.LOOP.2:
%2 = fcmp olt <256 x double> %0, zeroinitializer
%3 = extractelement <256 x i1> %2, i64 64
%4 = select i1 %3, double 0.000000e+00, double 1.000000e+00
%5 = extractelement <256 x i1> %2, i64 65
%6 = select i1 %5, double 0.000000e+00, double 1.000000e+00
store double %4, ptr %1, align 16
store double %6, ptr null, align 8
ret void
}
attributes #0 = { "target-cpu"="skylake-avx512" }
...
---
# CHECK-LABEL: name: foo
name: foo
alignment: 16
exposesReturnsTwice: false
legalized: false
regBankSelected: false
selected: false
failedISel: false
tracksRegLiveness: true
hasWinCFI: false
callsEHReturn: false
callsUnwindInit: false
hasEHCatchret: false
hasEHScopes: false
hasEHFunclets: false
debugInstrRef: true
failsVerification: false
tracksDebugUserValues: true
registers: []
liveins: []
frameInfo:
isFrameAddressTaken: false
isReturnAddressTaken: false
hasStackMap: false
hasPatchPoint: false
stackSize: 0
offsetAdjustment: 0
maxAlignment: 8
adjustsStack: false
hasCalls: false
stackProtector: ''
functionContext: ''
maxCallFrameSize: 4294967295
cvBytesOfCalleeSavedRegisters: 0
hasOpaqueSPAdjustment: false
hasVAStart: false
hasMustTailInVarArgFunc: false
hasTailCall: false
localFrameSize: 0
savePoint: ''
restorePoint: ''
fixedStack:
- { id: 0, type: default, offset: 256, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 1, type: default, offset: 248, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 2, type: default, offset: 240, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 3, type: default, offset: 232, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 4, type: default, offset: 224, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 5, type: default, offset: 216, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 6, type: default, offset: 208, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 7, type: default, offset: 200, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 8, type: default, offset: 192, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 9, type: default, offset: 184, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 10, type: default, offset: 176, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 11, type: default, offset: 168, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 12, type: default, offset: 160, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 13, type: default, offset: 152, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 14, type: default, offset: 144, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 15, type: default, offset: 136, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 16, type: default, offset: 128, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 17, type: default, offset: 120, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 18, type: default, offset: 112, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 19, type: default, offset: 104, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 20, type: default, offset: 96, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 21, type: default, offset: 88, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 22, type: default, offset: 80, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 23, type: default, offset: 72, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 24, type: default, offset: 64, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 25, type: default, offset: 56, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 26, type: default, offset: 48, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 27, type: default, offset: 40, size: 8, alignment: 8, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
- { id: 28, type: default, offset: 32, size: 8, alignment: 16, stack-id: default,
isImmutable: true, isAliased: false, callee-saved-register: '', callee-saved-restored: true,
debug-info-variable: '', debug-info-expression: '', debug-info-location: '' }
stack: []
callSites: []
debugValueSubstitutions: []
constants:
- id: 0
value: 'double 1.000000e+00'
alignment: 8
isTargetSpecific: false
machineFunctionInfo: {}
body: |
bb.0.DIR.OMP.PARALLEL.LOOP.2:
; CHECK: renamable $k2 = KUNPCKBWrr killed renamable $k3, killed renamable $k2
; CHECK-NEXT: renamable $k1 = KUNPCKWDrr killed renamable $k2, killed renamable $k1
; CHECK-NEXT: renamable $k0 = KUNPCKDQrr killed renamable $k1, killed renamable $k0
; CHECK-NEXT: renamable $rcx = COPY renamable $k0
; CHECK-NEXT: renamable $k1 = COPY $k0
; CHECK-NEXT: renamable $ecx = KILL renamable $ecx, implicit killed $rcx
; CHECK-NEXT: renamable $ecx = AND32ri8 killed renamable $ecx, 2, implicit-def dead $eflags
; CHECK-NEXT: renamable $ecx = SHR32r1 killed renamable $ecx, implicit-def dead $eflags
; CHECK-NEXT: renamable $xmm0 = AVX512_FsFLD0SD
; CHECK-NEXT: renamable $xmm1 = VMOVSDZrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s64) from constant-pool)
; CHECK-NEXT: renamable $xmm2 = COPY renamable $xmm1
; CHECK-NEXT: renamable $xmm2 = VMOVSDZrrk killed renamable $xmm2, killed renamable $k1, undef renamable $xmm0, renamable $xmm0
; CHECK-NEXT: renamable $k1 = COPY killed renamable $ecx
renamable $rax = MOV64rm %fixed-stack.0, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.0, align 16)
renamable $rcx = MOV64rm %fixed-stack.17, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.17)
renamable $rdx = MOV64rm %fixed-stack.18, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.18, align 16)
renamable $r8 = MOV64rm %fixed-stack.19, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.19)
renamable $r9 = MOV64rm %fixed-stack.20, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.20, align 16)
renamable $r10 = MOV64rm %fixed-stack.21, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.21)
renamable $r11 = MOV64rm %fixed-stack.22, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.22, align 16)
renamable $rsi = MOV64rm %fixed-stack.23, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.23)
renamable $rdi = MOV64rm %fixed-stack.24, 1, $noreg, 0, $noreg :: (load (s64) from %fixed-stack.24, align 16)
renamable $zmm0 = AVX512_512_SET0
renamable $k0 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $rdi, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k1 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $rsi, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k0 = KUNPCKBWrr killed renamable $k1, killed renamable $k0
renamable $k1 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $r11, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k2 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $r10, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k1 = KUNPCKBWrr killed renamable $k2, killed renamable $k1
renamable $k0 = KUNPCKWDrr killed renamable $k1, killed renamable $k0
renamable $k1 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $r9, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k2 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $r8, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k1 = KUNPCKBWrr killed renamable $k2, killed renamable $k1
renamable $k2 = nofpexcept VCMPPDZrmi renamable $zmm0, killed renamable $rdx, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k3 = nofpexcept VCMPPDZrmi killed renamable $zmm0, killed renamable $rcx, 1, $noreg, 0, $noreg, 14, implicit $mxcsr :: (load (s512))
renamable $k2 = KUNPCKBWrr killed renamable $k3, killed renamable $k2
renamable $k1 = KUNPCKWDrr killed renamable $k2, killed renamable $k1
renamable $k0 = KUNPCKDQrr killed renamable $k1, killed renamable $k0
renamable $rcx = COPY killed renamable $k0
renamable $k1 = COPY renamable $ecx
renamable $ecx = KILL renamable $ecx, implicit killed $rcx
renamable $ecx = AND32ri8 killed renamable $ecx, 2, implicit-def dead $eflags
renamable $ecx = SHR32r1 killed renamable $ecx, implicit-def dead $eflags
renamable $xmm0 = AVX512_FsFLD0SD
renamable $xmm1 = VMOVSDZrm_alt $rip, 1, $noreg, %const.0, $noreg :: (load (s64) from constant-pool)
renamable $xmm2 = COPY renamable $xmm1
renamable $xmm2 = VMOVSDZrrk killed renamable $xmm2, killed renamable $k1, undef renamable $xmm0, renamable $xmm0
renamable $k1 = COPY killed renamable $ecx
renamable $xmm1 = VMOVSDZrrk killed renamable $xmm1, killed renamable $k1, undef renamable $xmm0, killed renamable $xmm0
VMOVSDZmr killed renamable $rax, 1, $noreg, 0, $noreg, killed renamable $xmm2 :: (store (s64) into %ir.1, align 16)
VMOVSDZmr $noreg, 1, $noreg, 0, $noreg, killed renamable $xmm1 :: (store (s64) into `ptr null`)
RET 0
...