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[RISCV][NFC] Add tests for interleaved accesses in loop vectorizer
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Authored by luke on Mar 9 2023, 8:19 AM.

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luke created this revision.Mar 9 2023, 8:19 AM
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luke requested review of this revision.Mar 9 2023, 8:19 AM
reames accepted this revision.Mar 9 2023, 8:28 AM

LGTM

llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-zve32x.ll
32

OT - This example is sort of interesting as the optimal lowering for it probably uses a predicated add, not an interleave at all. Most of your examples fall into this bucket. Doesn't mean we shouldn't do the interleave work, just an observation. Maybe something for the future if we see these patterns in real code?

This revision is now accepted and ready to land.Mar 9 2023, 8:28 AM
luke added inline comments.Mar 9 2023, 8:39 AM
llvm/test/Transforms/LoopVectorize/RISCV/interleaved-accesses-zve32x.ll
32

Good catch. The adds were sprinkled in so I could pipe this into llc and see what code it generates without worrying about DCE.